CN111277117A - Switch circuit control method, control circuit and switch circuit - Google Patents

Abstract

The invention discloses a control method of a switch circuit, a control circuit and a switch circuit. An upper control threshold voltage and a lower control threshold voltage are set; the upper control threshold voltage is the difference between a compensation voltage and a first slope, and controls the inductance current of the switch circuit. The lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switch circuit. The system of the present invention is stable and has a fast response speed.

Description

Switch circuit control method, control circuit and switch circuit

technical field

The invention relates to the technical field of power electronics, in particular to a control method of a switch circuit, a control circuit and a switch circuit.

Background technique

In switching power supplies, higher and higher requirements are placed on the transient response of the power supply. For example, the central processing unit (CPU) needs to respond quickly to sudden load changes. At present, the commonly used control method with fast transient response is BANG-BANG control. The specific control method is to generate the upper limit and lower limit of the inductor current command value through the compensation voltage. When the main switch is turned on, the inductor current sampling value reaches the inductor current. The upper limit of the command value, the main switch is turned off, and when the sampling value of the inductor current reaches the lower limit of the command value of the inductor current, the main switch is turned on. However, the switching frequency of BANG-BANG control is not fixed, or it is difficult to synchronize to an external clock, which is not suitable for systems that require constant frequency control or multi-phase dislocation control and high transient response.

SUMMARY OF THE INVENTION

In view of this, the purpose of the present invention is to provide a control method of a switch circuit, a control circuit and a switch circuit, so as to solve the problems in the prior art that the frequency cannot be fixed and the transient response is fast.

The technical solution of the present invention is to provide a control method of a switch circuit, which sets an upper control threshold voltage and a lower control threshold voltage;

The upper control threshold voltage is the difference between the compensation voltage and the first slope, and controls the peak value of the inductor current of the switch circuit;

The lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switching circuit.

Alternatively, when the main switch tube is turned on, the first ramp starts to rise from zero;

When the clock signal representation of the switch circuit is valid, the second ramp starts to rise from the second valley value;

the second valley value is less than zero;

The clock signal controls the switching period of the switching circuit.

Another technical solution of the present invention is to provide a control circuit of a switch circuit, the control circuit includes an upper control threshold voltage and a lower control threshold voltage;

The upper control threshold voltage is the difference between the compensation voltage and the first slope, and controls the peak value of the inductor current of the switch circuit;

The lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switching circuit.

Alternatively, when the main switch tube is turned on, the first ramp starts to rise from zero;

When the clock signal representation of the switch circuit is valid, the second ramp starts to rise from the second valley value;

the second valley value is less than zero;

The clock signal controls the switching period of the switching circuit.

Optionally, the control circuit includes an RS flip-flop, a first comparator, a second comparator, an upper control threshold voltage generating circuit and a lower control threshold voltage generating circuit;

The upper control threshold voltage generating circuit receives the compensation voltage, and subtracts the compensation voltage by the first slope to obtain the upper control threshold voltage; the first comparator compares the sampling value of the inductor current with the upper control threshold voltage, when the switching circuit is When the main switch tube is turned on, the sampling value of the inductor current is greater than or equal to the upper control threshold voltage, and the output of the first comparator is inverted;

The lower control threshold voltage generating circuit receives the compensation voltage, and adds a second ramp to the compensation voltage to obtain a lower control threshold voltage; the second comparator compares the inductor current sampling value and the lower control threshold voltage, and when the switching circuit is When the main switch is turned off, the sampling value of the inductor current is less than or equal to the lower control threshold voltage, and the output of the second comparator is inverted;

The RS flip-flop receives the output voltage of the first comparator and the second comparator, and outputs a switch signal; when the output voltage of the first comparator is inverted, the switch signal changes from valid to invalid; when When the output voltage of the second comparator is inverted, the switch signal changes from inactive to active.

Optionally, the upper control threshold voltage generating circuit includes a ramp generating circuit and a subtractor, the ramp generating circuit receives the switching signal, and generates a first ramp; the subtracter receives the compensation voltage and the first ramp, and compensates the The voltage is subtracted from the first ramp to obtain the upper control threshold voltage.

Optionally, the lower control threshold voltage generating circuit includes a ramp generating circuit and an adder, the ramp generating circuit receives the switch signal and the clock signal, and generates a second ramp; the adder receives the compensation voltage, the second ramp , the compensation voltage is added to the second ramp to obtain the lower control threshold voltage.

Another technical solution of the present invention is to provide a switch circuit.

Compared with the prior art, the circuit structure and method of the present invention have the following advantages: simple control mode, stable system, fast response, and basically fixed switching frequency.

Description of drawings

Fig. 1 is the schematic diagram of buck step-down circuit;

2 is a waveform diagram of the clock signal CLK, the inductor current sampling value iL, the upper control threshold voltage, the lower control threshold voltage and the switching signal PWM of the control method of the present invention;

FIG. 3 is a schematic diagram of an embodiment of the control circuit 200 of the present invention;

FIG. 4 is a schematic diagram of an embodiment of the control threshold voltage generating circuit 210 according to the present invention;

FIG. 5 is a schematic diagram of an embodiment of the lower control threshold voltage generating circuit 230 of the present invention.

Detailed ways

The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any alternatives, modifications, equivalent methods and arrangements made within the spirit and scope of the present invention.

In order to give the public a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, and those skilled in the art can fully understand the present invention without the description of these details.

The invention is described in more detail by way of example in the following paragraphs with reference to the accompanying drawings. It should be noted that the accompanying drawings are all in a relatively simplified form and in an inaccurate scale, and are only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

Please refer to FIG. 1 , which is a schematic diagram of a buck step-down circuit. The buck circuit includes a main switch tube M00 , a freewheeling diode D00 , an inductor L00 , an output capacitor C01 , output voltage feedback resistors R01 and R02 , a control circuit 200 and a drive circuit 400 . The output feedback resistors R01 and R02 divide the output voltage Vout to obtain the feedback voltage. The control circuit 200 obtains the switching signal PWM according to the feedback voltage, and the driving circuit 400 receives the switching signal PWM to drive the main switch tube, so that the feedback voltage is equal to the reference voltage, so that the The output voltage is constant voltage. It should be noted that the buck step-down circuit is only used here to illustrate one of the switching circuits, and the buck step-down circuit in FIG. 1 does not have synchronous rectification. The present invention is also applicable to the buck step-down circuit with synchronous rectification. And the present invention is applicable to various switching circuits.

The present invention provides a control circuit 200 of a switch circuit, the control circuit 200 includes an upper control threshold voltage and a lower control threshold voltage; the upper control threshold voltage is the difference between the compensation voltage VC and the first ramp ramp1, and controls the switch circuit The peak value of the inductor current iL; the lower control threshold voltage is the sum of the compensation voltage VC and the second ramp ramp2, and controls the valley value of the inductor current iL of the switch circuit.

It should be noted that the slope of the first slope and/or the second slope may be linear or nonlinear. Nonlinearity includes: piecewise linear, parabolic, exponential and other forms.

In one embodiment, when the main switch is turned on, the first ramp ramp1 starts to rise from zero; when the clock signal CLK of the switch circuit is valid, the second ramp ramp2 starts to rise from the second valley value; the first ramp ramp2 starts to rise from the second valley value; The second valley value is less than zero; the clock signal CLK controls the switching period of the switching circuit. Please refer to FIG. 2 , which is a waveform diagram of the clock signal CLK, the inductor current sampling value iL, the upper control threshold voltage, the lower control threshold voltage and the switching signal PWM of the control method of the present invention. The control method of the invention is simple, the system is stable, the response is fast, and the switching frequency is basically fixed. CLK can be generated inside the control circuit, or it can be generated externally.

Please refer to FIG. 3 , which is a schematic diagram of an embodiment of the control circuit 200 of the present invention. The control circuit 200 includes an RS flip-flop 250, a first comparator 220, a second comparator 240, an upper control threshold voltage generation circuit 210 and a lower control threshold voltage generation circuit 230; the upper control threshold voltage generation circuit 210 receives the the compensation voltage VC, and subtract the first slope from the compensation voltage VC to obtain the upper control threshold voltage; the first comparator 220 compares the sampling value of the inductor current with the upper control threshold voltage, and when the main switch of the switch circuit is turned on, When the sampling value of the inductor current is greater than or equal to the upper control threshold voltage, the output of the first comparator 220 is inverted; the lower control threshold voltage generating circuit 230 receives the compensation voltage VC, and adds the compensation voltage VC to the second slope to obtain lower control threshold voltage; the second comparator 240 compares the sampling value of the inductor current with the lower control threshold voltage, when the main switch of the switch circuit is turned off, the sampling value of the inductor current is less than or equal to the lower control threshold voltage, the second comparison The output of the comparator 240 is inverted; the RS flip-flop 250 receives the output voltage of the first comparator 220 and the second comparator 240, and outputs a switching signal PWM; when the output voltage of the first comparator 220 is inverted , the switch signal changes from being valid to being invalid; when the output voltage of the second comparator is inverted, the switching signal changes from being invalid to being valid. In one embodiment, the valid corresponds to the high level, and the invalid corresponds to the low level; in another embodiment, the valid corresponds to the low level, and the invalid corresponds to the high level. When the switch signal representation is valid, the main switch tube is turned on; when the switch signal representation is invalid, the main switch tube is turned off.

Please continue to refer to FIG. 3 , the control circuit 200 further includes an operational amplifier 260 . The operational amplifier receives the reference voltage and the feedback voltage, and the operational amplifier 260 performs operational amplification on the feedback voltage to obtain the compensation voltage VC.

Please refer to FIG. 4 , which is a schematic diagram of an embodiment of the control threshold voltage generating circuit 210 according to the present invention. The upper control threshold voltage generating circuit includes a ramp generating circuit 212 and a subtractor 211. The ramp generating circuit 212 receives the switching signal PWM to generate a first ramp; the subtractor 211 receives the compensation voltage VC and the first ramp, The upper control threshold voltage is obtained by subtracting the first ramp from the compensation voltage VC.

Please refer to FIG. 5 , which is a schematic diagram of an embodiment of the control threshold voltage generating circuit 230 according to the present invention. The lower control threshold voltage generating circuit 230 includes a ramp generating circuit 232 and an adder 231, the ramp generating circuit 232 receives the switching signal PWM and the clock signal CLK, and generates a second ramp; the adder 231 receives the compensation voltage VC , the second ramp, the compensation voltage is added to the second ramp to obtain the lower control threshold voltage.

Another technical solution of the present invention is to provide a control method for a switch circuit, which sets an upper control threshold voltage and a lower control threshold voltage; the upper control threshold voltage is the difference between the compensation voltage and the first slope, and controls the switch circuit The peak value of the inductor current; the lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switch circuit.

In one embodiment, when the main switch is turned on, the first ramp starts to rise from zero; when the clock signal of the switch circuit is valid, the second ramp starts to rise from the second valley value; the second valley value less than zero; the clock signal controls the switching period of the switching circuit.

Another technical solution of the present invention is to provide a switch circuit.

It should be noted that "valid" and "invalid" are mentioned in this article. In one embodiment, the valid corresponds to the high level, and the invalid corresponds to the low level; in another embodiment, the valid corresponds to the low level. level, invalid corresponds to high level.

Although the embodiments are described and described separately above, some common technologies are involved, and in the opinion of those of ordinary skill in the art, they can be replaced and integrated between the embodiments. Reference is made to another example described.

The above-mentioned embodiments do not constitute a limitation on the protection scope of the technical solution. Any modifications, equivalent replacements and improvements made within the spirit and principles of the above-mentioned embodiments shall be included within the protection scope of this technical solution.

Claims (8)

1. A control method of a switching circuit, characterized in that: an upper control threshold voltage and a lower control threshold voltage are set; The upper control threshold voltage is the difference between the compensation voltage and the first slope, and controls the peak value of the inductor current of the switch circuit; The lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switching circuit. 2. control method according to claim 1, is characterized in that: When the main switch tube is turned on, the first ramp starts to rise from zero; When the clock signal representation of the switch circuit is valid, the second ramp starts to rise from the second valley value; the second valley value is less than zero; The clock signal controls the switching period of the switching circuit. 3. A control circuit of a switching circuit, the control circuit comprising an upper control threshold voltage and a lower control threshold voltage; The upper control threshold voltage is the difference between the compensation voltage and the first slope, and controls the peak value of the inductor current of the switch circuit; The lower control threshold voltage is the sum of the compensation voltage and the second slope, and controls the valley value of the inductor current of the switching circuit. 4. The control circuit according to claim 3, wherein: When the main switch tube is turned on, the first ramp starts to rise from zero; When the clock signal representation of the switch circuit is valid, the second ramp starts to rise from the second valley value; the second valley value is less than zero; The clock signal controls the switching period of the switching circuit. 5. The control circuit according to claim 4, wherein the control circuit comprises an RS flip-flop, a first comparator, a second comparator, an upper control threshold voltage generating circuit and a lower control threshold voltage generating circuit; The upper control threshold voltage generating circuit receives the compensation voltage, and subtracts the compensation voltage by the first slope to obtain the upper control threshold voltage; the first comparator compares the sampling value of the inductor current with the upper control threshold voltage, when the switching circuit is When the main switch tube is turned on, the sampling value of the inductor current is greater than or equal to the upper control threshold voltage, and the output of the first comparator is inverted; The lower control threshold voltage generating circuit receives the compensation voltage, and adds a second ramp to the compensation voltage to obtain a lower control threshold voltage; the second comparator compares the inductor current sampling value and the lower control threshold voltage, and when the switching circuit is When the main switch is turned off, the sampling value of the inductor current is less than or equal to the lower control threshold voltage, and the output of the second comparator is inverted; The RS flip-flop receives the output voltage of the first comparator and the second comparator, and outputs a switch signal; when the output voltage of the first comparator is inverted, the switch signal changes from valid to invalid; when When the output voltage of the second comparator is inverted, the switch signal changes from inactive to active. 6 . The control circuit according to claim 5 , wherein: the upper control threshold voltage generating circuit comprises a ramp generating circuit and a subtractor, the ramp generating circuit receives the switching signal and generates a first ramp; the The subtractor receives the compensation voltage and the first ramp, and subtracts the first ramp from the compensation voltage to obtain the upper control threshold voltage. 7 . The control circuit according to claim 5 , wherein the lower control threshold voltage generating circuit comprises a ramp generating circuit and an adder, and the ramp generating circuit receives the switch signal and the clock signal to generate the second ramp. 8 . ; The adder receives the compensation voltage and the second ramp, and adds the compensation voltage to the second ramp to obtain the lower control threshold voltage. 8 . A switch circuit, characterized in that it comprises the control circuit according to any one of claims 3 to 7 , or adopts the control method according to claim 1 or 2 .

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