CN111129161A - Flexible substrate semi-embedded grid thin film transistor and preparation method thereof - Google Patents
Flexible substrate semi-embedded grid thin film transistor and preparation method thereof Download PDFInfo
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- CN111129161A CN111129161A CN201911353459.9A CN201911353459A CN111129161A CN 111129161 A CN111129161 A CN 111129161A CN 201911353459 A CN201911353459 A CN 201911353459A CN 111129161 A CN111129161 A CN 111129161A
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- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
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- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/026—Manufacture or treatment of FETs having insulated gates [IGFET] having laterally-coplanar source and drain regions, a gate at the sides of the bulk channel, and both horizontal and vertical current flow
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- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
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- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/512—Disposition of the gate electrodes, e.g. buried gates
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Abstract
本发明属于薄膜晶体管技术领域，公开了一种柔性基板半嵌入式栅极薄膜晶体管及其制备方法。所述薄膜晶体管包括柔性基板和柔性基板上的栅极，所述柔性基板上设有矩形凹槽，所述栅极下部矩形区域刚好嵌入至矩形凹槽内，栅极上部梯形区域凸出于矩形凹槽外。与现有的堆栈式底栅顶接触的薄膜晶体管和全嵌入式栅极的薄膜晶体管结构相比，本发明有利于绝缘层薄膜和有源层薄膜的内部及接触界面的缺陷减少，提高器件的性能。且本发明在对嵌入栅极后的柔性基板进行表明清洗时，可有效去除可能存在于凹槽内边角处的杂质和清洗剂，洁净度更高，器件质量更好。
The invention belongs to the technical field of thin film transistors, and discloses a flexible substrate semi-embedded gate thin film transistor and a preparation method thereof. The thin film transistor includes a flexible substrate and a gate on the flexible substrate, the flexible substrate is provided with a rectangular groove, the lower rectangular area of the grid is just embedded in the rectangular groove, and the upper trapezoidal area of the grid protrudes out of the rectangle outside the groove. Compared with the existing stacked bottom gate top contact thin film transistor and fully embedded gate thin film transistor structure, the present invention is beneficial to reduce the defects in the interior and contact interface of the insulating layer thin film and the active layer thin film, and improve the performance of the device. performance. In addition, the present invention can effectively remove impurities and cleaning agents that may exist in the inner corners of the groove when the flexible substrate embedded in the gate electrode is cleaned, resulting in higher cleanliness and better device quality.
Description
Technical Field
The invention belongs to the technical field of thin film transistors, and particularly relates to a flexible substrate semi-embedded gate thin film transistor and a preparation method thereof.
Background
With the continuous innovation of science and technology, the performance requirements of people on the display are gradually improved. As a core component in currently mainstream Active Matrix Liquid Crystal Displays (AMLCDs) and Active Matrix Organic Light Emitting Diodes (AMOLEDs), a Thin Film Transistor (TFT) has a decisive influence on the function and quality of the display.
The performance of the thin film transistor is mainly related to the active layer material, the insulating layer material, the electrode material, and the interfacial contact characteristics between the materials. At present, most of thin film transistors are in a bottom-gate top-contact structure, a gate electrode is directly prepared on a substrate, and then structures such as an insulating layer and an active layer are prepared on a patterned gate electrode.
However, the patterned gate structure fabricated on the flexible substrate will form a large step and introduce significant surface undulations, which not only affect the insulating layer and the active layer fabricated on the gate, but also interfere with the continuous growth of a single domain in the active layer, increasing defects in the active layer, and at the same time, increasing defects at the interface between the active layer and the insulating layer; when the flexible device is bent, the thicker the stack-type thin film device, the larger the deviation from the neutral plane, and the larger the stress, which leads to the performance and reliability reduction of the flexible thin film transistor device, and limits the further development thereof.
When the metal gate electrode is deposited in the fully-embedded gate structure, due to the edge effect, the section with a right rectangular section is difficult to form during electrode deposition, but the corner loss condition is easy to occur at the top, and during surface cleaning, residues of cleaning agents and impurities are easy to cause, and adverse effects are caused on the performance of a device.
Disclosure of Invention
In view of the above disadvantages and shortcomings of the prior art, a primary object of the present invention is to provide a flexible substrate semi-embedded gate thin film transistor.
The invention also aims to provide a preparation method of the flexible substrate semi-embedded gate thin film transistor.
The purpose of the invention is realized by the following technical scheme:
the utility model provides a flexible substrate semi-embedded grid thin film transistor, includes flexible substrate and the grid on the flexible substrate, be equipped with the rectangle recess on the flexible substrate, grid lower part rectangle region just imbeds to the rectangle recess in, and the trapezoidal region protrusion in grid upper portion is outside the rectangle recess.
Furthermore, the flexible substrate semi-embedded gate thin film transistor also comprises an insulating layer thin film, an active layer thin film, a source electrode and a drain electrode which are sequentially stacked.
The preparation method of the flexible substrate semi-embedded grid thin film transistor comprises the following preparation steps:
(1) etching treatment of the substrate: etching a rectangular groove on the flexible substrate by adopting a micro-machining technology for preparing a grid;
(2) cleaning of the substrate: cleaning the flexible substrate etched in the step (1), and drying;
(3) preparing a grid electrode: placing the flexible substrate cleaned and dried in the step (2) in a mask to prepare a semi-embedded grid electrode of which the lower rectangular region is just embedded into the rectangular groove and the upper trapezoidal region protrudes out of the rectangular groove;
(4) preparing an insulating layer film: preparing an insulating layer film on the flexible substrate containing the semi-embedded grid in the step (3);
(5) preparing an active layer film: preparing an active layer film on the insulating layer film in the step (4);
(6) preparation of source and drain electrodes: and (5) placing the structure obtained in the step (5) in a mask plate for depositing the source electrode and the drain electrode, and depositing the source electrode and the drain electrode.
Further, the material of the flexible substrate in the step (1) is PI, PEN or PET; the micro-machining technology refers to reactive ion etching, electron beam exposure, chemical etching or the like.
Further, the gate in the step (3) is made of a material with a low resistivity, such as aluminum, molybdenum, gold or silver; the preparation method of the grid electrode is Physical Vapor Deposition (PVD), Pulse Laser Deposition (PLD) or thermal evaporation and the like.
Further, the material of the insulating layer film in the step (4) is Al2O3、ZrO2、SiNx、SiO2Or HfO2Insulating materials with higher constant dielectric constant; the preparation method of the insulating layer film comprises a spin coating method, an ink jet printing method, Physical Vapor Deposition (PVD), Pulse Laser Deposition (PLD) and the like; the thickness of the insulating layer film is 80-120 nm.
Further, the material of the active layer thin film In the step (5) is IGZO, In2O3AZO, NdIZO, GZO, ZTO or SnO2Semiconductor materials with higher field effect mobility; the preparation method of the active layer film comprises a spin coating method, an ink jet printing method, Physical Vapor Deposition (PVD), Pulse Laser Deposition (PLD) and the like; the thickness of the active layer film is 20-50 nm.
Further, in the step (6), the source electrode and the drain electrode are made of a material with a low resistivity, such as aluminum, molybdenum, gold or silver, and the preparation method is Physical Vapor Deposition (PVD), Pulsed Laser Deposition (PLD) or thermal evaporation.
The principle of the invention is as follows: in contrast to the stacked gate, as shown in fig. 1, the tft with the semi-embedded gate has a rectangular region of the gate completely embedded in the groove of the flexible substrate, and a trapezoidal region on the upper surface of the flexible substrateThe electrode material and the substrate can form a relatively flat surface structure, and the surface has only small surface fluctuation, so that a relatively flat and uniform insulating layer film and an active layer film can be prepared, and internal defects and interface defects of the insulating layer film and the active layer film can be reduced; in addition, because the grid is embedded into the flexible substrate, the bending moment from each film layer to a neutral surface in the flexible device can be reduced, so that the stress borne by each film layer is reduced when the same bending degree is realized, and the damage to the performance and the structure of the device is reduced; and the adhesion contact area of the grid and the substrate is increased, so that the combination of the grid and the like and the flexible substrate is enhanced: when an external force F bending downwards is applied to the device1In time, as shown in fig. 2, the present invention increases the adhesion and stiction F of the gate side interacting with the flexible substrate compared to a device without an embedded gate2So that the device is not easy to peel off; when an external force F bending upwards is applied to the device3In comparison with a device without an embedded gate, the invention not only increases the adhesion and stiction F of the gate side interacting with the flexible substrate, as shown in FIG. 34And the internal force F of the grid, which is received by the interaction of the side surface of the grid and the flexible substrate and points to the grid, is increased5So that the device is less prone to peeling. Compare simultaneously in full embedded grid, as shown in fig. 4, when carrying out surface cleaning, cleaner and impurity will no longer remain in the interior edge of recess and angle department, have obvious effect to the cleanliness factor that improves the device to there is obvious effect to the promotion of device performance. Therefore, the structure of the flexible substrate semi-embedded grid not only improves the performance of the flexible thin film transistor device, but also can improve the bending resistance reliability of the flexible device.
Compared with the prior art, the invention has the following advantages and beneficial effects:
compared with the existing stacked bottom gate top contact thin film transistor structure, the invention is beneficial to reducing the defects of the inner parts and contact interfaces of the insulating layer thin film and the active layer thin film, reducing the subthreshold swing of the device, reducing the off-state leakage current, increasing the current switching ratio and improving the performance of the device. Meanwhile, the embedding of the grid is beneficial to the reduction of the size of the thin film transistor device in the vertical direction, not only has an important effect on the size reduction of a large-scale thin film transistor array, but also can obviously improve the reliability of the flexible device. Compared with the existing thin film transistor structure with the fully embedded grid electrode, the method can effectively remove impurities and cleaning agents possibly existing at the inner corners of the grooves when the flexible substrate with the embedded grid electrode is subjected to surface cleaning, and is higher in cleanliness and better in device quality.
Drawings
Fig. 1 is a schematic structural diagram of a stacked gate (a), a fully embedded gate (b) and a semi-embedded gate (c).
Fig. 2 is a schematic diagram of the semi-embedded gate tft structure of the present invention when subjected to a downward bending force.
Fig. 3 is a schematic diagram of the semi-embedded gate tft structure of the present invention when an external force is applied to the semi-embedded gate tft structure.
Fig. 4 is a comparison of the surface cleaning of fully embedded gate and semi-embedded gate.
Fig. 5 is a schematic view of a structure of a semi-embedded gate thin film transistor according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to examples, but the embodiments of the present invention are not limited thereto.
Example 1
Fig. 5 is a schematic structural diagram of a flexible substrate semi-embedded gate thin film transistor according to the present embodiment. The thin film transistor comprises a flexible substrate, a grid electrode, an insulating layer thin film, an active layer thin film, a source electrode and a drain electrode which are sequentially stacked. The gate is a semi-embedded gate, a rectangular groove is formed in the flexible substrate, a lower rectangular region of the semi-embedded gate is just embedded into the rectangular groove of the flexible substrate, and an upper trapezoidal region of the semi-embedded gate protrudes out of the rectangular groove of the flexible substrate.
The flexible substrate semi-embedded gate thin film transistor is prepared by the following method:
(1) etching treatment of the substrate: selecting flexible material PI is used as a substrate of the thin film transistor, a groove with certain depth and shape is etched on the substrate by adopting a reactive ion etching technology, and the volume ratio of etching gas is O2:CHF30.33:0.67, vacuum degree of 5Pa, radio frequency power of 200W, total flow rate of 40cm3And/min, the etching depth can be controlled by the etching time.
(2) Cleaning of the substrate: and (2) carrying out ultrasonic cleaning treatment on the substrate subjected to etching treatment in the step (1) in an organic solvent and deionized water, and drying.
(3) Preparing a grid electrode: and (3) placing the substrate obtained in the step (2) in a mask for depositing a gate material, wherein the etching shape and position of the mask are correspondingly consistent with those of the substrate groove, and depositing the aluminum gate electrode with the thickness of the rectangular area being the same as the depth of the substrate groove and the trapezoidal area being just on the surface of the flexible substrate by adopting PVD.
(4) Preparing an insulating layer film: insulating material Al2O3Preparing a substrate material of the semi-embedded grid obtained in the step (3), and depositing an insulating layer Al of the thin film transistor by PVD2O3The film thickness is 80 nm.
(5) Preparing an active layer film: preparing a semiconductor material IGZO on the insulating layer thin film obtained in the step (4), and depositing an active layer IGZO thin film of the thin film transistor through PVD, wherein the thickness of the thin film is 20 nm.
(6) Preparation of source and drain electrodes: and (5) placing the structure obtained in the step (5) in a mask plate for depositing source and drain electrode materials, and depositing an aluminum source and a drain electrode with certain thickness by adopting PVD.
Example 2
The structure of the flexible substrate semi-embedded gate thin film transistor of the embodiment is the same as that of the embodiment 1, and the flexible substrate semi-embedded gate thin film transistor is prepared by the following method:
(1) etching treatment of the substrate: selecting a flexible material PEN as a substrate of a thin film transistor, and etching a groove with a certain depth and shape on the substrate by adopting a reactive ion etching technology, wherein the volume ratio of etching gas is O2:SF60.87:0.13, vacuum degree of 5Pa, and radio frequency power of 200WTotal flow rate of 40cm3And/min, the etching depth can be controlled by the etching time.
(2) Cleaning of the substrate: and (2) carrying out ultrasonic cleaning treatment on the substrate subjected to etching treatment in the step (1) in an organic solvent and deionized water, and drying.
(3) Preparing a grid electrode: and (3) placing the substrate obtained in the step (2) in a mask for depositing a gate material, wherein the etching shape and position of the mask are correspondingly consistent with those of the substrate groove, and depositing the silver gate electrode with the thickness of the rectangular area being the same as the depth of the substrate groove and the trapezoidal area being just on the surface of the flexible substrate by adopting PVD.
(4) Preparing an insulating layer film: ZrO of insulating material2Preparing a substrate material of the semi-embedded grid electrode obtained in the step (3), and depositing an insulating layer ZrO of the thin film transistor by PVD2The film thickness is 120 nm.
(5) Preparing an active layer film: preparing a semiconductor material NdIZO on the insulating layer film obtained in the step (4), and depositing an active layer NdIZO film of the thin film transistor by PVD, wherein the film thickness is 50 nm.
(6) Preparation of source and drain electrodes: and (5) placing the structure obtained in the step (5) in a mask plate for depositing a source electrode material and a drain electrode material, and depositing a silver source electrode and a silver drain electrode with certain thickness by adopting PVD.
Example 3
The structure of the flexible substrate semi-embedded gate thin film transistor of the embodiment is the same as that of the embodiment 1, and the flexible substrate semi-embedded gate thin film transistor is prepared by the following method:
(1) etching treatment of the substrate: selecting a flexible material PET as a substrate of the thin film transistor, and etching a groove with a certain depth and shape on the substrate by adopting a reactive ion etching technology, wherein the volume ratio of etching gas is O2:CHF30.33:0.67, vacuum degree of 5Pa, radio frequency power of 200W, total flow rate of 40cm3And/min, the etching depth can be controlled by the etching time.
(2) Cleaning of the substrate: and (2) carrying out ultrasonic cleaning treatment on the substrate subjected to etching treatment in the step (1) in an organic solvent and deionized water, and drying.
(3) Preparing a grid electrode: and (3) placing the substrate obtained in the step (2) in a mask for depositing a gate material, wherein the etching shape and position of the mask are correspondingly consistent with those of the substrate groove, and depositing a gold gate electrode with the thickness of a rectangular area being the same as the depth of the substrate groove and the trapezoidal area being just on the surface of the flexible substrate by adopting PVD.
(4) Preparing an insulating layer film: insulating material SiO2Preparing a substrate material of the semi-embedded grid obtained in the step (3), and depositing an insulating layer SiO of the thin film transistor by PVD2The film thickness is 100 nm.
(5) Preparing an active layer film: putting semiconductor material In2O3Preparing an active layer In of the thin film transistor on the insulating layer film obtained In the step (4) by PVD2O3The film thickness is 30 nm.
(6) Preparation of source and drain electrodes: and (5) placing the structure obtained in the step (5) in a mask plate for depositing a source electrode material and a drain electrode material, and depositing a gold source electrode and a gold drain electrode with certain thickness by adopting PVD.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (8)
1. A flexible substrate semi-embedded grid thin film transistor is characterized in that: the grid electrode structure comprises a flexible substrate and a grid electrode on the flexible substrate, wherein a rectangular groove is formed in the flexible substrate, a rectangular region at the lower part of the grid electrode is just embedded into the rectangular groove, and a trapezoidal region at the upper part of the grid electrode protrudes out of the rectangular groove.
2. The flexible substrate semi-embedded gate thin film transistor of claim 1, wherein: the flexible substrate semi-embedded grid thin film transistor further comprises an insulating layer thin film, an active layer thin film, a source electrode and a drain electrode which are sequentially stacked.
3. The method for manufacturing a flexible substrate semi-embedded gate thin film transistor according to claim 2, comprising the following steps:
(1) etching treatment of the substrate: etching a rectangular groove on the flexible substrate by adopting a micro-machining technology for preparing a grid;
(2) cleaning of the substrate: cleaning the flexible substrate etched in the step (1), and drying;
(3) preparing a grid electrode: placing the flexible substrate cleaned and dried in the step (2) in a mask to prepare a semi-embedded grid electrode of which the lower rectangular region is just embedded into the rectangular groove and the upper trapezoidal region protrudes out of the rectangular groove;
(4) preparing an insulating layer film: preparing an insulating layer film on the flexible substrate containing the semi-embedded grid in the step (3);
(5) preparing an active layer film: preparing an active layer film on the insulating layer film in the step (4);
(6) preparation of source and drain electrodes: and (5) placing the structure obtained in the step (5) in a mask plate for depositing the source electrode and the drain electrode, and depositing the source electrode and the drain electrode.
4. The method for manufacturing a flexible substrate semi-embedded gate thin film transistor according to claim 3, wherein: the flexible substrate in the step (1) is made of PI, PEN or PET; the micro-machining technology is reactive ion etching, electron beam exposure or chemical etching.
5. The method for manufacturing a flexible substrate semi-embedded gate thin film transistor according to claim 3, wherein: the grid in the step (3) is made of aluminum, molybdenum, gold or silver; the preparation method of the grid electrode is physical vapor deposition, pulse laser deposition or thermal evaporation.
6. A flexible substrate according to claim 3The preparation method of the plate semi-embedded grid thin film transistor is characterized by comprising the following steps: the material of the insulating layer film in the step (4) is Al2O3、ZrO2、SiNx、SiO2Or HfO2(ii) a The preparation method of the insulating layer film is spin coating, ink jet printing, physical vapor deposition or pulsed laser deposition; the thickness of the insulating layer film is 80-120 nm.
7. The method for manufacturing a flexible substrate semi-embedded gate thin film transistor according to claim 3, wherein: the active layer film In the step (5) is made of IGZO and In2O3AZO, NdIZO, GZO, ZTO or SnO2(ii) a The preparation method of the active layer film is spin coating, ink jet printing, physical vapor deposition or pulsed laser deposition; the thickness of the active layer film is 20-50 nm.
8. The method for manufacturing a flexible substrate semi-embedded gate thin film transistor according to claim 3, wherein: in the step (6), the source electrode and the drain electrode are made of aluminum, molybdenum, gold or silver; the deposition method of the source electrode and the drain electrode is physical vapor deposition, pulse laser deposition or thermal evaporation.
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| US20240178313A1 (en) * | 2021-12-06 | 2024-05-30 | South China University Of Technology | Enhanced gan hemt radio-frequency device and manufacturing method thereof |
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| US20050042833A1 (en) * | 2003-08-20 | 2005-02-24 | Jong-Chul Park | Method of manufacturing integrated circuit device including recessed channel transistor |
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