CN119201809A

CN119201809A - Device identification system, method, electronic device and storage medium

Info

Publication number: CN119201809A
Application number: CN202411045485.6A
Authority: CN
Inventors: 王玉山
Original assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Current assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Priority date: 2024-07-31
Filing date: 2024-07-31
Publication date: 2024-12-27

Abstract

The present invention provides a device identification system, method, electronic device and storage medium, which relate to the field of data processing technology, and include: a mainboard, an expansion board, and a data processor unit network card; the expansion board includes: a first high-speed connector, a second high-speed connector, a switching multiplexer, a micro control unit, and a PCIE slot; the expansion board is connected to the mainboard through the first high-speed connector, and the expansion board is connected to the data processor unit network card through the second high-speed connector; wherein the PCIE slot is used to load the PCIE device; wherein the micro control unit is used to generate a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card after the server is powered on; wherein the switching multiplexer is used to control the connection between the mainboard and the data processor unit network card and the expansion board according to the control instruction, so as to determine the identification device of the PCIE device.

Description

Device identification system, method, electronic device and storage medium

Technical Field

The present invention relates to the field of data processing technologies, and in particular, to a device identification system, a method, an electronic device, and a storage medium.

Background

With the continuous development of technology, big data and intelligent services are continuously increased, and the compatibility requirement of clients on server configuration is also increased, so that the requirement on the adaptation flexibility of the server is also increased.

In the related art, compatibility of network cards with different configurations is usually achieved by changing cables and boards, and PCIE devices with different configurations cannot be intelligently identified through hardware and firmware.

Therefore, how to identify PCIE devices more efficiently has become a problem to be solved in the industry.

Disclosure of Invention

The invention provides a device identification system which is used for solving the problem of how to identify PCIE devices more efficiently in the prior art.

The invention provides a device identification system, comprising:

The PCI express system comprises a main board, an expansion board and a data processor unit network card, wherein the expansion board comprises a first high-speed connector, a second high-speed connector, a switching multiplexer, a micro control unit and a PCIE slot;

The micro control unit is used for generating a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card after the server is electrified;

And the switching multiplexer is used for controlling the connection between the main board and the data processor unit network card and the expansion board according to the control instruction so as to determine the identification equipment of the PCIE equipment.

According to the device identification system provided by the invention, the control unit is specifically used for:

Under the condition that bit signals of the PCIE slot, the expansion board and the data processor unit network card are all low-level, the control unit sends a first control instruction to the switching multiplexer;

The first control instruction is configured to instruct the switch multiplexer to communicate the second high-speed connector with the PCIE slot, so that a high-speed PCIE signal, a 100M clock, a down-conversion signal, a reset signal, and a Wake signal of the PCIE slot are transmitted to the data processor unit network card through the switch multiplexer via the second high-speed connector;

When the in-place signals of the PCIE slot and the expansion board are low level and the in-place signal of the data processor unit network card is high level, the control unit sends a second control instruction to the switching multiplexer;

The second control instruction is configured to instruct the switch multiplexer to communicate the second high-speed connector with the PCIE slot, so that a high-speed PCIE signal, a 100M clock, a down-conversion signal, a reset signal, and a Wake signal of the PCIE slot are transmitted to the motherboard through the switch multiplexer and the first high-speed connector.

When the in-place signal of the PCIE slot is high level and the in-place signals of the expansion board and the data processor unit network card are low level, the control unit does not send a control signal;

or, when the in-place signal of the expansion board is at a low level, and the in-place signals of the PCIE slot and the data processor unit network card are at a high level, the control unit does not send a control signal;

or, in the case where the bit signal of the expansion board is high, the control unit does not transmit a control signal.

According to the device identification system provided by the invention, the control unit is specifically further used for:

When the in-place signals of the expansion board and the PCIE slot are low level and the in-place signals of the data processor unit network card are high level, controlling the switching multiplexer to communicate the first high-speed connector with the PCIE slot;

The main board identifies the PCIE equipment and sends a debugging control signal to the control unit through the first high-speed connector so that the control unit latches the debugging control signal;

when the server is restarted, the connection between the main board and the data processor unit network card and the expansion board is controlled according to the configuration indicated by the control unit according to the debugging control signal.

The invention provides a device identification system, which comprises an expansion board, a power supply module and an instant electric erasable programmable read-only memory, wherein the expansion board comprises a storage module, a storage module and a storage module;

in the case of a server power up, the power supply module supplies power to the switching multiplexer and the micro control unit;

and the micro control unit acquires the in-place signals of the PCIE slot, the expansion board and the data processor unit network card.

The invention also provides an identification method based on the equipment identification system, which comprises the following steps:

After the server is electrified, the micro control unit generates a control instruction according to the PCIE slot, the expansion board and the in-place signals of the data processor unit network card;

And the switching multiplexer controls the connection of the main board and the data processor unit network card with the expansion board according to the control instruction so as to determine the identification equipment of the PCIE equipment.

Optionally, the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board, and the data processor unit network card, including:

under the condition that bit signals of the PCIE slot, the expansion board and the data processor unit network card are all low-level, the control unit generates a first control instruction and sends the first control instruction to the switching multiplexer;

when the in-place signals of the PCIE slot and the expansion board are low level and the in-place signal of the data processor unit network card is high level, the control unit generates a second control instruction, and the control unit sends the second control instruction to the switching multiplexer;

Optionally, the method further comprises:

The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the identification method as described in any one of the above when executing the program.

The invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of identifying as described in any of the above.

The invention also provides a computer program product comprising a computer program which, when executed by a processor, implements a method of identifying as described in any of the above.

According to the equipment identification system, the method, the electronic equipment and the storage medium, after the server is electrified, the micro control unit starts to work. And the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card. And the switching multiplexer controls the connection modes of the main board and the data processor unit network card and the expansion board according to the control instruction generated by the micro control unit. The determining of the connection mode can connect the devices in the PCIE slot, that is, determine which component will communicate with the PCIE device, and further identify the PCIE device. The embodiment of the application improves the flexibility and expansibility of the server, and allows the automatic equipment identification and configuration to be realized under different hardware configurations, thereby optimizing the performance and maintenance efficiency of the server.

Drawings

In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a device identification system according to an embodiment of the present application;

FIG. 2 is a schematic flow chart of an identification method according to an embodiment of the present application;

FIG. 3 is a schematic diagram of an identification process according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of an electronic device provided by the present invention.

Detailed Description

Fig. 1 is a schematic diagram of a device identification system provided in an embodiment of the present application, as shown in fig. 1, including a motherboard 11, an expansion board 12, and a data processor unit network card 13, where the expansion board 12 includes a first high-speed connector 120, a second high-speed connector 121, a switch multiplexer 122, a micro control unit 123, and a PCIE slot 124, where the expansion board 12 is connected to the motherboard 11 through the first high-speed connector 120, and the expansion board 12 is connected to the data processor unit network card 13 through the second high-speed connector 121, where the PCIE slot is used 124 to load PCIE devices;

the micro control unit 123 is configured to generate a control instruction according to the in-place signals of the PCIE slot 124, the expansion board 12, and the data processor unit network card 13 after the server is powered on;

The switch multiplexer 122 is configured to control connection between the motherboard 11 and the data processor unit network card 13 and the expansion board 12 according to the control instruction, so as to determine an identification device of the PCIE device.

In the embodiment of the present application, a Motherboard (MB) is a main circuit board of a server, and includes core components such as a CPU and a memory, and provides an expansion slot and other interfaces. And may include a programmable logic device for implementing specific logic functions such as signal control and interface management. The PCH (Platform Controller Hub ) is responsible for managing input/output functions on the motherboard, such as SATA, USB, etc. interfaces. The BMC (Baseboard Management Controller ) is responsible for server monitoring, management, and maintenance tasks such as remote control, hardware status monitoring, etc. MCIO high-speed connectors are used for high-speed data transfer between a motherboard and other components, such as a Riser board.

In an embodiment of the application, the expansion board provides additional PCIe slots and other functions, and two MCIO high-speed connectors are used for high-speed connection with the motherboard and the data processor unit network card. The first high-speed connector is connected with the main board and used for data and signal transmission. And the second high-speed connector is connected with the data processor unit network card and is also used for data and signal transmission.

In the embodiment of the application, the data processor unit network card (data processor unit network card) is provided with the main control chip and can independently run service processing tasks.

The switching multiplexer (PCI Express Multiplexer) switches signal paths according to the control instruction and is connected with the main board or the data processor unit network card. The MCU (Microcontroller Unit, micro control unit) is responsible for logic judgment and generation of control instructions. EEPROM (ELECTRICALLY ERASABLE PROGRAMMABLE READ-Only Memory), which is an electrically erasable read-Only Memory, is used to store firmware or configuration data. PCIE slots are used to insert PCIE devices such as network cards, graphics cards, and the like.

In the embodiment of the application, after the server is powered on, the micro control unit starts to work. And the MCU generates a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card. An in-bit signal is a signal indicating whether the corresponding device is properly installed in place.

And the switching multiplexer controls the connection modes of the main board and the data processor unit network card and the expansion board according to the control instruction generated by the MCU. The determination of this connection mode is to identify the device connected in the PCIE slot, that is, determine which component (motherboard or data processor unit network card) will communicate with the PCIE device.

In this way, the system can automatically identify the devices connected to the PCIE slot, and configure a corresponding communication path according to the identification result.

In the embodiment of the application, after the server is powered on, the micro control unit starts to work. And the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card. And the switching multiplexer controls the connection modes of the main board and the data processor unit network card and the expansion board according to the control instruction generated by the micro control unit. The determining of the connection mode can connect the devices in the PCIE slot, that is, determine which component will communicate with the PCIE device, and further identify the PCIE device. The embodiment of the application improves the flexibility and expansibility of the server, and allows the automatic equipment identification and configuration to be realized under different hardware configurations, thereby optimizing the performance and maintenance efficiency of the server.

Optionally, the control unit is specifically configured to:

In the embodiment of the application, the micro control unit receives the in-place signals of the PCIE slot, the expansion board and the data processor unit network card, and generates corresponding control instructions according to the signals.

In the embodiment of the application, the signals are used for indicating whether the PCIE slot, the expansion board and the data processor unit network card are correctly installed in place.

When bit signals of the PCIE slot, the expansion board and the data processor unit network card are all at a low level, the MCU controller sends a first control instruction to the switching multiplexer. The first control instruction instructs the switch multiplexer to connect the second high-speed connector with the PCIE slot, allowing the following signaling:

High-speed PCIE signals, such as data transmission, 100M clock signals, down-conversion signals, reset signals, wake signals, and Wake-up signals, wherein the down-conversion signals are used for adjusting the running frequency of the device.

These signals are transmitted to the data processor unit network card via the second high-speed connector, enabling it to identify and communicate with the devices in the PCIE slot.

In the embodiment of the application, when the in-place signals of the PCIE slot and the expansion board are at a low level and the in-place signals of the data processor unit network card are at a high level, the MCU controller sends a second control instruction.

The second control instruction instructs the switch multiplexer to connect the first high-speed connector with the PCIE slot, allowing signals to be transmitted through the switch multiplexer and the first high-speed connector. These signals are transmitted to the motherboard through the switch multiplexer and the first high-speed connector so that the motherboard can recognize and communicate with the devices in the PCIE slot.

In the embodiment of the application, the server system can automatically adjust the signal route according to the installation state of the hardware component, so as to ensure that PCIE equipment can be identified and used by correct main equipment (a main board or a data processor unit network card). This design increases the flexibility and automation level of the system, allowing for more efficient hardware management and maintenance.

Optionally, the control unit is specifically configured to:

In the embodiment of the application, the control unit is responsible for monitoring the bit signals of the PCIE slot, the expansion board and the data processor unit network card and determining whether to send the control signals to the switching multiplexer according to the bit signals. Signals indicating whether the corresponding component has been properly installed in the server are typically low in bit and high in bit.

When the bit signal of the PCIE slot is at a high level, it indicates that no PCIE device is inserted or that a device is not installed correctly. At this time, the MCU controller does not transmit a control signal because no devices need to be connected.

When the bit signal of the expansion board is at a low level, the expansion board is correctly installed, but when the bit signals of the PCIE slot and the data processor unit network card are at a high level, the devices are incorrectly installed or are not in place. At this time, the MCU controller also does not transmit a control signal because no device can be connected to the expansion board.

When the expansion board bit signal is high, it indicates that the expansion board is not properly installed or is out of bit. In this case, the MCU controller also does not transmit control signals, since the expansion board is a key part for connecting other components.

In the embodiment of the application, the MCU controller realizes intelligent monitoring and control of the hardware configuration of the server, and equipment identification and connection can be performed only under the condition that all key components are correctly installed, so that the safety and the functionality of the system are ensured.

Optionally, the control unit is specifically further configured to:

In the embodiment of the application, when the in-place signals of the expansion board and the PCIE slot are low level, which indicates that the expansion board and the PCIE slot are correctly installed in place, and the in-place signal of the data processor unit network card is high level, which indicates that the expansion board and the PCIE slot are not in place or are incorrectly installed, the MCU controller executes a specific control flow.

The MCU controller sends a control instruction to the switching multiplexer to instruct the switching multiplexer to communicate the first high-speed connector with the PCIE slot, thereby allowing the mainboard to identify the PCIE device through the connection.

The motherboard identifies devices connected to the PCIE slot, which may include detecting device types, configuring device parameters, etc. After the identification is completed, the main board sends a debugging control signal to the MCU controller through the first high-speed connector. These signals may contain specific configuration information or be used to trigger specific system behavior.

After receiving the debugging control signal, the MCU controller latches the debugging control signal. This means that the MCU controller can remember and maintain the state of these signals even after the system is powered down or restarted.

When the server is restarted, the MCU controller controls connection of the main board and the data processor unit network card with the expansion board again according to the configuration indicated by the previously latched debugging control signal. By latching the debug control signal, the system configuration is maintained after the server is restarted, ensuring the durability of the configuration and the stability of the system.

In an alternative embodiment, when debug control or subjective forced matching is performed on the server, that is, when the in-place signals of the expansion board and the PCIE Slot are low level, and the in-place signal of the data processor unit network card is high level, instead, the main board CPU performs PCIE device identification, the CPLD in the main board outputs a debug control signal to the MCU controller through the high-speed connector MCIOA CONN to latch, so that when the server is restarted, the MCU controller outputs an enable signal to control the switch multiplexer to perform channel switching to y=a, so that the high-speed PCIE signal, the 100M clock, the down-conversion signal, the reset signal, and the Wake signal of the PCIE Slot are connected to the high-speed connector MCIOA Conn through the switch multiplexer, the MCU controller switches pcie_slotj2c to mb_i2c, and the MB main board performs PCIE device identification.

In the embodiment of the application, the MCU controller not only performs real-time control when the system is running, but also can memorize specific configuration information and reconfigure hardware connection according to the information after the system is restarted, thereby realizing more flexible and reliable server management.

Fig. 2 is a schematic flow chart of an identification method according to an embodiment of the present application, as shown in fig. 2, including:

Step 210, after the server is powered on, the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board and the data processor unit network card;

and 220, the switch multiplexer controls connection of the main board and the data processor unit network card with the expansion board according to the control instruction so as to determine the identification equipment of the PCIE equipment.

Fig. 3 is a schematic diagram of an identification flow according to an embodiment of the present application, as shown in fig. 3, including:

When the ac power of the server is turned on, the system starts to supply power. The supply voltage powers the MCU controller and the switching multiplexer, enabling these components.

The MCU controller receives three key in-place signals, namely a data processor unit network card in-place signal (data processor unit network card_PRSNT_N), a PCIE Slot in-place signal (PCIE_Slot_PRSNT_N) and an expansion board in-place signal (riser_PRSNT_N).

The MCU controller carries out logic judgment according to the level states of the in-place signals, and the three signals are all low level, which indicates that the data processor unit network card, the PCIE equipment and the expansion board are correctly installed in place. And the MCU controller judges that the data processor unit network card is interconnected with the PCIE equipment.

The MCU controller enables the switching multiplexer and switches it to channel B. Channel B connects to MCIOB Conn connectors, ensuring signal transmission to the data processor unit network card. The MCU controller switches the Slot I2C to the data processor unit network card I2C channel, so as to ensure that the I2C communication path is correctly set. And the data processor unit network card starts to operate and identifies PCIE equipment.

If the data processor unit network card is not in place, but the PCIE slot and expansion board are in place, the MCU controller enables the switch multiplexer and switches to the MCIOA Conn connector. The MCU controller switches Slot I2C to MB I2C, and ensures that the I2C communication path is set correctly.

And the main board is electrified, and the CPU starts to identify PCIE equipment. If the combination of the bit signals does not meet the two conditions, the MCU controller does not perform any operation.

When debug control or subjective forced improvement is performed on the server, namely when the expansion board is in place, the PCIE Slot is in place and the data processor unit network card is in place, instead, when PCIE device identification is performed by the MB motherboard CPU, the motherboard CPLD outputs a debug control signal to the MCU controller through the high-speed connector MCIOA CONN to latch, so that when the server is restarted, the MCU controller outputs an enable signal to control the switching multiplexer to perform channel switching to y=a, so that a high-speed PCIE signal, a 100M clock, a down-conversion signal, a reset signal and a Wake signal of the PCIE Slot are connected to the high-speed connector MCIOA Conn through the switching multiplexer, and the MCU controller switches pcie_slot_i2c to mb_i2c to perform PCIE device identification when the motherboard is powered on.

In the embodiment of the application, the problem that when a client needs to adapt PCIE equipment for both a server and an intelligent network card, the client can only change the configuration by changing the board card and the cable is solved, the flexibility and the expandability of the server configuration are improved, the design workload and the configuration complexity are reduced, the convenience of client application is improved, the requirements of the client on the service can be greatly met, and meanwhile, the configuration of the server can be optimized.

Fig. 4 is a schematic structural diagram of an electronic device according to the present invention, as shown in fig. 4, the electronic device may include a processor (processor) 410, a communication interface (Communications Interface) 420, a memory (memory) 430, and a communication bus 440, where the processor 410, the communication interface 420, and the memory 430 perform communication with each other through the communication bus 440. The processor 410 may call the logic instruction in the memory 430 to execute the identification method, where after the server is powered on, the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board, and the data processor unit network card;

Further, the logic instructions in the memory 430 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. The storage medium includes a U disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, an optical disk, or other various media capable of storing program codes.

In another aspect, the present invention further provides a computer program product, where the computer program product includes a computer program, where the computer program can be stored on a non-transitory computer readable storage medium, and when the computer program is executed by a processor, the computer can execute the identification methods provided by the above methods, where the method includes, after a server is powered on, generating, by the micro control unit, a control instruction according to in-place signals of the PCIE slot, the expansion board, and the data processor unit network card;

In yet another aspect, the present invention further provides a non-transitory computer readable storage medium, on which a computer program is stored, the computer program, when executed by a processor, is implemented to perform the identification method provided by the above methods, where the method includes, after a server is powered on, generating, by the micro control unit, a control instruction according to in-place signals of the PCIE slot, the expansion board, and the data processor unit network card;

The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.

It should be noted that the above-mentioned embodiments are merely for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to the above-mentioned embodiments, it should be understood by those skilled in the art that the technical solution described in the above-mentioned embodiments may be modified or some technical features may be equivalently replaced, and these modifications or substitutions do not make the essence of the corresponding technical solution deviate from the spirit and scope of the technical solution of the embodiments of the present invention.

Claims

1. The equipment identification system is characterized by comprising a main board, an expansion board and a data processor unit network card, wherein the expansion board comprises a first high-speed connector, a second high-speed connector, a switching multiplexer, a micro control unit and a PCIE slot;

2. The device identification system according to claim 1, wherein the control unit is specifically configured to:

3. The device identification system according to claim 1, wherein the control unit is specifically configured to:

4. The device identification system according to claim 1, wherein the control unit is further specifically configured to:

5. The device identification system of claim 1, wherein the expansion board further comprises a power module and an electrically erasable programmable read only memory;

6. An identification method based on the device identification system of any one of the preceding claims 1-5, characterized by comprising:

7. The identification method of claim 6, wherein the micro control unit generates a control instruction according to the in-place signals of the PCIE slot, the expansion board, and the data processor unit network card, including:

8. The method of identification of claim 6, further comprising:

9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the identification method of any one of claims 6 to 8 when the program is executed by the processor.

10. A non-transitory computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when executed by a processor, implements the identification method according to any one of claims 6 to 8.