Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
In describing positional relationships, when an element such as a layer, film or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present unless otherwise indicated. Further, when a layer is referred to as being "under" another layer, it can be directly under, or one or more intervening elements may also be present. It will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening elements may also be present.
Where the terms "comprising," "having," and "including" are used herein, another component may also be added unless explicitly defined terms such as "only," "consisting of," etc., are used. Unless mentioned to the contrary, singular terms may include plural and are not to be construed as being one in number.
It will be understood that, although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present application.
It will be further understood that when interpreting an element, although not explicitly described, the element is intended to include the range of errors which should be within the acceptable limits of deviation from the particular values identified by those skilled in the art. For example, "about," "approximately," or "substantially" may mean within one or more standard deviations, and is not limited herein.
Further, in the specification, the phrase "planar distribution diagram" refers to the drawing when the target portion is viewed from above, and the phrase "cross-sectional diagram" refers to the drawing when the cross section taken by vertically cutting the target portion is viewed from the side.
Moreover, the figures are not drawn to a 1:1 scale, and the relative sizes of elements are drawn in the figures by way of example only and are not necessarily drawn to true scale.
As described in the background art, in order to improve the display performance of the display panel, the brightness adjustment mode of the display panel is gradually changed from the DC mode to the PWM mode, and the PWM mode further includes a low pulse mode and a high pulse mode, in which the light-emitting driving circuit is generally controlled in a multi-pulse mode, however, when the light-emitting driving circuit is controlled in a multi-pulse mode, a problem of poor picture uniformity of a display product is likely to occur. The inventor finds that the reason why the above phenomenon occurs is that when the light-emitting driving circuit adopts the multi-pulse mode, the light-emitting driving circuit drives the pixel circuits in a plurality of rows at the same time, so that the load borne by the light-emitting driving circuit is larger, and a larger voltage drop exists on a first driving power line for providing a first voltage signal for the light-emitting driving circuit, and further, a larger difference exists in the electric potential of the light-emitting driving signal output by each light-emitting driving unit in the light-emitting driving circuit, so that a difference exists in the driving current in each pixel circuit, and the brightness uniformity of the display panel is affected.
Based on the above technical problems, the inventor researches and discovers that the control mode of the scanning driving circuit for providing the scanning signals for each pixel circuit is a low pulse mode, that is, the scanning driving circuit only drives one row of pixel circuits at the same time, the load born by the scanning driving circuit is relatively small, and the voltage drop on the second driving power line for providing the first voltage signals for the scanning driving circuit is relatively small. The application sets at least one first connecting wire connected with the first driving power line and the second driving power line respectively, and because the voltage drop on the second driving power line is relatively smaller, the first voltage signal on the second driving power line is closer to the theoretical value of the first voltage signal, so that the first voltage signal on the second driving power line can pull the first voltage signal on the first driving power line to be closer to the theoretical value of the first voltage signal, thereby relieving the voltage drop on the first driving power line, further relieving the difference of the luminous driving signals output by all luminous driving units in the luminous driving circuit and improving the brightness uniformity of the display panel.
The foregoing is the core idea of the present application, and the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without making any inventive effort are intended to fall within the scope of the present application.
In an exemplary embodiment, referring to fig. 1 and 2, the present application provides a display panel 100, the display panel 100 having a display area AA and a non-display area FA at least partially surrounding the display area AA, the display panel including a light emitting driving circuit 10, a scan driving circuit 20, a first driving power line 31, a second driving power line 32, and at least one first connection trace 33.
The light emission driving circuit 10 includes a plurality of cascaded light emission driving units 11, and an output terminal of the light emission driving unit 11 is used for outputting a light emission control signal. The scan driving circuit 20 includes a plurality of scan driving units 21 in cascade, and an output terminal of the scan driving unit 21 is used for outputting a scan signal. The first driving power line 31 is connected to each light emitting driving unit 11, and is used for transmitting a first voltage signal to each light emitting driving unit 11. The second driving power lines 32 are respectively connected to the scan driving units 21, and are used for transmitting the first voltage signals to the scan driving units 21. At least one first connection trace 33, two ends of the first connection trace 33 are respectively connected with the first driving power line 31 and the second driving power line 32, wherein the first connection trace 33 is located in a non-display area FA where the light-emitting driving circuit 11 and the scanning driving circuit 21 are located.
It can be understood that the display area AA of the display panel 100 has a plurality of rows of pixel circuits 40, each light-emitting driving unit 11 and each scanning driving unit 21 are located in the non-display area FA at one side of the display area AA, the light-emitting driving unit 11 can provide light-emitting control signals for the pixel circuits 40, and the scanning driving unit 21 can provide scanning signals for the pixel circuits 40.
In one example, referring to fig. 1, each light-emitting driving unit 11 provides a light-emitting control signal to a row of pixel circuits 40, and each scanning driving unit 21 provides a scanning signal to a row of pixel circuits 40. In another example, referring to fig. 2, each light-emitting driving unit 11 provides light-emitting control signals to two adjacent rows of pixel circuits 40, and each scanning driving unit 21 provides scanning signals to one row of pixel circuits 40.
In one data refresh frame, the light-emitting driving circuit 10 may include N pulses, and when the light-emitting control signal in one data refresh frame includes only 1 pulse, i.e., n=1, the light-emitting driving circuit 10 is in a low pulse mode, each light-emitting driving unit 11 respectively supplies the light-emitting control signal to one row of the pixel circuits 40, the light-emitting driving circuit 10 only needs to drive one row of the pixel circuits 40 at the same time, and each light-emitting driving unit 11 respectively supplies the light-emitting control signal to two adjacent rows of the pixel circuits 40, the light-emitting driving circuit 10 only needs to drive two rows of the pixel circuits 40 at the same time.
When the light-emitting driving circuit 10 in one data refresh frame includes a plurality of pulses, i.e., N >1, the light-emitting driving circuit 10 is in a high pulse mode, and the light-emitting driving circuit 10 needs to drive N rows of the pixel circuits 40 at the same time in the case where each light-emitting driving unit 11 supplies a light-emitting control signal to one row of the pixel circuits 40, and the light-emitting driving circuit 10 needs to drive 2N rows of the pixel circuits 40 at the same time in the case where each light-emitting driving unit 11 supplies a light-emitting control signal to two adjacent rows of the pixel circuits 40.
It can be seen that, when the light-emitting driving circuit 10 is in the low pulse mode, the number of rows of the pixel circuits 40 to be driven by the light-emitting driving circuit 10 at the same time is smaller, and when the light-emitting driving circuit 10 is in the high pulse mode, the number of rows of the pixel circuits 40 to be driven by the light-emitting driving circuit 10 at the same time is larger, resulting in a larger load borne by the light-emitting driving circuit 10 in the high pulse mode, the first driving power line 31 is used for providing the first voltage signal to the light-emitting driving circuit 10, and when the load borne by the light-emitting driving circuit 10 is larger, the voltage drop on the first driving power line 31 is larger. Therefore, when the light-emitting driving circuit 10 is in the high pulse mode, the first driving power line 31 provides the first voltage signal to each light-emitting driving unit 11 with a larger difference, and the light-emitting driving units 11 output the light-emitting control signals with a larger difference in potential, so that the driving currents in the pixel circuits have a larger difference, and the brightness uniformity of the display panel is poor.
Taking one scan driving unit as an example, each scan driving unit 21 respectively provides a scan signal for a row of pixel circuits 40, in one data refresh frame, the scan driving circuit 20 only includes 1 pulse, that is, the scan driving circuit 20 only needs to drive a row of pixel circuits 40 in the same time, so the load of the scan driving circuit 20 is smaller, the voltage drop on the second driving power line 32 providing the first voltage signal for the scan driving circuit 20 is smaller, the magnitude of the first voltage signal provided by the second driving power line 32 for each scan driving unit 21 is almost close to the set value of the first voltage signal, the magnitude of the first voltage signal received by each scan driving unit 21 is almost not different, so the first connecting trace 33 is provided in the application, the first driving power line 31 is connected with the second driving power line 32 through the first connecting trace 33, the first voltage signal on the second driving power line 32 pulls the first voltage signal on the first driving power line 31 to be close to the set value of the first voltage signal, and the magnitude of the light-emitting control signal output by each light-emitting driving unit 11 is smaller, and the uniformity of the brightness of the pixels is improved.
The display panel comprises a light-emitting driving circuit, a scanning driving circuit, a first driving power line, a second driving power line and at least one first connecting wire, wherein the light-emitting driving circuit is internally provided with a plurality of light-emitting driving units, the output ends of the light-emitting driving units are used for outputting light-emitting control signals, the first driving power line is respectively connected with each light-emitting driving unit and is used for transmitting first voltage signals to each light-emitting driving unit, the scanning driving circuit is internally provided with a plurality of cascaded scanning driving units, the output ends of the scanning driving units are used for outputting scanning signals, the second driving power line is respectively connected with each scanning driving unit and is used for transmitting the first voltage signals to each scanning driving unit, two ends of the first connecting wire are respectively connected with the first driving power line and the second driving power line, the first connecting wire is positioned in a non-display area where the light-emitting driving circuit and the scanning driving circuit are positioned, the first driving power line and the second driving power line are connected through the first connecting wire, the first voltage signal on the first driving power line is pulled to the first voltage signal on the first driving power line and the second driving power line to the first voltage signal on the first driving power line, and the first voltage signal on the second driving power line is uniform, and the voltage drop on the first driving power line and the first voltage signal on the first driving power line is uniform.
In one example, referring to fig. 3 and 4, fig. 3 is a circuit configuration diagram of a light emitting driving unit. As can be seen from fig. 3, the light-emitting driving unit 11 includes transistors M1 to M11, capacitors C1 to C4, a first power terminal P1 and a second power terminal P2. In this example, the first power source terminal P1 of the light-emitting driving unit is taken as a port for receiving the first electrical signal VGH, and the second power source terminal P2 of the light-emitting driving unit is taken as a port for receiving the second electrical signal VGL. The first end of the transistor M9, the first end of the capacitor C2, the first end of the transistor M8, the first end of the capacitor C4, and the first end of the transistor M5 are all connected to the first power supply terminal P1, so as to receive the first electrical signal VGH through the first power supply terminal P1, the second end of the transistor M10 and the second end of the transistor M3 are all connected to the second power supply terminal P2, so as to receive the second electrical signal VGL through the second power supply terminal P2, and the first end of the transistor M10 is connected to the second end of the transistor M9, so that the light emission control signal EM output by the output node N1 can be controlled to be the first electrical signal VGH or the second electrical signal VGL by controlling the on/off of each transistor in the light emission driving unit 11.
Fig. 4 is a circuit diagram of a scan driving unit 21, and as can be seen from fig. 4, the scan driving unit 21 includes transistors T1-1 to T8, capacitors C5 to C6, a first power terminal P3 and a second power terminal P4. In this example, taking the first power supply terminal P3 of the scan driving unit as a port for receiving the first electrical signal VGH, the second power supply terminal P4 of the scan driving unit as a port for receiving the second electrical signal VGL as an example, wherein the first terminal of the transistor T7, the first terminal of the capacitor C5 and the first terminal of the transistor T5 are all connected with the first power supply terminal P3 to receive the first electrical signal VGH through the first power supply terminal P3, the first terminal of the transistor T3 and the control terminal of the transistor T6 are all connected with the second power supply terminal P4 to receive the second electrical signal VGL through the second power supply terminal P4, the second terminal of the transistor T7 is connected with the first terminal of the transistor T8, the second terminal of the transistor T7 is used for receiving the third electrical signal XCK, and the scan signal Gn output by the output node N2 can be controlled to be the first electrical signal VGH or the third electrical signal XCK by controlling the on-off of each transistor in the scan driving unit 21. The first electrical signal VGH is a high level signal, the second electrical signal VGL is a low level signal, and the third electrical signal XCK is a pulse signal.
In application, the first voltage signal may be one of the first electrical signal VGH or the second electrical signal VGL. In the case where the first voltage signal is the first electric signal VGH, the first power supply terminal P1 of the light emission driving unit 11 is connected to the first driving power supply line 31, and the first power supply terminal P3 of the scan driving unit 21 is connected to the second driving power supply line 32. In the case where the first voltage signal is the second electric signal VGL, the second power source terminal P2 of the light emission driving unit 11 is connected to the first driving power source line 31, and the second power source terminal P4 of the scan driving unit 21 is connected to the second driving power source line 32.
In an exemplary embodiment, the first driving power lines 31 are respectively connected to the first power terminals P1 of the light emitting driving units 11, the second driving power lines 32 are respectively connected to the first power terminals P3 of the scan driving units 21, wherein the first ends of the first connection traces 33 are connected to first nodes of the first driving power lines 31, the second ends of the first connection traces 33 are connected to first nodes of the second driving power lines 32, the first nodes of the first driving power lines 31 are connected to the first power terminals P1 of the i-th stage light emitting driving units 11, and the first nodes of the second driving power lines 32 are connected to the first power terminals P3 of the i-th stage scan driving units 21, wherein 1 i n is the number of stages of scan driving units or light emitting driving units.
In this embodiment, referring to fig. 5, each light-emitting driving unit 11 provides a light-emitting control signal to a row of pixel circuits 40, and each scanning driving unit 21 provides a scanning signal to a row of pixel circuits 40. In the case where n rows of the pixel circuits 40 are included in the display panel, n-stage light emission driving units 11 and n-stage scan driving units 21 are included in the display panel. Taking the first voltage signal as an example of the first electrical signal VGH, each first node S1 of the first driving power line 31 is connected to the first power terminal P1 of the corresponding light-emitting driving unit 11, that is, the first node S1 of the first driving power line 31 is connected to the first terminals of the transistor M5, the capacitor C2, the capacitor C4, the transistor M8 and the transistor M9 in the light-emitting driving unit 11 through the corresponding first power terminal P1, so as to provide the first electrical signal VGH for the light-emitting driving unit 11, and each first node S2 of the second driving power line 32 is connected to the first power terminal P3 of the corresponding scan driving unit 21, that is, the first node S2 of the second driving power line 32 is connected to the first terminals of the transistor T2, the capacitor C5 and the transistor T7 in the scan driving unit 21 through the corresponding first power terminal P3, so as to provide the first electrical signal VGH for the scan driving unit 21.
When the light-emitting driving circuit 10 is in the high pulse mode, a large voltage drop is generated on the first driving power line 31, which results in a large difference between the electric potentials of the first nodes S1 on the first driving power line 31, and further results in a large difference between the magnitudes of the first voltage signals received by the light-emitting driving units 11, for example, the theoretical value of the first voltage signals is 5V, and due to the large voltage drop generated on the first driving power line 31, the first voltage signals received by the first-stage light-emitting driving unit 11 may be 5V, the first voltage signals received by the second-stage light-emitting driving unit 11 are 4.95V, the first voltage signals received by the third-stage light-emitting driving unit 11 are 4.9V, the first voltage signals received by the i-th-stage light-emitting driving unit 11 are 4.7V, and the first voltage signals received by the n-th-stage light-emitting driving unit 11 are 4.5V. Since the scan driving circuit 20 is in the low pulse mode, the potential difference at each first node S2 on the second driving power line 32 is small, and the potential difference at each first node S2 on the second driving power line 32 is not considered under the condition of not considering the voltage drop caused by the self resistance of the second driving power line 32, for example, the potential at each first node S2 on the second driving power line 32 is 5V, and the first end of the first connecting trace 33 is connected with the first node S1 of the first driving power line 31, and the second end of the first connecting trace 33 is connected with the first node S2 of the second driving power line 32, so that the potential difference at each first node S1 on the first driving power line 31 is reduced or eliminated, and the difference of the magnitude of the first voltage signal received by each light-emitting driving unit 11 is ensured, and is close to the theoretical value of the first voltage signal, thereby improving the uniformity of the display panel.
In application, m first connection wires 33 may be disposed in the display panel, the number m of the first connection wires 33 may be less than or equal to the number n of the scan driving unit 21 or the light emitting driving unit 11, that is, m is less than or equal to n, and the first ends of the first connection wires 33 are respectively different from the connection nodes of the first driving power lines 31, and the second ends of the first connection wires 33 are respectively different from the connection nodes of the second driving power lines 32. For example, the display panel includes 2000 rows of pixel units, that is, the display panel includes 2000-stage light-emitting driving units 11 and 2000-stage scanning driving units 21, 2000 first nodes S1 may be disposed on the first driving power line 31, 2000 first nodes S2 may be disposed on the second driving power line 32, each first node S1 on the first driving power line 31 may be correspondingly connected to the first power end P1 of each light-emitting driving unit 11, each first node S2 on the second driving power line 32 may be correspondingly connected to the first power end P3 of each scanning driving unit 21, each first node S1 of the first driving power line 31 and each first node S2 of the second driving power line 32 may be correspondingly connected through the first connection trace 33, and 2000 first connection traces 33 may be disposed in the display panel.
In another example, 20 first nodes S1 may be disposed on the first driving power line 31, 20 first nodes S2 may be disposed on the second driving power line 32, the first node S1 on the first driving power line 31 is connected to the first power terminal P1 of the first 100-stage light-emitting driving unit 11, the second first node S1 on the first driving power line 31 is connected to the first power terminal P1 of the first 200-stage light-emitting driving unit 11, the first 20 first node S1 on the first driving power line 31 is connected to the first power terminal P1 of the first 2000-stage light-emitting driving unit 11, and similarly, the first node S2 on the second driving power line 32 is connected to the first power terminal P3 of the first 100-stage light-emitting driving unit 21, the second first node S2 on the second driving power line 32 is connected to the first power terminal P3 of the first 200-stage light-emitting driving unit 21, the first 20 first node S1 on the second driving power line 32 is connected to the first power terminal P3 of the first 100-stage light-emitting driving unit 21, and the second 20-stage light-emitting driving unit 21 is connected to the first power source terminal P1 of the first power line 33 through the first power lines of the first power line 33.
In an exemplary embodiment, the first driving power lines 31 are respectively connected to the first power terminals P1 of the light emitting driving units 11, the second driving power lines 32 are respectively connected to the first power terminals P3 of the scan driving units 21, wherein the first ends of the first connecting wires 33 are connected to the first nodes S1 of the first driving power lines 31, the second ends of the first connecting wires 33 are connected to the first nodes S2 of the second driving power lines 32, the first nodes S1 of the first driving power lines 31 are connected to the first power terminals of the i-th stage light emitting driving units 11, the first nodes S2 of the second driving power lines 32 are connected to the first power terminals of the 2 i-th stage scan driving units 21, wherein 1 i≤n, where n is the number of stages of light emitting driving units, and 2n is the number of stages of scan driving units.
In this embodiment, referring to fig. 6, each light-emitting driving unit 11 provides light-emitting control signals for adjacent rows of pixel circuits 40, and each scanning driving unit 21 provides scanning signals for one row of pixel circuits 40. In the case where the 2n rows of pixel circuits 40 are included in the display panel, the n-stage light emission driving unit 11 and the 2 n-stage scan driving unit 21 are included in the display panel. Still taking the first voltage signal as an example of the first electrical signal VGH, each first node S1 of the first driving power line 31 is respectively connected to the first power terminal P1 of the corresponding light-emitting driving unit 11 to provide the first electrical signal VGH for each light-emitting driving unit 11, and each second driving power line 32 is respectively connected to the first power terminal P3 of the corresponding scanning driving unit 21 to provide the first electrical signal VGH for each scanning driving unit 21. In the application, the first end of the first connection wire 33 is connected with the first node S1 of the first driving power line 31, and the second end of the first connection wire 33 is connected with the first node S2 of the second driving power line 32, so that the potential of each first node S1 is correspondingly raised by each first node S2, the potential difference of each first node S1 on the first driving power line 31 is reduced or eliminated, and the difference of the magnitudes of the first voltage signals received by each light-emitting driving unit 11 is smaller or no, and is close to the theoretical value of the first voltage signals, thereby improving the uniformity of the display panel.
In application, m first connection wires 33 may be disposed in the display panel, the number m of the first connection wires 33 may be less than or equal to the number of stages 2n of the scan driving unit 21, that is, m is less than or equal to 2n, and the first ends of the first connection wires 33 are respectively different from the connection nodes of the first driving power lines 31, and the second ends of the first connection wires 33 are respectively different from the connection nodes of the second driving power lines 32. For example, the display panel includes 2000 rows of pixel units, that is, the display panel includes 1000-stage light-emitting driving units 11 and 2000-stage scanning driving units 21, 1000 first nodes S1 may be disposed on the first driving power line 31, 1000 first nodes S2 may be disposed on the second driving power line 32, each first node S1 on the first driving power line 31 is correspondingly connected to a first power supply terminal P1 of each light-emitting driving unit 11, each first node S2 of the second driving power line 32 is correspondingly connected to a first power supply terminal P3 of a part of the scanning driving units 21, for example, a first node S2 of the second driving power line 32 is connected to a first power supply terminal P3 of the second scanning driving unit 21, a second first node S2 of the second driving power line 32 is connected to a first power supply terminal P3 of the fourth scanning driving unit 21, a first 1000 first node S2 of the second driving power line 32 is correspondingly connected to a first power supply terminal P3 of the first scanning driving unit 21, and then the first nodes S33 are disposed in the first driving power line 32 through the corresponding first nodes S33.
In an exemplary embodiment, referring to fig. 7 and 8, the display panel 100 further includes a third driving power line 34, a fourth driving power line 35, and at least one second connection trace 36.
The third driving power line 34 is connected to each light emitting driving unit 11, and is used for transmitting a second voltage signal to each light emitting driving unit 11. The fourth driving power line 35 is connected to each of the scan driving units 21, and is used for transmitting the second voltage signal to each of the scan driving units 21. The second connecting trace 36 is connected to the third driving power line 34 and the fourth driving power line 35 at two ends thereof. The second connection trace 36 is located in a non-display area where the light-emitting driving circuit 10 and the scan driving circuit 20 are located, one of the first voltage signal and the second voltage signal is a high-level signal, and the other is a low-level signal.
Fig. 7 is a circuit configuration diagram of a display panel in which each light emission driving unit 11 supplies a light emission control signal to one row of pixel circuits 40, each scanning driving unit 21 supplies a scanning signal to one row of pixel circuits 40, and fig. 8 is a circuit configuration diagram of a display panel in which each light emission driving unit 11 supplies a light emission control signal to two adjacent rows of pixel circuits 40, and each scanning driving unit 21 supplies a scanning signal to one row of pixel circuits 40. When the light emission driving circuit 10 is in the high pulse mode, the light emission driving circuit 10 needs to drive N rows of pixel circuits 40 at the same time in the case where each light emission driving unit 11 supplies a light emission control signal to one row of pixel circuits 40, and the light emission driving circuit 10 needs to drive 2N rows of pixel circuits 40 at the same time in the case where each light emission driving unit 11 supplies a light emission control signal to two adjacent rows of pixel circuits 40.
Similarly, there is a larger voltage drop on the third driving power line 34 that provides the second voltage signal for the light-emitting driving circuit 10, the difference of the magnitude of the second voltage signal provided by the third driving power line 34 for each light-emitting driving unit 11 is larger, and further, the difference of the potential magnitude of the light-emitting control signal output by each light-emitting driving unit 11 is larger, so that there is a larger difference of the driving current in each pixel circuit, and the brightness uniformity of the display panel is worse.
Therefore, the second connection trace 36 is provided in the present application, the third driving power line 34 is connected to the fourth driving power line 35 through the second connection trace 36, so that the second voltage signal on the fourth driving power line 35 pulls the second voltage signal on the third driving power line 34 to be close to the set value of the second voltage signal, and further the difference of the electric potential of the light emission control signals outputted by the light emission driving units 11 is smaller, so that the difference of the driving currents in the pixel circuits is smaller, and the brightness uniformity of the display panel is improved.
In an exemplary embodiment, referring to fig. 9, the third driving power line 34 is connected to the second power end P2 of each light emitting driving unit 44, the fourth driving power line 35 is connected to the second power end P4 of each scanning driving unit 21, wherein the first end of the second connecting trace 36 is connected to the first node S3 of the third driving power line 34, the second end of the second connecting trace 36 is connected to the first node S4 of the fourth driving power line 35, the first node S3 of the third driving power line 34 is connected to the second power end of the ith light emitting driving unit 11, and the first node S4 of the fourth driving power line 35 is connected to the second power end of the ith scanning driving unit 21, wherein 1≤i≤n, where n is the number of stages of scanning driving units or light emitting driving units.
In this embodiment, the first voltage signal is taken as the first electrical signal VGH, the second voltage signal is taken as the second electrical signal VGL, that is, the first voltage signal is taken as the high level signal, and the second voltage signal is taken as the low level signal for illustration. Referring to fig. 3,4 and 9, each first node S3 of the third driving power line 34 is connected to the second power terminal P2 of the corresponding light-emitting driving unit 11, that is, the first node S3 of the third driving power line 34 is connected to the transistor M3 of the light-emitting driving unit 11 and the second terminal of the transistor M10 through the corresponding second power terminal P2 to provide the second electric signal VGL for the light-emitting driving unit 11, while each first node S4 of the fourth driving power line 35 is connected to the second power terminal P4 of the corresponding scan driving unit 21, that is, the first node S2 of the second driving power line 32 is connected to the second terminal of the transistor T3 and the control terminal of the transistor T6 of the corresponding scan driving unit 21 through the second power terminal P4 to provide the second electric signal VGL for the scan driving unit 21.
When the light-emitting driving circuit 10 is in the high pulse mode, a larger voltage drop is generated on the third driving power line 34, resulting in a larger difference between the potentials of the first nodes S3 on the third driving power line 34, and thus, a larger difference between the magnitudes of the second voltage signals received by the light-emitting driving units 11. For example, the theoretical value of the second voltage signal is-5V, which may result in that the second voltage signal received by the first stage light emitting driving unit 11 is-5V, the second voltage signal received by the second stage light emitting driving unit 11 is-4.95V, the second voltage signal received by the third stage light emitting driving unit 11 is-4.9V, the second voltage signal received by the i-th stage light emitting driving unit 11 is-4.7V, the second voltage signal received by the n-th stage light emitting driving unit 11 is-4.5V due to the large voltage drop generated on the first driving power line 31. Since the scan driving circuit 20 is in the low pulse mode, the potential difference at each first node S4 on the fourth driving power line 35 is small, and the potential difference at each first node S4 on the fourth driving power line 35 is not considered under the condition of not considering the voltage drop caused by the self resistance of the fourth driving power line 35, for example, the potential at each first node S4 on the fourth driving power line 35 is-5V, the first end of the second connecting trace 36 is connected with the first node S3 of the third driving power line 34, the second end of the second connecting trace 36 is connected with the first node S4 of the fourth driving power line 35, so that the potential difference at each first node S3 on the third driving power line 34 is reduced or eliminated, and further, the small or no difference in the magnitude of the second voltage signal received by each light-emitting driving unit 11 is ensured, and the theoretical difference in the magnitude of the second voltage signal is approximate to the second voltage signal is ensured, thereby improving the uniformity of the display panel.
In application, k second connection wires 36 may be disposed in the display panel, where the number k of the second connection wires 36 may be less than or equal to the number n of the scan driving unit 21 or the light emitting driving unit 11, that is, m is less than or equal to n, and the first ends of the second connection wires 36 are respectively different from the connection nodes of the third driving power line 34, and the second ends of the second connection wires 36 are respectively different from the connection nodes of the fourth driving power line 35. For example, the display panel includes 2000 rows of pixel units, that is, the display panel includes 2000 stages of light-emitting driving units 11 and 2000 stages of scanning driving units 21, 2000 first nodes S3 may be disposed on the third driving power line 34, 2000 first nodes S4 may be disposed on the fourth driving power line 35, each first node S3 on the third driving power line 34 may be correspondingly connected to the second power end P2 of each stage of light-emitting driving unit 11, each first node S4 of the fourth driving power line 35 may be correspondingly connected to the second power end P4 of each stage of scanning driving units 21, and then 2000 second connecting wires 36 may be disposed in the display panel by correspondingly connecting each first node S3 on the third driving power line 34 and each first node S4 of the fourth driving power line 35 through a plurality of second connecting wires 36.
In another example, 20 first nodes S3 may be disposed on the third driving power line 34, 20 first nodes S4 may be disposed on the fourth driving power line 35, the first node S3 on the third driving power line 34 may be connected to the second power terminal P2 of the 100 th stage light-emitting driving unit 11, the second first node S3 on the third driving power line 34 may be connected to the second power terminal P2 of the 200 th stage light-emitting driving unit 11, the 20 th first node S3 on the third driving power line 34 may be connected to the second power terminal P2 of the 2000 th stage light-emitting driving unit 11, and similarly, the first node S4 on the fourth driving power line 35 may be connected to the second power terminal P4 of the 100 th stage light-emitting driving unit 21, the second first node S4 on the fourth driving power line 35 may be connected to the second power terminal P4 of the 200 th stage light-emitting driving unit 21, the 20 th first node S3 on the fourth driving power line 35 may be connected to the second power terminal P4 of the fourth driving power line 35, and the fourth driving power line 20 may be connected to the second power terminal P4 of the fourth driving unit 20S 4 through the second power line 35.
In an exemplary embodiment, the third driving power line 34 is connected to the second power terminal of each light emitting driving unit 11, the fourth driving power line 35 is connected to the second power terminal of each scanning driving unit 21, wherein the first terminal of the second connecting trace 36 is connected to the first node S3 of the third driving power line 34, the second terminal of the second connecting trace 36 is connected to the first node S4 of the fourth driving power line 35, the first node S3 of the third driving power line 34 is connected to the second power terminal P2 of the ith light emitting driving unit 11, the first node S4 of the fourth driving power line 35 is connected to the second power terminal P4 of the 2 nd i stage scanning driving unit 21, wherein 1 i≤n, where n is the number of stages of light emitting driving units, and 2n is the number of stages of scanning driving units.
In this embodiment, referring to fig. 10, each light-emitting driving unit 11 provides light-emitting control signals for adjacent rows of pixel circuits 40, each scanning driving unit 21 provides scanning signals for one row of pixel circuits 40, and in the case that 2n rows of pixel circuits 40 are included in the display panel, n-stage light-emitting driving units 11 and 2 n-stage scanning driving units 21 are included in the display panel. Each first node S3 of the third driving power line 34 is connected to the second power terminal P2 of the corresponding light emitting driving unit 11 to provide the second electrical signal VGL for each light emitting driving unit 11, and each fourth driving power line 35 is connected to the second power terminal P4 of the corresponding scan driving unit 21 to provide the second electrical signal VGL for each scan driving unit 21. In the application, the first end of the second connection trace 36 is connected with the first node S3 of the third driving power line 34, and the second end of the second connection trace 36 is connected with the first node S4 of the fourth driving power line 35, so that the potential of each first node S3 is correspondingly lowered by each first node S4, the potential difference of each first node S3 on the third driving power line 34 is reduced or eliminated, and the difference of the second voltage signals received by each light-emitting driving unit 11 is smaller or no, and is close to the theoretical value of the second voltage signals, thereby improving the uniformity of the display panel.
In application, k second connection wires 36 may be disposed in the display panel, where the number k of the second connection wires 36 may be less than or equal to the number of stages 2n of the scan driving unit 21, that is, m is less than or equal to 2n, and the first ends of the second connection wires 36 are respectively different from the connection nodes of the third driving power line 34, and the second ends of the second connection wires 36 are respectively different from the connection nodes of the fourth driving power line 35. For example, the display panel includes 2000 rows of pixel units, that is, the display panel includes 1000-stage light-emitting driving units 11 and 2000-stage scanning driving units 21, 1000 first nodes S3 may be disposed on the third driving power line 34, 1000 first nodes S4 may be disposed on the fourth driving power line 35, each first node S3 on the third driving power line 34 may be correspondingly connected to a second power supply terminal of each stage of light-emitting driving unit 11, and each first node S4 of the fourth driving power line 35 may be correspondingly connected to a second power supply terminal of a part of the scanning driving units 21. For example, the first node S4 of the fourth driving power line 35 is connected to the second power source terminal of the first stage scan driving unit 21, the second first node S4 of the fourth driving power line 35 is connected to the second power source terminal of the third stage scan driving unit 21, the 1000 th first node S4 of the fourth driving power line 35 is connected to the second power source terminal of the 1999 th stage scan driving unit 21, and then the first nodes S3 of the third driving power line 34 and the first nodes S4 of the fourth driving power line 35 are correspondingly connected by the second connection trace 36, so that 1000 second connection traces 36 can be provided in the display panel. Wherein, each second connection trace 36 may be disposed in parallel.
In an exemplary embodiment, referring to fig. 9, the first connection trace 33 and the second connection trace 36 may be disposed in a one-to-one correspondence, and two ends of the corresponding first connection trace 33 and two ends of the corresponding second connection trace 36 are respectively connected to the first power source P1 of the light emitting driving unit 11, the first power source P3 of the scan driving unit 21, the second power source P2 of the light emitting driving unit 11, and the second power source P4 of the scan driving unit 21 of the same stage. The first connection trace 33 has two ends respectively connected to the first power end P1 of the first-stage light-emitting driving unit 11 and the first power end P3 of the first-stage scanning driving unit 21, a second connection trace 36 has two ends respectively connected to the second power end P2 of the first-stage light-emitting driving unit 11 and the second power end P4 of the first-stage scanning driving unit 21, the first connection trace 33 has two ends respectively connected to the first power end P1 of the second-stage light-emitting driving unit 11 and the first power end P3 of the second-stage scanning driving unit 21, and the second connection trace 36 has two ends respectively connected to the second power end P2 of the second-stage light-emitting driving unit 11 and the second power end P4 of the second-stage scanning driving unit 21. The first connection trace 33 has two ends respectively connected to the first power end P1 of the nth-stage light-emitting driving unit 11 and the first power end P3 of the nth-stage scanning driving unit 21, and the second connection trace 36 has two ends respectively connected to the second power end P2 of the second-stage light-emitting driving unit 11 and the second power end P4 of the nth-stage scanning driving unit 21.
In application, referring to fig. 10, the first connection trace 33 and the second connection trace 36 may not be disposed in a one-to-one correspondence. For example, each light-emitting driving unit 11 provides light-emitting control signals for adjacent rows of pixel circuits 40, each scanning driving unit 21 provides scanning signals for one row of pixel circuits 40, the display panel comprises 2000 rows of pixel units, namely, the display panel comprises 1000-stage light-emitting driving units 11 and 2000-stage scanning driving units 21, two ends of a first connecting wire 33 can be respectively connected with a first power end P1 of the first-stage light-emitting driving unit 11 and a first power end P3 of the second-stage scanning driving unit 21, two ends of a first connecting wire 36 are respectively connected with a second power end P2 of the first-stage light-emitting driving unit 11 and a second power end P4 of the first-stage scanning driving unit 21, two ends of the first connecting wire 33 are respectively connected with the first power end P1 of the second-stage light-emitting driving unit 11 and the first power end P3 of the fourth-stage scanning driving unit 21, two ends of the second connecting wire 36 are respectively connected with the second power end P2 of the second-stage light-emitting driving unit 11, the second power end P4 of the third-stage scanning driving unit 21 is respectively connected with the first power end P1 of the first-stage light-emitting driving unit 11, and the second power end 3 of the first-stage scanning driving unit 21, and two ends of the first connecting wire 33 are respectively connected with the first power ends of the first power end 21. Wherein the first connection trace 33 and the second connection trace 36 may be arranged in the same layer.
In one exemplary embodiment, referring to fig. 11, a display panel includes a substrate 51, an array layer 52, and a first metal layer 53. The array layer 52 is disposed on one side of the substrate 51, and the array layer 52 includes the light emission driving circuit 10 and the scan driving circuit 20. The first metal layer 53 includes the first driving power line 31, the second driving power line 32, and the first connection trace 33. The first metal layer 53 may further include a third driving power line 34, a fourth driving power line 35, and a second connection trace 36.
In application, the first driving power line 31, the second driving power line 32, the third driving power line 34 and the fourth driving power line 35 are all disposed in the metal structure M3 in the first metal layer 53, and the first connecting trace 33 and the second connecting trace 36 may be disposed directly on the first metal layer 53, so as to connect the first driving power line 31 and the second driving power line 32, and connect the third driving power line 34 and the fourth driving power line 35.
In one exemplary embodiment, referring to fig. 12, the display panel includes a substrate 51, an array layer 52, a first metal layer 53, and a connection trace layer 54.
The array layer 52 is disposed on one side of the substrate 51, and the array layer 52 includes the light emission driving circuit 10 and the scan driving circuit 20. The first metal layer 53 includes the first driving power line 31, the second driving power line 32, the third driving power line 34, and the fourth driving power line 35. The connection trace layer 54 is disposed different from the first metal layer 53, and the connection trace layer 54 includes at least one first connection trace 33 and at least one second connection trace 36.
In addition to the scheme that the first driving power line 31 and the second driving power line 32 are directly connected in the first metal layer 53 and the scheme that the third driving power line 34 and the fourth driving power line 352 are directly connected in the first metal layer 53, a connection routing layer 54 can be added in the display panel, the connection routing layer 54 can be located between the substrate 51 and the array layer 52, the first driving power line 31 and the second driving power line 32 in the first metal layer 53 can be connected with the first connection routing 33 in the connection routing layer 54 through vias, and similarly, the third driving power line 34 and the fourth driving power line 35 in the first metal layer 53 can be connected with the second connection routing 36 in the connection routing layer 54 through vias.
Wherein, the orthographic projection of the at least one first connection trace 33 on the substrate 51 overlaps with the orthographic projection of the channel of the at least one transistor in the array layer 52 on the substrate 51, and/or the orthographic projection of the at least one second connection trace 36 on the substrate 51 overlaps with the orthographic projection of the channel of the at least one transistor in the array layer 52 on the substrate 51, so as to prevent the transistor in the array layer 52 from being subjected to the influence of light, charged particles, etc. to generate the characteristic change.
In an exemplary embodiment, referring to fig. 13, the connection trace layer 54 further includes a light shielding structure, where an orthographic projection of the light shielding structure on the substrate overlaps an orthographic projection of a channel of at least one transistor in the array layer 51 on the substrate 51.
It will be appreciated that a light shielding layer BSM is typically disposed in the display panel, and the light shielding layer BSM is disposed between the substrate 51 and the array layer 52, and has a light shielding structure capable of shielding bottom reflection light, so as to protect the transistors in the array layer 52 and prevent the transistors in the array layer 52 from being subjected to characteristics changes due to the influence of light, charged particles, etc. In application, the light shielding layer BSM may be directly multiplexed as the connection trace layer 54, in one example, the light shielding structure may be directly multiplexed as the first connection trace 33 and/or the second connection trace 36, and in another example, the first connection trace 33 and the second connection trace 36 may be additionally provided in the light shielding layer BSM, i.e., the connection trace layer 54, i.e., the light shielding structure may not be multiplexed as the first connection trace 33 and the second connection trace 36.
Based on the same application conception, the embodiment of the application also provides a display device. Fig. 14 is a schematic structural diagram of a display device 200 according to an embodiment of the present application, and as shown in fig. 14, the display device 200 includes the display panel 100 according to any of the above embodiments. Illustratively, as shown in fig. 14, the display device 200 includes a display panel 100. Therefore, the display device 200 also has the advantages of the display panel 100 in the above embodiment, and the same points can be understood by referring to the explanation of the display panel 100, which is not described in detail below.
The display device 200 provided in the embodiment of the present application may be a mobile phone as shown in fig. 14, or any electronic product with a display function, including but not limited to a television, a notebook computer, a desktop display, a tablet computer, a digital camera, a smart bracelet, a smart glasses, a vehicle-mounted display, an industrial control device, a medical display screen, a touch interaction terminal, etc., which is not particularly limited in the embodiment of the present application.
In the description of the present specification, reference to the terms "some embodiments," "other embodiments," "desired embodiments," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.