CN1178285C - Method for packaging integrated circuit by printing - Google Patents

Abstract

The present invention relates to a method for assembling an integrated circuit by printing. After a chip including solder bumps is placed on a substrate, a sealant is then filled into the gap between the chip and the substrate by printing using a stencil of the present invention to fix the chip on the substrate. The pattern and speed of the sealant entering the gap between the chip and the substrate are controlled by the mesh distribution density and pattern design on the stencil of the present invention to avoid the generation of voids inside the sealant between the chip and the substrate after the integrated circuit assembly structure is formed, thereby reducing the performance and quality of the assembled integrated circuit.

Description

Method for structuring integrated circuits by printing

technical field

The invention relates to a method for assembling an integrated circuit by printing, so as to avoid air holes in the sealant between the chip and the substrate to reduce the performance and quality of the integrated circuit after the integrated circuit is formed.

Background technique

Integrated circuits generally need to be constructed within a package material, such as the traditional Quad Flat Package (QFP). The flat assembly structure includes a lead frame on which there are many leads contacting an integrated circuit chip (Chip). The chip is housed in a strong plastic that is mechanically supported and insulated from the circuit, while the leads are primarily soldered to the printed circuit board.

In the past, integrated circuit manufacturers have developed integrated circuit packaging technologies to meet the miniaturization requirements. The improvement method for miniaturized integrated circuits is to enable it to combine millions of transistor circuit components including circuits, chips, etc. on a silicon substrate. These improved methods have led to a greater emphasis on methods of building circuit assemblies in limited spaces.

Integrated circuits are manufactured in integrated circuit equipment from a silicon wafer through complex etching, doping, deposition and cutting techniques. A silicon wafer contains at least one integrated circuit chip, each chip representing an individual integrated circuit. Finally, the chip can be constructed by a plastic mold surrounding the chip, and has a variety of pin exposure and interconnection designs. For example: provide a fairly flat M-type dual-in-line-package (M Dual-In-Line-Package; M-Dip), which has two rows of parallel pins extending from the bottom through-hole, Contact and secure to the underlying IC board. Printed circuit boards that allow higher density integrated circuits are Single-In-Line-Package (SIP) and Small Outline J-leaded (SOJ), which are model-based Construct.

According to the number of integrated circuit chips combined in the structure, the types of integrated circuits can be roughly divided into two categories: single chip package (Single Chip Package; SCP) and multichip package (Multichip Package; MCP). Also includes multi-chip module construction (MultichipModule; MCM). According to the bonding method of components and circuit boards, integrated circuits can be divided into two types: Pin-Through-Hole (PTH) and Surface Mount Technology (SMT). The pins of the pin-inserted components are thin needle-shaped or thin-plate-shaped metals, which can be inserted into the socket (Socket) or the guide hole (Via) of the circuit board for soldering and fixing. The surface mount components are first pasted on the circuit board and then fixed by soldering. The more advanced assembly technology currently used is Direct Chip Attach (DCA) assembly to reduce the size of the integrated circuit and increase the integration of the circuits inside the integrated circuit. The technology of direct chip bonding is to directly fix the integrated circuit chip (Integrated Circuit Chip) to the substrate (Substrate), and then connect the circuit.

At present, the most common method of assembly is wire-bonding, that is, the chip is first fixed on the lead-frame (lead-frame), and then the lead-frame and the chip are connected by wires and used The molding compound covers the chip and part of the lead frame to form a packaged integrated circuit. The built-up integrated circuit can be fixed on the substrate by using the exposed lead frame to connect the circuit on the substrate and the circuit in the built-up integrated circuit. Since the wire-bonded assembly technology cannot reduce the size of the integrated circuit, a flip-chip bonding (Flip-Chip) assembly technology has been developed to meet the increasingly smaller requirements of the integrated circuit. . The feature of the flip-chip bonding assembly technology is that firstly, the chip is directly fixed on the substrate by soldering bumps installed on the active surface of the chip. Next, an underfill method is used to fill the gap between the chip and the substrate with encapsulant to fix the chip on the substrate and protect the connection interface between the chip and the substrate. Since no lead frame is required, the volume of integrated circuits constructed using the flip-chip bonding technology can be sufficiently reduced to meet product requirements.

Referring to FIG. 1 , this is a schematic diagram of a traditional underfill assembly process. Referring to FIG. 2A to FIG. 2C , these are schematic diagrams of the filling mode of the encapsulant and the defects generated when the conventional method is used for the flip-chip filling and assembly process. In the conventional flip-chip filling assembly process, the chip 10 is firstly connected to the substrate 20 by soldering bumps on the chip 10 . Next, the glue filling device 25 is used to fill the gap between the chip 10 and the substrate 20 with the sealant 30 to protect the contact point between the chip 10 and the substrate 20 . In the traditional glue filling process, most of the routes moved by the glue filling device 25 adopt the shape of "one", "L" or "ㄇ" to match the shape of the chip 10 and fill the sealant 30. into the gap between the chip 10 and the substrate 20. A packaged integrated circuit fabricated by using a flip chip filling process is a flip chip package (FC) integrated circuit.

In Figure 2A, the glue filling device uses a "one"-shaped moving route to fill the sealant into the gap between the chip and the substrate, so the sealant 30 enters between the chip and the substrate in a single direction without forming air holes in the gap. built into the integrated circuit. Although the inside of the integrated circuit formed by the "one"-shaped movement route of the glue filling device will not contain air holes, this "one"-shaped movement route will take more process time and affect the assembly and integration. The operating efficiency of the manufacturing process of the circuit. In Figure 2B and Figure 2C, the glue filling device uses an "L"-shaped or "ㄇ"-shaped moving route to fill the gap between the chip and the substrate, so the glue 30 will be in two The direction enters between the chip and the substrate at the same time to improve the operation efficiency of the manufacturing process of the integrated circuit. Since the velocity of the encapsulant 30 in the two directions is not the same, air holes 35 are often formed in the assembled integrated circuit, thereby degrading the quality of the assembled integrated circuit. When there are air holes 35 in the assembled integrated circuit, it means that the encapsulant 30 does not completely fill the gap between the chip and the substrate, which reduces the reliability of the assembled integrated circuit. The air holes formed during the assembly process will become the singularity point of the integrated circuit during operation and form a phenomenon of stress concentration, which will further cause the structure of the integrated circuit to collapse.

Since the structured integrated circuits formed by the traditional manufacturing process either need to spend more process time and affect the efficiency of the process operation, or will generate pores inside the structured integrated circuits and affect the quality of the structured integrated circuits, it is necessary to propose The preferred manufacturing method improves the operation efficiency of the integrated circuit manufacturing process on the one hand and improves the quality of the integrated integrated circuit on the other hand.

Contents of the invention

In view of the above-mentioned background art, the use of traditional IC manufacturing processes will either affect the efficiency of the manufacturing process or reduce the quality of the IC ICs. The present invention provides a method for assembling an integrated circuit, using the meshes of different distribution densities and styles on the screen of the present invention to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate and to print the encapsulant Fill the gap between the chip and the substrate to avoid the defect of air holes inside the integrated circuit.

The second object of the present invention is to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate by using the meshes with different distribution densities and styles on the screen of the present invention and to fill the encapsulant into the chip and the substrate by printing. The gap between the substrates is used to improve the operational efficiency of the integrated circuit assembly process.

The third object of the present invention is to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate by using the meshes with different distribution densities and styles on the screen of the present invention and to fill the encapsulant into the chip and the substrate by printing. The gap between substrates to reduce the production cost of building integrated circuits.

The fourth object of the present invention is to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate by using the meshes with different distribution densities and styles on the screen of the present invention and to fill the encapsulant into the chip and the substrate by printing. The gap between substrates is used to improve the yield reliability of integrated circuits.

Another object of the present invention is to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate by using the meshes with different distribution densities and styles on the screen of the present invention and to fill the encapsulant into the chip and the substrate by printing The gap between them to improve the range of use of the integrated circuit.

According to the above-mentioned purpose, the present invention provides a method for assembling an integrated circuit, which utilizes the distribution density and meshes of different styles on the screen of the present invention to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate. The encapsulant is filled into the gap between the chip and the substrate by printing to avoid the defect of air holes inside the integrated circuit. The screen of the present invention includes a first area, a second area, a third area, a fourth area and a fifth area. The second area is inside the first area, and the mesh density on the first area is lower than that on the second area. The third area, the fourth area and the fifth area are all inside the second area and the fourth area is located between the third area and the fifth area. There is no mesh distribution on the fifth area, and the mesh densities on the third area and the fourth area are lower than those on the second area. The present invention first utilizes soldering bumps on the chip to be combined with the substrate. Next, the substrate containing the chip is placed on a platform, and the screen used in the present invention is installed on the chip. Finally, apply sealant on part of the screen and use a scraper to traverse the surface of the screen, so that the sealant can gather around the substrate through the distributed mesh on the screen and allow the sealant to penetrate into the gap between the chip and the substrate. After the sealant is dried and formed, the chip is fixed on the substrate, and the structure of the assembled integrated circuit can be covered in the sealant and the back of the chip is exposed according to the product requirements, so as to improve the heat dissipation efficiency of the chip . In the process of sealing glue flowing into the gap between the chip and the substrate, because the speed of the sealing glue flowing into the gap between the chip and the substrate has been controlled by the different mesh density distribution areas on the screen, the sealing glue flows into the chip and the substrate in a unidirectional form. The gap between the substrate and the air hole can be avoided from the gap between the chip and the substrate. Utilizing the method of the present invention can also improve the operating efficiency of the integrated circuit assembly process and reduce the production cost of the integrated integrated circuit. The method of the invention can further improve the yield rate of the integrated circuit and increase the application range of the integrated circuit.

Description of drawings

FIG. 1 is a schematic diagram of a traditional flip-chip filling process;

2A to 2C are schematic diagrams of the filling mode of the encapsulant and the defects generated when the conventional flip-chip filling process is used;

Fig. 3 is the schematic diagram of stencil of the present invention;

Fig. 4 is a schematic diagram of filling the encapsulant between the chip and the substrate by printing using the method of the present invention;

5A and 5B are schematic diagrams of the integrated circuit after the assembly process of the present invention;

6A and 6B are schematic views of installing a heat sink on a built-up integrated circuit.

Explanation of symbols in the figure

10 chips

20 Substrate

25 Glue filling device

30 sealant

35 stomata

100 stencil

110 first area

120 second area

130 Third area

140 Fourth area

150 fifth area

200 platforms

210 chips

220 solder bumps

230 substrate

240 sealant

250 scraper

310 First Direction

320 second direction

400 heat sink

Detailed ways

Some embodiments of the present invention are described in detail as follows. However, the present invention can be widely practiced in other embodiments than those described in detail, and the scope of the present invention is not limited by the embodiments, but by the scope of the claims.

The present invention provides a method for assembling an integrated circuit, using the meshes of different distribution densities and styles on the screen of the present invention to control the mode and speed at which the encapsulant enters the gap between the chip and the substrate and to print the encapsulant Fill the gap between the chip and the substrate to avoid the defect of air holes inside the integrated circuit. Referring to FIG. 3 , this is a schematic diagram of the screen of the present invention. The screen plate 100 of the present invention includes several meshes and includes a first area 110 , a second area 120 , a third area 130 , a fourth area 140 and a fifth area 150 . The second area 120 is inside the first area 110 and the mesh density on the first area 110 is lower than that on the second area 120 . The third area 130 , the fourth area 140 and the fifth area 150 are all inside the second area 120 and the fourth area 140 is located between the third area 130 and the fifth area 150 . There is no opening on the fifth area 150 , and the mesh densities on the third area 130 and the fourth area 140 are lower than those on the second area 120 and the mesh density on the first area 110 . The third region 130 can be in an open state, so that the encapsulant can pass through the third region at a faster speed in subsequent processes. On the surface of a first direction 310 of the screen plate 100, the arrangement order of each area is the first area 110, the second area 120 and the third area 130, the fourth area 140, the fifth area 150, and the first area 110 , wherein the first direction 310 is the direction in which the scraper travels in subsequent processes.

Referring to FIG. 4 , this is a schematic diagram of filling the encapsulant between the chip and the substrate by printing using the method of the present invention. In the present invention, firstly, the chip 210 is combined with the substrate 230 by using the soldering bumps 220 mounted on the first surface (ie, the active surface) 212 of the chip 210 . Next, the substrate 230 including the chip 210 is placed on a platform 200 and the screen plate 100 used in the present invention is mounted on the chip 210 . The fifth area 150 on the grid plate 100 of the present invention corresponds to the chip 210, so the size of the fifth area increases or decreases with the surface area of the second surface 214 of the chip, wherein the first surface of the chip is connected to a second surface 214. The surfaces are parallel to each other. Finally, apply sealant 240 on part of the screen 100 and use a scraper (Squeegee) 250 to traverse the surface of the screen 100 so that the sealant 240 can be gathered on the substrate through the meshes distributed on the screen 100 230 and around the chip 210, and make the sealant 240 penetrate into the gap between the chip 210 and the substrate 230, wherein most of the sealant used is resin (Resin).

When the scraper traverses the surface of the screen 100 in a first direction 310, the sealant 240 on the screen 100 first passes through the first area 110 on the screen 100 and passes through the mesh of the first area 110 to gather on the substrate 230 on. Next, the encapsulant 240 passes through the second area 120 and the third area 130 on the screen 100 at the same time, passes through the meshes of the second area 120 and the third area 130 , and gathers on the substrate 230 and around the chip. When the sealant 240 enters the first region 110 on the screen plate 100, the sealant 240 can quickly pass through the mesh on the first region 110 and gather on the substrate 230 because the mesh density on the first region 110 is relatively small. . When the sealant passes through the second area 120 and the third area 130 on the screen 100 at the same time, since the mesh density on the second area 120 on the screen 100 is higher than the mesh density on the third area 130, the sealant The permeation speed of the sealant 240 on the third region 130 is higher than that on the second region 120 , and the sealant 240 can form the shape of the third region 130 on the substrate 230 . Since the third area 130 can also be in an open and unshielded state, the sealant 240 can pass through the third area 130 on the screen 100 at a faster speed. Next, the encapsulant 240 passes through the second area 120 and the fourth area 140 on the screen 100 at the same time, passes through the meshes of the second area 120 and the fourth area 140 , and gathers on the substrate 230 and around the chip. When the sealant 240 passes through the second area 120 and the fourth area 140 on the screen 100 at the same time, since the mesh density on the second area 120 on the screen 100 is higher than that on the fourth area 140, the sealing The penetration speed of the glue 240 on the fourth region 140 is higher than that on the second region 120 , and the sealant 240 can form the shape of the fourth region 140 on the substrate 230 . When the sealant 240 gathers on the substrate 230 and around the chip 210 through the second region 120, the third region 130 and the fourth region 140 on the screen plate 100, since the sealant 240 is in the third region 130 and the fourth region 140 The flow velocity of the encapsulant is faster than the flow velocity of the encapsulant on the second region 120, so the encapsulant 240 can spread to the gap between the chip 210 and the substrate 230 at a faster speed in the first direction 310 and will flow from a second direction 320 (shown in FIG. 3 ) is diffused from the gap between the chip 210 and the substrate 230 , wherein the first direction 310 is perpendicular to the second direction 320 . Although the sealant 240 also flows from the second direction 320 to the gap between the chip 210 and the substrate 230 via the second region 120 of the screen 100 , the sealant 240 diffuses from the gap between the chip 210 and the substrate 230 in the first direction 310 . The flow rate of the encapsulant 240 is faster than that of the sealant 240 flowing from the first direction 310 to the gap between the chip 210 and the substrate 230, so the sealant can enter the gap between the chip 210 and the substrate 230 in the flow mode shown in FIG. . When the printing method of the present invention is used to fill the sealant 240 into the gap between the chip 210 and the substrate 230 in the flow pattern shown in FIG. 2A , the generation of voids can be avoided. Next, the encapsulant 240 passes through the second region 120 and the fifth region 150 on the screen 100 at the same time, passes through the mesh of the second region 120 and gathers on the substrate 230 . Since the fifth area 150 of the mesh plate 100 does not have meshes in a completely closed state, the encapsulant 240 will not be formed on the second surface of the chip. Finally, the sealant 240 passes through the first region 110 on the screen 100 and passes through the mesh of the first region 110 to gather on the substrate 230 .

Referring to FIG. 5A and FIG. 5B , this is a schematic view of the integrated circuit after the assembly process of the present invention. Referring to FIG. 6A and FIG. 6B , this is a schematic diagram of installing a heat sink on a packaged integrated circuit. After the encapsulant 240 filled by printing is dried and shaped, the chip 210 is fixed on the substrate 230 and the manufacturing process of the integrated circuit of the present invention is completed. The structure of the integrated circuit assembled by the method of the present invention can be formed into different shapes according to the requirements of the product. The protective body formed by the encapsulant 240 can cover part of the chip 210 and part of the substrate 230 and expose the second surface 314 of the chip 210 to improve the heat dissipation efficiency of the chip 210 . According to the different requirements of products, the present invention can control the distribution of the mesh density on the first area of the screen to form different shapes of integrated circuits. FIG. 5A is an outline of a packaged integrated circuit formed when the width of the first region on the stencil is narrow in the first direction. FIG. 5B is an outline of a packaged integrated circuit formed when the width of the first region on the stencil is wider in the first direction. After completing the fabrication process of the integrated circuit, a heat sink 400 can be installed on the second surface of the integrated circuit chip to increase the heat dissipation efficiency of the integrated integrated circuit and avoid overheating of the integrated integrated circuit. The length and shape of the heat sink can vary with the requirements of products and processes.

Using the method of the present invention to fill the gap between the chip and the substrate with sealant by printing, a protective body can be formed around the chip and on the substrate to protect the interface between the chip and the substrate without using a mold. Compared with the traditional molding compound assembly process that needs to use a mold, the method of the present invention can improve the efficiency of the assembly process and reduce the cost of the assembly process. Utilizing the different mesh density distributions on the stencil of the present invention to fill the sealant into the gap between the chip and the substrate, the flow pattern of the sealant obtained by using the "one"-shaped travel route of the traditional glue filling device can be achieved, and more can be achieved. On the premise of improving the construction efficiency, the formation of air holes inside the integrated circuit is avoided. Therefore, the quality of the assembled integrated circuit can also be improved by using the method of the present invention. In the traditional underfill assembly process and molding compound assembly process, the appearance of the integrated circuit is a fixed shape. The structure of the integrated circuit formed by the method of the present invention can form integrated integrated circuits of different shapes depending on the requirements of the manufacturing process and the product. Therefore, using the method of the present invention can further increase the application range of the integrated circuit.

To sum up, the present invention provides a kind of structure integrated circuit and its method, utilizes the distribution density and pattern design different meshes on the screen of the present invention to control the pattern and speed of encapsulant entering the gap between the chip and the substrate and The encapsulant is printed to fill the gap between the chip and the substrate to avoid the defect of air holes inside the integrated circuit. The screen of the present invention includes a first area, a second area, a third area, a fourth area and a fifth area. The second area is inside the first area and the mesh density on the first area is lower than that on the second area. The third area, the fourth area and the fifth area are all inside the second area and the fourth area is located between the third area and the fifth area. There is no mesh distribution on the fifth area, and the mesh densities on the third area and the fourth area are lower than those on the second area. The present invention first utilizes soldering bumps on the chip to be combined with the substrate. Next, the substrate containing the chip is placed on a platform, and the screen used in the present invention is installed on the chip. Finally, apply sealant on part of the screen and use a scraper to traverse the surface of the screen, so that the sealant can gather on the substrate and around the chip through the mesh distributed on the screen, and make the sealant The glue penetrates into the gap between the chip and the substrate. After the encapsulant is dried and formed, the chip is fixed on the substrate and the structure of the assembled integrated circuit can be covered in the encapsulant according to product requirements and the back of the chip is exposed to improve the heat dissipation efficiency of the chip. In the process of sealing glue flowing into the gap between the chip and the substrate, because the speed of the sealing glue flowing into the gap between the chip and the substrate has been controlled by the different mesh density distribution areas on the screen, the sealing glue flows into the chip and the substrate in a unidirectional form. The gap between the substrate and the air hole can be avoided from the gap between the chip and the substrate. Utilizing the structure and method of the present invention can also improve the efficiency of the assembly process of the integrated circuit and reduce the production cost of the integrated circuit. The structure and method of the present invention can improve the yield rate of the integrated circuit and increase the application range of the integrated circuit. It not only has practical effects, but also has an unprecedented design, and has improved efficacy and progress.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention; all other equivalent changes or modifications that do not deviate from the spirit disclosed in the present invention should be included in the claims In the range.

Claims (8)

1. A method for assembling an integrated circuit, characterized in that the method at least includes: (a) providing an integrated circuit comprising a chip and a substrate, wherein the active surface of the chip and the substrate are flip-chip bonded by solder bumps; (b) place the integrated circuit on a platform, and install a stencil on the chip of the integrated circuit, the stencil includes several meshes and several areas with different mesh densities; (c) apply sealant to the upper surface of the portion of the screen; (d) move a scraper on the screen in the first direction, apply the sealant evenly on all areas of the screen, and flow into the bottom of the screen from the meshes to cover part of the screen the surface of the substrate and filling the area between the chip and the substrate; and (e) drying the sealant. 2 . The method for assembling an integrated circuit as claimed in claim 1 , wherein the scraper can pass through a completely open stencil area without mesh before moving directly above the chip. 3 . 3 . The method for assembling an integrated circuit as claimed in claim 1 , wherein the area of the stencil directly above the surface of the chip is a closed area without mesh. 4 . 4. The method for assembling an integrated circuit as claimed in claim 1, wherein the encapsulant is a resin. 5. The method for assembling an integrated circuit as claimed in claim 1, further comprising installing a heat sink after step (e). 6. The method for assembling an integrated circuit according to claim 1, wherein in step (d), a second direction is perpendicular to the first direction, and the encapsulant is formed from the chip and the first direction in the first direction. The speed at which the sealant diffuses out of the gap between the substrates is greater than the speed at which the encapsulant flows from the second direction to the gap between the chip and the substrate. 7. The method for assembling an integrated circuit according to claim 1, wherein the stencil comprises: a first area, a second area, a third area, a fourth area, and a fifth area, wherein the first area A region is distributed outside the second, third, fourth and fifth regions, the second region is distributed outside the third, fourth and fifth regions, and the fourth region is located outside the third and fifth regions. Between the areas, the fifth area is located directly above the chip and is a closed area without mesh, and the order of mesh density from large to small is: the second area, the first area, the fourth area, and the third area. 8. The method for assembling an integrated circuit as claimed in claim 7, wherein the third area is a completely open area without mesh.

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