CN117810338A - Light-emitting element and backlight unit and display device having the same - Google Patents

Abstract

The invention discloses a light-emitting element, comprising: a semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer; the first contact electrode and the second contact electrode are positioned on the semiconductor lamination, wherein the first contact electrode comprises a first contact part positioned on the first semiconductor layer, and the second contact electrode comprises a second contact part positioned on the second semiconductor layer; an insulating material stack on the semiconductor stack including an opening on the second contact; and the first electrode pad and the second electrode pad are positioned on the insulating material lamination, wherein the second electrode pad filling opening is connected with the second contact part; the second electrode pad comprises an upper surface, wherein the upper surface comprises a high platform area and a concave area which are correspondingly positioned on the second contact part; wherein the plateau region has a maximum height relative to other regions of the upper surface; the projection area of the plateau area on a horizontal plane is A1, the sum of the projection areas of the plateau area and the concave area on the horizontal plane is A2, and the ratio of A1 to A2 is 50% -80%.

Description

Light emitting element, backlight unit having the same, and display device having the same

Technical Field

The present invention relates to a light emitting element having an insulating material laminate, and a backlight unit and a display device having the same.

Background

Light Emitting Diodes (LEDs) in solid state light emitting devices have low power consumption, low heat generation, long life, small size, fast response speed, and good photoelectric characteristics, such as stable light emission wavelength, and thus have been widely used in household appliances, indicator lamps, and photoelectric products.

The conventional light emitting diode includes a substrate, an n-type semiconductor layer, an active layer and a p-type semiconductor layer formed on the substrate, and p-and n-electrodes formed on the p-type/n-type semiconductor layer, respectively. When the light emitting diode is energized through the electrode and forward biased at a specific value, holes from the p-type semiconductor layer and electrons from the n-type semiconductor layer combine within the active layer to emit light. However, as the size of the led is reduced, how to maintain the optoelectronic characteristics and improve the manufacturing yield of the led is one of the targets of research and development in the art.

Disclosure of Invention

A light emitting element comprising: a light emitting element comprising: a semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer; the first contact electrode and the second contact electrode are positioned on the semiconductor lamination, wherein the first contact electrode comprises a first contact part positioned on the first semiconductor layer, and the second contact electrode comprises a second contact part positioned on the second semiconductor layer; an insulating material stack on the semiconductor stack including an opening on the second contact; and the first electrode pad and the second electrode pad are positioned on the insulating material lamination, wherein the second electrode pad filling opening is connected with the second contact part; the second electrode pad comprises an upper surface, wherein the upper surface comprises a high platform area and a concave area which are correspondingly positioned on the second contact part; wherein the plateau region has a maximum height relative to other regions of the upper surface; the projection area of the plateau area on a horizontal plane is A1, the sum of the projection areas of the plateau area and the concave area on the horizontal plane is A2, and the ratio of A1 to A2 is 50% -80%.

Drawings

FIG. 1A is a top view of a light emitting device according to an embodiment of the invention;

FIG. 1B is a cross-sectional view taken along line segment A-A' in FIG. 1A;

FIG. 1C is a top view of a light emitting device according to another embodiment of the present invention;

FIG. 1D is a cross-sectional view taken along line segment A-A' in FIG. 1C;

FIG. 1E is a top view of a light emitting device according to another embodiment of the present invention;

FIGS. 2A and 2B are cross-sectional views of a laminate of insulating materials according to various embodiments of the present invention;

FIG. 3 is a schematic diagram of a light emitting module according to an embodiment of the invention;

FIG. 4A is a schematic view of a photograph of a partially enlarged appearance of a light emitting device according to an embodiment of the invention;

FIG. 4B is an enlarged partial cross-sectional view of a light-emitting device according to an embodiment of the present invention;

fig. 5A and 5B are partially enlarged sectional views of light emitting elements of different comparative examples, respectively;

FIG. 6 is an enlarged partial cross-sectional view of a light-emitting element according to another embodiment of the present invention;

FIG. 7A is an enlarged schematic view of a portion of the region R1 in FIG. 1A;

FIG. 7B is a cross-sectional view taken along line B-B' of FIG. 7A;

FIG. 8A is an enlarged view of a portion of the left half of FIG. 7B;

FIGS. 8B and 8C are schematic diagrams illustrating microscopic images of a light emitting device according to another embodiment of the invention;

FIG. 9A is a top view of a light emitting device according to another embodiment of the present invention;

FIG. 9B is a cross-sectional view taken along line A-A' of FIG. 9A;

fig. 9C is a cross-sectional view of a light-emitting element according to another embodiment of the present invention;

FIG. 10 is a top view of a light emitting device according to another embodiment of the present invention;

FIG. 11 is a cross-sectional view of a backlight unit of a display device;

FIG. 12A is a schematic top view of a display device 105;

fig. 12B is a partial cross-sectional view of the pixel unit PX in fig. 12A.

Detailed Description

For a more complete and thorough description of the present invention, reference is made to the following description of the embodiments in conjunction with the accompanying drawings. However, the embodiments shown below are examples for illustrating the light emitting element of the present invention, and the present invention is not limited to the following embodiments. The dimensions, materials, shapes, relative arrangements, and the like of the constituent parts described in the embodiments are not limited to those described in the specification, and the scope of the present invention is not limited thereto but only by a simple description. And the sizes, positional relationships, etc. of the members shown in the drawings are exaggerated for the sake of clarity. In the following description, members of the same or similar nature are denoted by the same names and symbols for the purpose of omitting detailed descriptions as appropriate.

Fig. 1A is a top view of a light emitting device 1 according to an embodiment of the invention. FIG. 1B is a cross-sectional view taken along line A-A' of FIG. 1A.

As shown in fig. 1A and 1B, the light emitting device 1 includes a substrate 10 and a semiconductor stack 12 disposed on an upper surface 10a of the substrate 10, wherein the semiconductor stack 12 includes a first semiconductor layer 121, an active layer 123 and a second semiconductor layer 122 sequentially from bottom to top. The first semiconductor layer 121 includes an upper surface 121a that is not covered by the active layer 123 and the second semiconductor layer 122. The semiconductor stack 12 includes, in a top view, a first edge E1 and a third edge E3 disposed opposite to each other, and a second edge E2 and a fourth edge E4 disposed opposite to each other. The first contact electrode 20 is disposed on the upper surface 121a of the first semiconductor layer and electrically connected thereto, and the transparent conductive layer 18 and the second contact electrode 30 are disposed on the second semiconductor layer 122 and electrically connected thereto; the insulating material stack 50 covers the semiconductor stack 12 and the transparent conductive layer 18 and has openings 501 and 502 exposing the first contact electrode 20 and the second contact electrode 30, respectively; the first electrode pad 20A is located on the insulating material stack 50, and fills the opening 501 to connect with the first contact electrode 20; and a second electrode pad 30A is disposed on the insulating material stack 50, and fills the opening 502 to connect with the second contact electrode 30.

The base 10 may be a growth substrate including a substrate for growing gallium indium phosphide (AlGaInP) series compounds, such as gallium arsenide (GaAs) substrate or gallium phosphide (GaP) substrate, or a substrate for growing indium gallium nitride (InGaN) or aluminum gallium nitride (AlGaN) series compounds, such as sapphire (Al) ₂ O ₃ ) A substrate, a gallium nitride (GaN) substrate, a silicon carbide (SiC) substrate, and an aluminum nitride (AlN) substrate. The substrate 10 includes an upper surface 10a. In an embodiment, the substrate 10 may be a patterned substrate, i.e. the upper surface 10a of the substrate 10 has a patterned structure P. In one embodiment, light emitted from the semiconductor stack 12 may be refracted, reflected, or scattered by the patterned structure P of the substrate 10, thereby improving light extraction efficiency of the light emitting element. In addition, the patterned structure P mitigates or inhibits misalignment between the substrate 10 and the semiconductor stack 12 due to lattice mismatch, thereby improving the epitaxial quality of the semiconductor stack 12.

In another embodiment, the patterned structure P and the substrate 10 comprise different materials, and the patterned structure P comprises an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. In one embodiment, the region 10A of the substrate 10 not covered by the semiconductor stack 12 is not provided with the patterned structure P; and the region 10B of the substrate 10 covered by the semiconductor stack 12 has a patterned structure P. In another embodiment, the region 10A of the substrate 10 not covered by the semiconductor stack 12 and the region 10B of the substrate 10 covered by the semiconductor stack 12 have different dimensions, widths, shapes or heights than the patterned structures P of the region 10B, for example, the patterned structures P in the region 10A not covered by the semiconductor stack 12 have smaller dimensions and smaller heights than the patterned structures P in the region 10B covered by the semiconductor stack 12.

In one embodiment of the present invention, the method of forming the semiconductor stack 12 on the substrate 10 includes Metal Organic Chemical Vapor Deposition (MOCVD), molecular Beam Epitaxy (MBE), hydride Vapor Phase Epitaxy (HVPE), or ion plating, such as sputtering or evaporation.

In one embodiment, the semiconductor stack 12 includes a buffer structure 120 between the first semiconductor layer 121 and the substrate 10. The buffer structure 120 may reduce the lattice mismatch and suppress dislocation as described above, thereby improving epitaxial quality. The material of the buffer structure 120 includes GaN, alGaN, or AlN. In one embodiment, the buffer structure 120 includes a plurality of sub-layers (not shown) that include the same material or different materials. In an embodiment, the buffer structure 120 includes two sub-layers, wherein a first sub-layer is formed in a different manner from a second sub-layer, for example, the first sub-layer is formed by sputtering; the second sub-layer is formed by MOCVD. In an embodiment, the buffer structure 120 further includes a third sub-layer, where the third sub-layer is formed by MOCVD, and a growth temperature of the second sub-layer is different from a growth temperature of the third sub-layer. In one embodiment, the first, second and third sublayers comprise the same material, such as AlN. In an embodiment, the first semiconductor layer 121 and the second semiconductor layer 122 are cladding layers (confinement layer). In one embodiment, the first semiconductor layer 121 and the second semiconductor layer 122 have different conductive types, electrical properties, polarities, or doping elements for providing electrons or holes, for example, the first semiconductor layer 121 includes an n-type semiconductor, and the second semiconductor layer 122 includes a p-type semiconductor. The active layer 123 is formed between the first semiconductor layer 121 and the second semiconductor layer 122. The electrons and holes are combined in the active layer 123 under current driving, and convert electric energy into light energy to emit light. The wavelength of the light emitted by the light emitting element 1 or the semiconductor stack 12 can be tuned by changing the physical properties and chemical composition of one or more of the semiconductor stacks 12.

The material of the semiconductor stack 12 includes a III-V semiconductor compoundMaterials of matter, e.g. Al _x In _y Ga _(1-x-y) N (AlInGaN series) or Al _x In _y Ga _(1-x-y) P (AlInGaP series), wherein 0.ltoreq.x, y.ltoreq.1; x+y is less than or equal to 1. Depending on the material of the active layer, red light having a wavelength between 610nm and 650nm or yellow light having a wavelength between 550nm and 570nm may be emitted when the material of the semiconductor stack 12 is AlInGaP-series. When the material of the semiconductor stack 12 is AlInGaN series, blue or deep blue light having a peak wavelength between 400nm and 490nm, green light having a peak wavelength between 490nm and 550nm, or UV light having a peak wavelength between 400nm and 250nm may be emitted. The active layer 123 comprises a single heterostructure (single heterostructure; SH), a double heterostructure (double heterostructure; DH), a double-sided double heterostructure (double-side double heterostructure; DDH), a Multiple Quantum Well (MQW). The material of the active layer 123 may be an i-type, p-type or n-type semiconductor. In this embodiment, the upper surface 121a of the first semiconductor layer includes a surrounding mesa region around the semiconductor stack 12 and surrounding the active layer 123 and the second semiconductor layer 122, in addition to the contact region where the first contact electrode 20 is disposed. Fig. 1C and 1D show a light emitting device 1' according to another embodiment. The light emitting element 1 'is similar in structure to the light emitting element 1, except that the first semiconductor layer upper surface 121a of the light emitting element 1' does not include the surrounding mesa region except for the contact region where the first contact electrode 20 is provided. As shown in fig. 1D, the sidewall 12s of the semiconductor stack 12 extends from the second semiconductor layer 122 down to the first semiconductor layer 121, such that the sidewall 12s forms a continuous slope. In one embodiment, the semiconductor stack 12 may be etched from the second semiconductor layer 122 down to the substrate upper surface 10a to form sidewalls 12s. In another embodiment, a multi-stage etching may be performed, first etching down from the second semiconductor layer 122 until the first semiconductor layer upper surface 121a is formed, and then etching down from the first semiconductor layer upper surface 121a to the substrate upper surface 10a to form the sidewall 12s, and leaving a portion of the first semiconductor layer upper surface 121a as a contact region for forming the first contact electrode 20. In addition, the distance between the edge of the transparent conductive layer 18 and the edge of the second semiconductor layer 122 is not constant. At the transparent conductive layer adjacent to the sidewall 12s 18, the distance between the edge of the transparent conductive layer 18 and the edge of the second semiconductor layer 122 may be widened. For example, the above-mentioned pitch near the first semiconductor upper surface 121a is smaller than the above-mentioned pitch in other regions. That is, as shown in fig. 1C and 1D, the distance D4 is smaller than the distance D3. In this way, the semiconductor stack 12 is prevented from being excessively etched during the formation of the sidewall 12s due to the process variation, such that the edge of the transparent conductive layer 18 exceeds or is aligned with the edge of the second semiconductor layer 122, thereby increasing the process tolerance (tolerance).

The first contact electrode 20 includes a plurality of first contact portions 201, 201' and first finger portions 202, wherein the plurality of first contact portions 201, 201' are physically separated from each other in a top view, the first contact portions 201, 201' have a dot-like shape, the first finger portions 202 have a bar-like shape, and a width of the first finger portions 202 is smaller than a width of the first contact portions 201. As shown in fig. 1A, in a top view, a plurality of first contact portions 201, 201 'and first finger portions 202 are arranged along a first edge E1, the first contact portions 201 are connected to the first finger portions 202, and the first contact portions 201' are located at corners where the first edge E1 meets with the second edge E2. The second contact electrode 30 includes a plurality of second contact portions 301, 301' and second finger portions 302, wherein the plurality of second contact portions 301, 301' are physically separated from each other in a top view, the second contact portions 301, 301' have a dot-like shape, the second finger portions 302 have a stripe-like shape, and a width of the second finger portions 302 is smaller than a width of the second contact portions 301. As shown in fig. 1A, in a top view, the plurality of second contact portions 301, 301 'and the second finger portion 302 are arranged along the third edge E3, the second contact portion 301 is connected to the second finger portion 302, and the plurality of second contact portions 301' are located at corners where the third edge E3 meets the fourth edge E4. In an embodiment, the minimum distance d1 between the opening 501 above the first contact portion 201 'and the corner thereof is smaller than the minimum distance d2 between the opening 502 above the second contact portion 301' and the corner thereof. The first contact portion 201 'is disposed opposite to the second contact portion 301' in a diagonal direction, or an approximately diagonal direction.

The first finger 202 and the second finger 302 extend along the longitudinal direction (X direction) of the light emitting element 1 and are parallel to each other, wherein the first finger 202 extends along the first edge E1 and the second finger 302 extends along the third edge E3. The maximum spacing of the first finger 202 and the second finger 302 is greater than 0.75 times the length of the second edge E2 or the fourth edge E4, and the length of the first finger 202 and/or the second finger 302 is greater than 0.5 times the length of the first edge E1 or the third edge E3. The minimum distance between the first finger 202 and the first edge E1 is smaller than the minimum distance between the second finger 302 and the third edge E3. In another embodiment (not shown), the first finger 202 and the second finger 302 may be disposed non-parallel, e.g., the first finger 202 and/or the second finger 301 comprise an arc or a bend. Fig. 1E shows a light emitting element 1 "of another embodiment. Light emitting element 1 "is similar in structure to light emitting element 1 or light emitting element 1', except that the second finger 302 of light emitting element 1" is not parallel to the first finger 202. The distance between the second finger 302 and the first finger 202 increases as the second finger 302 moves away from the second contact 301, e.g., the distance d6 is greater than the distance d5. In another embodiment (not shown), when the light emitting element 1″ is not provided with the first finger 202, the distance between the second finger 302 and the first edge E1 increases as the second finger 302 is away from the second contact 301. In general, when current is injected from the first electrode pad 20A into the first contact 201, 201', the current is liable to be choked in the vicinity of the first contact 201, 201', and a higher current density is formed. In the present embodiment, the second finger 301 is disposed at a distal end thereof away from the first contact portion 201, so that a more uniform current distribution can be obtained, and the luminous efficiency can be improved. In one embodiment, the pitch of the first contact portions 201 and 201 'is greater than the pitch of the second contact portions 301 and 301'. As shown in fig. 1A, the overlapping length of the first finger 202 and the second finger 302 in the longitudinal direction (X direction) may be larger than the pitch of the first contact 201 'and the first contact 201, or may be larger than the pitch of the second contact 301' and the second contact 301. In this way, current spreading and current uniformity can be increased. In one embodiment, the outline of the first electrode pad 20A includes an outer protrusion 20p protruding toward the corner of the light emitting element 1 from a top view to completely cover the first contact 201' located at the corner; more specifically, the protrusion 20p extends at least 1 μm beyond the edge of the first contact 201', which increases the reliability of the first electrode pad 20A and ensures that the first electrode pad 20A contacts the first contact 201' via the opening 501.

The first contact electrode 20 and the second contact electrode 30 include a metal material, for example, a metal such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), rhodium (Rh), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), or a laminate or alloy of the above materials. The first contact electrode 20 and the second contact electrode 30 each comprise an inclined sidewall, and in one embodiment, the thickness of the first contact electrode 20 and the second contact electrode 30 is between 0.3 μm and 3 μm.

The current blocking structure 23 is located on the semiconductor stack 12 and can block current from being injected into the semiconductor stack directly under the contact electrode, increasing current diffusion in the horizontal direction. The material of the current blocking structure 23 includes an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, niobium oxide, hafnium oxide, titanium oxide, magnesium fluoride, aluminum oxide, or the like. The current blocking structure 23 includes a first insulating portion 23a located between the first semiconductor layer 121 and the first contact electrode 20, and a second insulating portion 23b located between the second semiconductor layer 122 and the second contact electrode 30 and extending along the second finger portion 302 of the second contact electrode 30. The current blocking structure 23 comprises inclined sidewalls, the width of the current blocking structure 23 being larger than the width of the contact electrode located directly above it in a top view. In one embodiment, the second insulating portion 23b has a shape identical to that of the second contact electrode 30. In another embodiment, the light emitting device 1 may be provided with only the second insulating portion 23b on the second semiconductor layer 122, or without any current blocking structure. In one embodiment, the first insulating portion 23a includes a plurality of islands separated from each other, wherein one of the islands is located below the first contact portion 201, and the remaining islands are spaced along the first finger 202. In an embodiment, the first contact electrode 20 includes a plurality of first contact portions 201, 201', wherein a first insulating portion 23a is disposed under the first contact portion 201, and no current blocking structure is disposed under the first contact portion 201', so that the first contact portion 201' is directly connected to the first semiconductor layer 121.

As shown in fig. 1A and 1B, the transparent conductive layer 18 is located below the second contact electrode 30 and covers the second semiconductor layer 122 and the second insulating portion 23B. The transparent conductive layer 18 is used to diffuse current and form good electrical contact, such as ohmic contact, with the second semiconductor layer 122; the transparent conductive layer 18 is transparent to the light emitted from the active layer 123, and has a transmittance of 80% or more, for example. The material of the transparent conductive layer 18 may be metal or transparent conductive material, wherein the metal material includes gold (Au), nickel gold (NiAu), etc., and the transparent conductive material includes graphene, indium Tin Oxide (ITO), aluminum Zinc Oxide (AZO), gallium Zinc Oxide (GZO), zinc oxide (ZnO), indium Zinc Oxide (IZO), etc. In another embodiment (not shown), the light emitting device 1 is not provided with any current blocking structure, and the transparent conductive layer 18 includes a plurality of openings distributed directly under the second finger portions 302, such that the second finger portions 302 contact the second semiconductor layer 122 through the plurality of openings of the transparent conductive layer 18.

As shown in fig. 1B, the insulating material stack 50 covers the semiconductor stack 12, the transparent conductive layer 18, and the first and second contact electrodes 20 and 30, and the opening 501 of the insulating material stack 50 exposes the first contact portions 201 and 201', and the opening 502 exposes the second contact portions 301 and 301'. The insulating material stack 50 extends from the sidewalls of the semiconductor stack 12 to cover the upper surface 10a of the substrate 10. In another embodiment (not shown), the insulating material stack 50 does not cover a portion of the upper surface 10a, in particular, the insulating material stack 50 does not cover a surrounding portion of the upper surface 10a.

Fig. 2A and 2B show details of the insulating material stack 50 in various embodiments. The insulating material stack 50 provides a reflective function for light of a specific wavelength range and/or a specific angle of incidence range, i.e. the insulating material stack 50 may act as a reflective structure, e.g. the insulating material stack 50 has a reflectivity of more than 60% for the dominant wavelength and/or the peak wavelength of the light emitting element 1. In one embodiment, as shown in fig. 2A, the insulating material stack 50 includes a first set of material stacks 51, wherein the first set of material stacks 51 includes one or more pairs of insulating material pairs consisting of a first sub-layer 51a and a second sub-layer 51 b. The first set of material stacks comprises insulating material, a first sub-layer 51a and a second sub-layer 51b forming a pair of said insulating materials. The first sub-layer 51a has a higher refractive index than the second sub-layer 51 b. The insulating material stack 50 is designed to reflect light of a specific wavelength range by selecting materials of different refractive indices in combination with its thickness. In one embodiment, the first sub-layer 51a has a smaller thickness than the second sub-layer 51 b. The first sub-layer 51a and the second sub-layer 51b comprise an insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, niobium oxide, hafnium oxide, titanium oxide, magnesium fluoride, aluminum oxide, etc. In one embodiment, the insulating material stack 50 is, for example, a distributed Bragg reflector (DBR, distributed Bragg reflector).

In one embodiment, the insulating material layer 50 may further comprise other layers besides the first sub-layer 51a and the second sub-layer 51 b. For example, the insulating material layer 50 further comprises a bottom layer (not shown) between the first material layer 51 and the semiconductor layer 12, that is, the bottom layer is formed on the semiconductor layer 12, and then the first sub-layer 51a and the second sub-layer 51b are formed on the bottom layer. In one embodiment, the bottom layer includes an insulating material having a thickness greater than the thicknesses of the first sub-layer 51a and the second sub-layer 51 b. In one embodiment, the bottom layer is formed in the same manner as the first sub-layer 51a and the second sub-layer 51b, for example, the bottom layer, the first sub-layer 51a and the second sub-layer 51b are formed by chemical vapor deposition (Chemical Vapor Deposition, CVD) or physical vapor deposition (Physical Vapor Deposition, PVD). For example, the underlayer, the first sub-layer 51a, and the second sub-layer 51b are formed by physical vapor deposition, such as evaporation, sputtering, or a combination thereof. In this way, a smoother surface of the insulating material stack 50 may be formed. In another embodiment, the bottom layer is formed differently from the first sub-layer 51a and the second sub-layer 51b, for example, the bottom layer is formed by chemical vapor deposition (Chemical Vapor Deposition, CVD), preferably by plasma-assisted chemical vapor deposition (plasma enhanced chemical vapor deposition, PECVD). The first sub-layer 51a and the second sub-layer 51b are formed by vapor deposition or sputtering. In one embodiment, the bottom layer may provide a function of protecting the light emitting element or protecting the semiconductor stack, for example, blocking outside moisture from entering the light emitting element.

In another embodiment, as shown in fig. 2B, the insulating material stack 50 includes a plurality of material stacks, for example, a first material stack 51 and a second material stack 52, where the first material stack 51 is as described in the previous embodiment, and the second material stack 52 includes one or more pairs of insulating material pairs formed by a third sub-layer 52a and a fourth sub-layer 52B. The second set of material stacks 52, for example, comprises insulating material, a third sub-layer 52a and a fourth sub-layer 52b forming an insulating material pair. The third sub-layer 52a has a higher refractive index than the fourth sub-layer 52b, and in one embodiment, the third sub-layer 52a has a smaller thickness than the fourth sub-layer 52 b. The third sub-layer 52a and the first sub-layer 51a have different thicknesses, and the third sub-layer 52a and the first sub-layer 51a may be the same material or different materials. The fourth sub-layer 52b and the second sub-layer 51b have different thicknesses, and the fourth sub-layer 52b and the second sub-layer 51b may be the same material or different materials.

In another embodiment, the insulating material layer 50 may further include an upper layer (not shown) on the first material layer 51 opposite to the second semiconductor layer 122, that is, the first sub-layer 51a and the second sub-layer 51b are formed on the semiconductor layer 12, and then the upper layer is formed. The upper layer comprises an insulating material having a thickness greater than the thickness of the first sub-layer 51a and the second sub-layer 51 b. In one embodiment, the upper layer is formed differently from the first sub-layer 51a and the second sub-layer 51b, for example, by Chemical Vapor Deposition (CVD), preferably by plasma-enhanced chemical vapor deposition (PECVD). The first sub-layer 51a and the second sub-layer 51b are formed by sputtering or vapor deposition. In one embodiment, the upper layer may increase the strength of the overall insulation material stack 50, for example, when the insulation material stack 50 is subjected to an external force, the upper layer may prevent the insulation material stack 50 from being broken or damaged by the external force. In another embodiment, the upper layer is formed by atomic layer deposition (Atomic Layer Deposition; ALD), and the first sub-layer 51a and the second sub-layer 51b are formed by sputtering or vapor deposition. The upper layer may conformally cover the first material layer 51, and fill the defects on the surface of the insulating material layer 50 by using the excellent step coverage (step coverage) property, so as to provide a better protection effect, for example, to prevent moisture from entering or prevent the electrode metal formed later from diffusing into the insulating material layer 50 to cause electrical problems. In another embodiment, the upper layer is formed in the same manner as the first sub-layer 51a and the second sub-layer 51b, for example, the first sub-layer 51a, the second sub-layer 51b and the upper layer are formed by sputtering or vapor deposition. The adhesion between the insulating material stack 50 and the first and second electrode pads 20A and 30A can be improved by the upper layer to further improve the reliability of the light emitting element. The upper layer material comprises an oxide or nitride. The oxide is, for example, a metal oxide including silicon oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, yttrium oxide, lanthanum oxide. The nitride includes, for example, silicon nitride, aluminum nitride, titanium nitride, or silicon oxynitride.

In another embodiment, the insulating material stack 50 comprises a plurality of material stacks and the bottom layer and/or the upper layer. The thickness of the insulating material stack 50 is between 0.5 and 6 μm, and in one embodiment between 1.5 and 5.5 μm. In one embodiment, the thickness of the insulating material stack 50 is greater than the thickness of the first contact electrode 20 and the second contact electrode 30.

In another embodiment, a dense layer (not shown) is formed by atomic layer deposition (Atomic Layer Deposition; ALD) on the surfaces of transparent conductive layer 18 and semiconductor stack 20 to directly coat semiconductor stack 12 prior to forming insulating material stack 50. The material of the compact layer comprises silicon oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, yttrium oxide, lanthanum oxide, silicon nitride, aluminum nitride or silicon oxynitride. In this embodiment, the interface between the dense layer and the semiconductor stack 12 includes a metal element and oxygen, wherein the metal element includes aluminum, hafnium, tantalum, zirconium, yttrium, lanthanum, or tantalum. The dense layer comprises a layer having a thickness betweenIn one embodiment, between +.> Between them. In one embodiment, the dense layer may conformally cover the semiconductor stack 12, and may provide a better protection effect to the semiconductor stack 12 by the good step coverage (step coverage) of the dense layer, for example, to prevent moisture from entering the semiconductor stack 12, and may assist the adhesion between the insulating material stack 50 and the semiconductor stack 12 by the better adhesion between the dense layer and the semiconductor stack 12 and between the dense layer and the insulating material stack 50, so as to further improve the reliability of the light emitting device.

The first electrode pad 20A is located on the insulating material stack 50, contacts the first contact portions 201 and 201' via the opening 501, and forms an electrical connection with the first semiconductor layer 121. The second electrode pad 30A is located on the insulating material stack 50, contacts the second contact portions 301 and 301' via the opening 502, and forms an electrical connection with the second semiconductor layer 122. In one embodiment, as shown in fig. 1A, the first electrode pad 20A does not cover the second contact electrode 30, and the second electrode pad 30A does not cover the first contact electrode 20; in detail, the first electrode pad 20A does not cover the second contact portions 301, 301 'and the second finger portion 302, and the second electrode pad 30A does not cover the first contact portions 201, 201' and the first finger portion 202.

The first electrode pad 20A and the second electrode pad 30A include a metal material, for example, a metal such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), or a laminate or alloy of the above materials. For example, the first electrode pad 20A and the second electrode pad 30A may include an Al/Pt layer, a Ti/Au layer, a Ti/Pt/Au layer, a Cr/Pt/Au layer, a Ni/Pt/Au layer, a Cr/Al/Ti/Pt layer, a Ti/Al/Ti/Pt/Ni/Pt layer, a Cr/Al/Ti/Al/Ni/Pt/Au layer, a Cr/Al/Cr/Ni/Au layer, or an Ag/NiTi/TiW/Pt layer. The first electrode pad 20A and the second electrode pad 30A may serve as current paths for supplying power to the first semiconductor layer 121 and the second semiconductor layer 122 as external power sources. In an embodiment, the first electrode pad 20A and the second electrode pad 30A comprise a multi-layer structure, for example, the metal structure of the first electrode pad 20A and the second electrode pad 30A connected to an external power source may be formed by stacking a gold (Au) layer and a tin (Sn) layer or stacking a tin (Sn) layer and a silver (Ag) layer in multiple layers, wherein the gold (Au) layer or the silver (Ag) layer is used as the outermost metal layer of the first electrode pad 20A and the second electrode pad 30A, and the composition ratio of the gold element to the tin layer or the composition ratio of the silver element to the tin layer is 0.25% -2.25%. Alternatively, the thickness ratio of the gold layer to the tin layer or the thickness ratio of the silver layer to the tin layer is 0.25% -2.25% of the tin layer. The first electrode pad 20A and the second electrode pad 30A comprise a thickness of 0.8 to 100. Mu.m, preferably 1 to 60. Mu.m, more preferably 1.1 to 6. Mu.m. In one embodiment, the first electrode pad 20A and the second electrode pad 30A comprise metal layers of tin (Sn) having a thickness of 3.5-8.5 μm. In one embodiment, the first electrode pad 20A and/or the second electrode pad 30A comprises an alloy layer of tin silver (SnAg) having a thickness of between 8 and 10 μm.

Fig. 3 shows a light emitting module 100 according to an embodiment of the invention. The light emitting module 100 includes a carrier 101, the carrier 101 is provided with circuit bonding pads 8a and 8b, and the light emitting device 1 is flip-chip (flip-chip) bonded to the circuit bonding pads 8a and 8b via the conductive bonding layer 80 by the first electrode pad 20A and the second electrode pad 30A, respectively. In one embodiment, the method of bonding includes, but is not limited to, soldering, wherein the conductive bonding layer 80 comprises metallic solder. In this way, the light emitted from the semiconductor stack 12 is mainly extracted out through the bottom surface 10b and the side surface 10c of the substrate 10. In an embodiment, the light emitting module 100 may further include a transparent adhesive (not shown) disposed on the carrier 101 to encapsulate the light emitting element 1. The transparent adhesive material comprises Silicone, epoxy, acrylic or a mixture thereof. In one embodiment, the light emitting device 1 further includes a reflective structure (not shown) disposed on the lower surface 10b of the substrate 10 for reflecting the light emitted from the semiconductor stack 12, so that the light is extracted from the side surface 10c of the substrate 10. Specific details of the reflective structure may be as described above for the insulating material stack 50 of the various embodiments.

Fig. 4A shows a partial enlarged exterior photograph of the vicinity of the opening 502 and the second contact portion 301'. The photograph shows that the second insulating portion 23b has the same shape as the second contact portion 301' above it. Fig. 4B shows an enlarged partial cross-sectional view of the vicinity of the opening 502, i.e., the region R2 in fig. 1B, and may also show a partial cross-sectional view of the region R1 along the cross-sectional line XX' in fig. 1A.

As shown in fig. 4B, the sidewall 50s of the insulating material stack 50 located at the opening 502 forms a second acute angle with the upper surface (or XY plane) of the second contact 301 (301 ') and has an angle θ2, and the sidewall of the second contact 301 (301') forms a first acute angle with the upper surface (or XY plane) of the transparent conductive layer 18 and has an angle θ1.θ1 and θ2 are not greater than 80 degrees, and in one embodiment are between 30 degrees and 80 degrees. The insulating material stack 50 conformally covers the sidewalls and upper surface of the second contact electrode 30. The second electrode pad 30A conformally covers the insulating material stack 50 and the sidewalls of the opening 502, such that the upper surface of the second electrode pad 30A forms a plateau region S1 and a recess region S2 on the second contact portion 301 (301'), the plateau region S1 has a maximum height relative to other regions of the upper surface of the second electrode pad 30A, and the recess region S2 is correspondingly located in the opening 502 and surrounded by the plateau region S1. The plateau region S1 is, for example, annular and has a horizontal upper surface; the recess S2 comprises, for example, an annular inclined surface surrounding a horizontal bottom surface, wherein the inclined surface is interposed between the horizontal top surface and the horizontal bottom surface.

Referring to fig. 3, in the process of bonding the light emitting device 1 to the carrier 101, since the plateau S1 on the upper surface of the second electrode pad 30A has a maximum height, the stress is easily concentrated in the plateau S1 because the plateau S1 is the portion of the light emitting device 1 that contacts the conductive bonding layer 80 first. If the area of the plateau S1 is too small, the stress may be too large, so that the insulating material stack 50 may be damaged or broken near the opening 502, especially at the location where the insulating material stack 50 has a turn, and the light emitting element 1 may fail. The area of the plateau S1 is related to the thickness of the insulating material stack 50 and the angle θ2 of the second acute angle, the thickness of the second contact 301 (301') and the angle θ1 of the first acute angle, the width of the opening 502. Fig. 5A and 5B show different comparative examples of the region R2 in fig. 1B, respectively. Referring to the comparative example shown in fig. 5A, the same structure as the embodiment of fig. 4B and both openings 502 have the same bottom width, except that the comparative example has a smaller θ2. Generally, the coating of the second electrode pad 30A thereon is facilitated as θ2 is smaller, i.e., the inclination of the sidewall of the opening 502 is slower. However, the area of the elevated region S1 on the upper surface of the second electrode pad 30A decreases as the angle θ2 of the second acute angle becomes smaller, and when θ2 is too small, the stress may be too large to cause the light emitting element 1 to fail. Referring to the comparative example shown in fig. 5B, the structure is substantially the same as that of the embodiment of fig. 4B and the angle θ2 of the second acute angle is the same, except that the opening 502 of the comparative example has a larger bottom surface. Generally, the wider the opening 502, the larger the contact area between the second electrode pad 30A and the second contact electrode 30 is, which is advantageous for conducting current. However, as shown in fig. 5B, when the width of the opening 502 is excessively large, the area of the plateau S1 is reduced, which tends to cause the above-described excessive stress. Therefore, in the present embodiment, the projection area of the plateau S1 on the horizontal plane (XY plane) is set to a specific range by adjusting the thickness of the second electrode pad 30A, the thickness of the insulating material stack 50, the angle θ2 of the second acute angle, the thickness of the second contact 301 (301') and the angle θ1 of the first acute angle, and the width of the opening 502. The projection area of the elevated region S1 on the horizontal plane (XY plane) is A1, the sum of the projection areas of the elevated region S1 and the recessed region S2 on the horizontal plane (XY plane) is A2, wherein A1/A2 is 50% -80%, and θ2 is 30-80 degrees, which can satisfy both the coverage of the second electrode pad 30A on the opening 502 and the reduction of stress and increase of reliability of the insulating material stack 50.

Fig. 6 shows an enlarged partial cross-sectional view of the region R2 in fig. 1B, near the opening 502 and the second contact 301 (301'). By controlling the etching conditions of the insulating material stack 50, the sidewall of the opening 502 forms an arc surface at a portion near the top of the opening 502, so that the portion corresponding to the second electrode pad 30A is also an arc surface, that is, the plateau region S1 may be substantially a plane as shown in fig. 4A and 4B, may also include an arc surface as shown in fig. 6, or may include an arc surface at the junction between the plateau region S1 and the recess region S2. As shown in fig. 6, the upper surface of the second electrode pad 30A has a highest point defined as a range within a height drop of 1 μm measured downward t, and the recess region S2 and the projection areas A1 and A2 are correspondingly defined as the upper surface of the upper region S1, wherein A1/A2 is between 50% and 80%, and θ2 is between 30 degrees and 80 degrees.

In an embodiment, as shown in fig. 4B and fig. 6, the projection position of the outermost edge E1 of the plateau S1 on the horizontal plane (XY plane) is within the projection range of the sidewall of the second contact portion 301 (301') on the horizontal plane (XY plane), so as to reduce the stress of the insulating material layer 50 near the opening 502 and increase the reliability of the light emitting device 1 when the light emitting device 1 is subsequently bonded to the carrier 101.

Fig. 7A shows an enlarged partial view of the region R1 in fig. 1A, and fig. 7B shows a cross-sectional view along the line BB' in fig. 7A. The BB' cross-sectional structure of the region R1 is similar to that of FIG. 4B, except that the second contact electrode 20 includes a second finger 302 extending from the second contact 301. As described above, the high-level region S1 where stress concentration is likely to occur is located near the opening 502 above the second contact portion 302, that is, within the outer contour C1 of the second contact portion 302 as shown in fig. 7A. Similarly, in this embodiment, A1/A2 is between 50% and 80%, and θ2 is between 30 and 80 degrees.

In the embodiment of the present invention, the current blocking structure 23 (23 a, 23B) includes a stack of insulating materials, and the current blocking structure 23 (23 a, 23B) is formed by stacking one or more pairs of insulating materials with different refractive index, for example, the specific structure is the same as the structure of the insulating material stack 50 described in fig. 2A and 2B, and provides a reflection function for light with a specific wavelength range and/or a specific incident angle range, so that when the light emitted by the semiconductor stack 12 is directed to the first contact electrode 20 and the second contact electrode 30, the light is reflected by the first insulating portion 23a under the first contact electrode 20 and the second insulating portion 23B under the second contact electrode 30, and is extracted from other portions of the light emitting element 1, thereby increasing the brightness of the light emitting element 1. In one embodiment, the current blocking structure 23 (23 a,23 b) has a reflectivity of more than 60% for the dominant wavelength and/or the peak wavelength of the light emitting element 1. The thickness of the current blocking structure 23 (23 a,23 b) is between 0.1 μm and 2 μm, in one embodiment between 0.2 μm and 1 μm. In one embodiment, the thickness of the current blocking structure 23 (23 a,23 b) is less than the thickness of the insulating material stack 50 and greater than the thickness of the first contact electrode 20 and the second contact electrode 30. In one embodiment, the pairs of insulating material in the current blocking structures 23 (23 a,23 b) are smaller than the pairs of insulating material in the stack of insulating material 50. In general, the larger the horizontal area of the current blocking structure 23 (23 a,23 b), the larger the reflective area can be provided and the luminance of the light emitting element can be increased. However, when the area of the current blocking structure 23 (23 a,23 b) is larger, the forward operating voltage Vf (forward voltage) of the light emitting element 1 may be increased, reducing the power efficiency. Thus, in one embodiment, the difference between the width of the current blocking structure 23 (23 a,23 b) and the width of the contact electrodes 20 and 30 directly above it is between 1 μm and 15 μm.

Fig. 8A shows a partial enlarged view of the left half of fig. 7B. In one embodiment, the current blocking structure 23 is formed on the semiconductor stack 12 by the deposition method of the insulating material stack 50, and then patterned by a photoresist lift-off (lift-off) method. As shown in fig. 8A, the sidewall of the current blocking structure 23 includes a plurality of sub-sidewalls, and here, the second insulating portion 23b is taken as an example, and as shown in fig. 8A, the sidewall of the second insulating portion 23b includes a first sub-sidewall 23s1 and a second sub-sidewall 23s2, wherein the first sub-sidewall 23s1 and the second sub-sidewall 23s2 have different slopes with respect to a horizontal plane, for example, the slope of the first sub-sidewall 23s1 is smaller than the slope of the second sub-sidewall 23s 2. In this way, the transparent conductive layer 18 and the insulating material layer 50 on the current blocking structure 23 have better batch property, and the crack is reduced. Fig. 8B and 8C are microscopic images showing different variations of fig. 8A. As shown in fig. 8B, the sidewalls of the second insulating portion 23B include a first sub-sidewall 23s1, a second sub-sidewall 23s2, and a third sub-sidewall 23s3, the slope of the first sub-sidewall 23s1 is smaller than the slope of the second sub-sidewall 23s2, and the slope of the second sub-sidewall 23s2 is smaller than the slope of the third sub-sidewall 23s 3. The third sub-sidewall 23s3 has a slope length greater than that of the first sub-sidewall 23s1 or greater than that of the second sub-sidewall 23s 2. In another variation, as shown in fig. 8C, the sidewalls of the second insulating portion 23b include a first sub-sidewall 23s1, a second sub-sidewall 23s2, a third sub-sidewall 23s3 and a fourth sub-sidewall 23s4, wherein the slope of the first sub-sidewall 23s1 is greater than the slope of the fourth sub-sidewall 23s4, for example, the slope relationship is: the first sub-sidewall 23s1> the slope of the second sub-sidewall 23s2, and the third sub-sidewall 23s3> the fourth sub-sidewall 23s4. Preferably, the slope of the first sub-sidewall 23s1 is not greater than 45 degrees. The above description about the sidewall structure of the second insulating portion 23b also applies to the sidewall structure of the first insulating portion 23 a. The third sub-sidewall 23s3 has a slope length greater than that of the first sub-sidewall 23s1, or greater than that of the fourth sub-sidewall 23s4, or greater than that of the second sub-sidewall 23s 2.

Fig. 9A shows a light emitting device 2 according to another embodiment of the invention. Fig. 9B is a cross-sectional view taken along line A-A' of fig. 9A. The difference between the light emitting element 2 and the light emitting element 1 is that the light emitting element 2 includes a plurality of light emitting units, for example, light emitting units 22a and 22b are separately disposed on the upper surface 10a of the substrate 10, and each of the light emitting units 22a and 22b includes the semiconductor stack 12 separated from each other by the trench 36. The long sides of the light emitting units 22a and 22b are arranged along the long sides of the light emitting element 2. The upper surface 10a of the substrate 10 comprises a walkway region not covered by the semiconductor stack 12, said walkway region being located around the light emitting element 2 and surrounding the light emitting units 22a and 22b. In this embodiment, the upper surface 121a of the first semiconductor layer 121 of each semiconductor stack 12 includes a contact region of the first contact electrode 20, and a surrounding mesa region around the active layer 123 and the second semiconductor layer 122 around the semiconductor stack 12, wherein the contact region and the surrounding mesa region are not covered by the active layer 123 and the second semiconductor layer 122. In another embodiment, as shown in fig. 9C, the upper surface 121a of the first semiconductor layer 121 does not include the surrounding mesa region except for the contact region where the first contact electrode 20 is disposed. Thus, as shown in fig. 9C, the sidewall 12s of the semiconductor stack 12 is continuously sloped from the second semiconductor layer 122 down to the first semiconductor layer 122.

As shown in fig. 9A, the light emitting element 2 further includes a plurality of conductive structures 60 formed between the adjacent light emitting units 22a and 22b and on each of the light emitting units 22a and 22b, wherein two ends of each conductive structure 60 are respectively connected to the contact electrodes on each of the light emitting units 22a and 22b to electrically connect each of the light emitting units 22a and 22b, so as to form a series or parallel light emitting unit array, for example, one end of each conductive structure 60 is connected to the second finger portion 302 on the light emitting unit 22a, and the other end is connected to the first finger portion 202 on the light emitting unit 22b, so that the light emitting units 22a and 22b are electrically connected in series. The material of the conductive structure 60 comprises a metal, for example, the same metal material as the contact electrodes 20 and 30. The second finger 302 on the light emitting unit 22a is disposed along the long side of the light emitting unit 22a, and the length of the second finger 302 on the light emitting unit 22a is at least 30% of the length of the long side of the light emitting unit 22 a. The first finger 202 on the light emitting unit 22b is disposed along the long side of the light emitting unit 22b, and the length of the first finger 202 on the light emitting unit 22b is at least 30% of the length of the long side of the light emitting unit 22 b. In an embodiment, the width of the conductive structure 60 is greater than the width of the first finger 202 and/or the width of the second finger 302, and the second finger 302 on the light emitting unit 22a and the first finger 202 on the light emitting unit 22b are respectively connected to two opposite corners of the conductive structure 60.

The light emitting device 2 further comprises a trench 36 between two adjacent light emitting units 22a and 22b, wherein the bottom of the trench 36 exposes the upper surface 10a of the substrate 10, and the sidewall of the trench 36 is defined by the facing inner sidewalls of the two adjacent light emitting units 22a and 22 b. In this embodiment, the current blocking structure 23 includes a second insulating portion 23b and a third insulating portion 23c. The second insulating portion 23b includes a plurality of separate portions between the second finger portion 302 and the second semiconductor layer 122 on the light emitting unit 22a, and between the second contact electrode 30 and the second semiconductor layer 122 on the light emitting unit 22b, respectively. The third insulating portion 23c covers the trench 36, more specifically, the third insulating portion 23c covers the substrate upper surface 10a in the trench 36, and the light emitting units 22a and 22b are adjacent to opposite inner sidewalls of the trench 36 and further extend onto the semiconductor stack 12 of the light emitting units 22a and 22b, wherein the third insulating portion 23c is connected to a portion of the second insulating portion 23 b. As shown in fig. 9A, a plurality of conductive structures 60 are disposed between the light emitting units 22a and 22b separately and adjacent to two opposite long sides of the light emitting element 2, respectively. The third insulating portion 23c is a single structure located under the plurality of conductive structures 60 and is disposed along the trench 36, and the third insulating portion 23c covers the entire trench 36 and extends to the aforementioned walkway region of the substrate upper surface 10 a. That is, the length of the third insulating portion 23c in the Y direction is substantially equal to the length (short side length) of the light emitting element 2 in the Y direction. In one embodiment, as shown in fig. 9A, the edge E5 of the third insulating portion 23c is aligned with the long side of the light emitting element 2. In another embodiment (not shown), the third insulating portion 23c is provided along the trench 36, covering the entire trench 36 but not the walkway region of the substrate upper surface 10 a. In another embodiment (not shown), the third insulating portion 23c of the light emitting element 2 includes a plurality of separate insulating portions respectively disposed under the plurality of conductive structures 60.

The insulating material stack 50 covers the semiconductor stack 12, the plurality of conductive structures 60, and the trenches 36 of the light emitting cells 22a and 22b, wherein the insulating material stack 50 includes a plurality of openings 501 over the light emitting cell 22a and a plurality of openings 502 over the light emitting cell 22 b. The first electrode pad 20A is located on the insulating material stack 50 and is connected to the first contact portions 201 and 201' thereunder through a plurality of openings 501, for example, three openings 501 as shown in fig. 9A. The second electrode pad 30A is located on the insulating material layer 50 and is connected to the second contact portions 301 and 301' thereunder through a plurality of openings 502, as shown in fig. 9A, for example, the number of the plurality of openings 502 is 3. The first electrode pad 20A does not cover the second finger 302 on the light emitting unit 22a, and the second electrode pad 30A does not cover the first finger 202 on the light emitting unit 22b, specifically, the first electrode pad 20A does not overlap the second contact electrode 30 in the Z direction; the first electrode pad 30A does not overlap the first contact electrode 20 in the Z direction, and therefore, when the insulating material stack 50 is damaged or cracked, the electrode pad does not short with the contact electrode of a different conductivity type. As shown in fig. 9A, the first contact electrode 20 (201, 201', 202) on the light emitting unit 22a and the second contact electrode 30 (301, 301', 302) on the light emitting unit 22b are substantially symmetrically arranged with the trench 36 as the symmetry axis, so that the current distribution and the brightness in the light emitting units 22a and 22b can be made uniform. The specific structures of the elements of the light emitting element 2, such as materials, thicknesses, sidewall angles, etc., are not specifically described in this embodiment and have the same names and numbers as those of the light emitting element 1, and reference is made to the description of the light emitting element 1, so that the description thereof will not be repeated.

Fig. 10 shows a light emitting element 3 according to another embodiment of the invention. The light emitting element 3 is a light emitting cell array like the light emitting element 2, except that the light emitting element 3 includes three light emitting cells 22a to 22c disposed on the substrate 10, short sides of each of the light emitting cells 22a to 22c being disposed along long sides of the light emitting element 3, and adjacent light emitting cells 22a to 22c being electrically connected by a single conductive structure 60. Specific structures of the respective elements of the light emitting element 3, such as materials, thicknesses, sidewall angles, etc., are not specifically described in this embodiment and have the same names and reference numerals as those of the light emitting element 1 or 2, and thus, reference is made to the description of the light emitting element 1 or 2, and thus, a detailed description thereof will be omitted.

As shown in fig. 10, the first contact electrode 20 and the second finger 302 are provided on the light-emitting unit 22a along the long side of the light-emitting unit 22 a. The first electrode pad 20A is located on the insulating material stack 50 above the light emitting unit 22a, connected to the first contact 201 via the opening 501. The first electrode pad 20A bypasses the first finger 202 and the second finger 302 from the top view, and does not overlap the first finger 202 and the second finger 302 in the Z direction. Further, the first electrode pad 20A includes an outer protrusion 20p overlapping the first contact 201 in the Z direction, and in one embodiment, the outer protrusion 20p exceeds at least 1 μm of the edge of the first contact 201. On the light emitting unit 22b, the second finger 302 is arc-shaped, which in one embodiment bypasses the central area of the light emitting element 3. Currently, light emitting devices are commonly attached to a temporary film (e.g., blue film) in a die form, and a thimble is applied to the temporary film to remove the light emitting device acted on by the thimble when the light emitting device is subsequently processed, wherein the point of application of the thimble corresponds to a central area between two electrode pads (e.g., the first electrode pad 20A and the second electrode pad 30A) of the light emitting device. In the light emitting element 3 of the present embodiment, the second finger 302 located on the light emitting unit 22b bypasses the central area of the light emitting element 3, so that the light emitting element 3 has a flat central area, and when the ejector pin is used to remove the light emitting element 3, uneven stress caused by the surface of the light emitting element 3 at the ejector pin can be avoided, and the risk of failure of the light emitting element 3 is reduced. The second electrode pad 30A is located on the insulating material stack 50 above the light emitting unit 22c and is connected to the second contact 201 via the opening 502.

In another embodiment, the light emitting device 2 or 3 further includes a reflective structure (not shown) disposed on the lower surface 10b of the substrate 10 for reflecting the light emitted from the semiconductor stack 12 so that the light is mainly extracted from the side surface 10c of the substrate 10. The reflective structure may be formed by stacking one or more pairs of insulating material layers of different refractive indices, such as the aforementioned insulating material stack 50.

The light emitting device according to any of the embodiments of the present invention, such as the light emitting devices 2 and 3, is equally applicable to the embodiment of fig. 3, wherein the light emitting device according to each embodiment is used to replace the light emitting device 1 of fig. 3, and the first electrode pad 20A and the second electrode pad 30A corresponding to the light emitting device according to each embodiment are respectively bonded to the circuit bonding pads 8a and 8b via the conductive bonding layer 80, so as to form the light emitting module 100. Similarly, the specific structures of the light emitting elements of the embodiments, such as the light emitting elements 2 and 3, in the regions R1 and R2 can also be applied to the structures described in fig. 4A to 8C, which are not described in detail in the embodiments.

Fig. 11 shows a cross-sectional view of a display device backlight unit 103, the display device backlight unit 103 comprising the light emitting elements of any of the embodiments described above. The display device backlight unit 103 includes a housing 300, in which the light emitting module 100 shown in fig. 3 is accommodated, and the optical film 112 is disposed above the light emitting module 100. The optical film 112 is, for example, a light diffusing sheet (light diffusing sheet). In the present embodiment, the backlight unit 103 is a direct type backlight unit. The light emitting module 100 includes a carrier 101, and light emitting elements according to any embodiment of the invention are mounted and arranged on the carrier 101. In another embodiment (not shown), the light emitting module 100 includes a carrier plate 101 and a plurality of light emitting element packages mounted and arranged on an upper surface thereof, the light emitting element packages enclosing the light emitting element of any of the foregoing embodiments therein, and mounted on the upper surface of the carrier plate 101 in a flip-chip manner.

Fig. 12A shows a schematic top view of a display device 105, where the display device 105 includes the light emitting element according to any of the foregoing embodiments. As shown in fig. 12A, the display device 105 includes a display substrate 200, wherein the display substrate 200 includes a display area 210 and a non-display area 220, and a plurality of pixel units PX arranged in the display area 210 in the display substrate 200, each pixel unit PX includes a plurality of sub-pixels px_ A, PX _b and px_c, respectively, and each sub-pixel emits light of different colors. The non-display area 220 is provided with a data line driving circuit 130 and a scan line driving circuit 140 for controlling each pixel unit PX. The pixel unit PX includes the light emitting element of any of the above embodiments.

Fig. 12B is a partial cross-sectional view of the pixel unit PX in fig. 12A, wherein the display substrate 200 is provided with a circuit bonding pad 8' and a circuit (not shown) including active electronic components, such as transistors. The light emitting element package 4 is flip-chip bonded to the display substrate 200. Similar to the light emitting module 100 shown in fig. 3, the light emitting device package 4 includes a carrier 101, one side of the carrier 101 is provided with circuit bonding pads 8a and 8b and a circuit (not shown), and a plurality of light emitting devices including any light emitting device according to the present invention are mounted on the side of the carrier 101, and the first electrode pad 20A and the second electrode pad 30A are respectively bonded to the circuit bonding pads 8a and 8b via the conductive bonding layer 80 in a flip-chip manner. The other side of the carrier 101 in the light emitting device package 4 further includes a plurality of bonding pads 8″ connected to the circuit bonding pads 8' on the display substrate 200, so that the driving circuit on the display substrate 200 is electrically connected to the plurality of light emitting devices.

The foregoing embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those of ordinary skill in the art without departing from the principles and spirit of the invention. All equivalent changes and modifications of shape, construction, characteristics and spirit according to the present invention shall be included in the appended claims.

Claims (10)

1. A light emitting element comprising:

a semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer;

a first contact electrode and a second contact electrode are positioned on the semiconductor lamination, wherein the first contact electrode comprises a first contact part positioned on the first semiconductor layer, and the second contact electrode comprises a second contact part positioned on the second semiconductor layer;

an insulating material stack on the semiconductor stack including an opening on the second contact; and

the first electrode pad and the second electrode pad are positioned on the insulating material lamination, wherein the second electrode pad is filled in the opening to be connected with the second contact part;

wherein the second electrode pad comprises an upper surface, and the upper surface comprises a plateau region and a concave region which are correspondingly positioned on the second contact part;

Wherein the plateau region has a maximum height relative to other regions of the upper surface;

wherein the projection area of the plateau area on the horizontal plane is A1, the sum of the projection areas of the plateau area and the concave area on the horizontal plane is A2, and the ratio of A1/A2 is between 50% and 80%.

2. The light-emitting device according to claim 1, wherein the semiconductor stack comprises a pair of long sides and a pair of short sides;

wherein the second contact electrode further comprises a second finger portion connected to the second contact portion and extending along one of the long sides; and

wherein the second finger is not parallel to the long side.

3. The light-emitting device of claim 1, further comprising a current blocking structure under the first contact electrode and/or the second contact electrode, wherein the current blocking structure comprises a plurality of insulating layers with different refractive indexes stacked alternately; and

the side wall of the current blocking structure comprises a plurality of sub side walls with different slopes.

4. The light emitting device of claim 1, wherein the first contact is located at a corner of the first semiconductor layer; and the first electrode pad includes an outer protrusion protruding toward a corner, the outer protrusion covering the first contact portion.

5. The light-emitting device according to claim 1, further comprising a transparent conductive layer over the second semiconductor layer;

wherein the first semiconductor layer comprises an upper surface which is not covered by the active layer and the second semiconductor layer;

in cross-section, the semiconductor stack comprises a continuous sidewall extending from the second semiconductor layer to a bottom of the first semiconductor layer;

the distance between the transparent conductive layer and the second semiconductor layer near the upper surface of the first semiconductor is smaller than the distance between the transparent conductive layer and the second semiconductor layer near the continuous side wall.

6. The light-emitting device of claim 1, further comprising a substrate and a conductive structure; wherein:

the first contact electrode further comprises a plurality of first fingers, and the second contact electrode further comprises a plurality of second fingers;

the semiconductor stack includes a first unit, a second unit, and a third half unit separately formed on the substrate;

the first contact portion and the first electrode pad are formed on the first semiconductor layer of the first cell, and the second contact portion and the second electrode pad are formed on the second semiconductor layer of the third cell;

the conductive structure is formed among the first unit, the second unit and the third unit and electrically connects the first unit, the second unit and the third unit; and

One of the second fingers is formed on the second semiconductor stack and includes a central region that arcs around the light emitting element and a central region of the second cell.

7. The light emitting device of claim 1, further comprising a substrate, a current blocking structure, and a plurality of conductive structures; wherein:

the semiconductor stack includes a first cell and a second cell separately formed on the substrate;

the first contact portion and the first electrode pad are formed on the first semiconductor layer of the first cell, and the second contact portion and the second electrode pad are formed on the second semiconductor layer of the second cell;

the conductive structures are respectively arranged on two opposite sides of the light-emitting element and are electrically connected with the first unit and the second unit; and

the current blocking structure comprises a single structure formed between the first cell and the second cell and located below the conductive structures.

8. The light emitting device of claim 7, wherein the unitary structure comprises two edges aligned with the opposite sides, respectively.

9. The light emitting device of claim 7, further comprising a trench between the first cell and the second cell, and a bottom of the trench comprises an upper surface of the substrate;

Wherein the number of the first contact parts on the first unit and the number of the second contact parts on the second unit are respectively a plurality of.

Wherein the first contact electrode further comprises a first finger portion connected to one of the first contact portions, and the second contact electrode further comprises a second finger portion connected to one of the second contact portions; and

in a plan view, the first contact portion on the first unit and the second contact portion on the second unit are substantially symmetrically arranged with the trench as a symmetry axis.

10. A light emitting module, comprising:

a carrier plate;

a plurality of welding pads are positioned on the carrier plate;

a conductive bonding layer; and

the light-emitting element according to any one of claims 1 to 9;

wherein the first electrode pad and the second electrode pad are connected to the bonding pads through the conductive bonding layer.