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CN116564800A - A method of forming trenches with different depths on the surface of semiconductor at one time - Google Patents

A method of forming trenches with different depths on the surface of semiconductor at one time Download PDF

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Publication number
CN116564800A
CN116564800A CN202310807918.6A CN202310807918A CN116564800A CN 116564800 A CN116564800 A CN 116564800A CN 202310807918 A CN202310807918 A CN 202310807918A CN 116564800 A CN116564800 A CN 116564800A
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mask material
etching
etched
different depths
forming
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CN116564800B (en
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王本忠
何惠彬
李翔
罗科义
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Fujian Kirisun Communications Co ltd
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Xinzhongxiang Chengdu Microelectronics Co ltd
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    • H10P76/20
    • H10P50/242
    • H10P76/408
    • H10P76/4085
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention belongs to the technical field of semiconductor device etching, and particularly relates to a method for forming grooves with different depths on the surface of a semiconductor at one time, which comprises the steps of forming a first mask material and a second mask material with slope structures at designated positions on the surface of a etched material, forming a photoresist layer on the second mask material through a photoetching process, and forming a series of windows according to design; etching the second mask material through the series of windows until the first mask material is exposed; and selecting etching conditions of dry etching to enable the etching conditions to have etching effects on the first mask material and the etched material, then performing next etching until a plurality of series grooves with different depths are formed on the etched material, and finally removing all mask materials. The method can form a plurality of series grooves with different depths by one-time photoetching and dry etching technology, has high efficiency and reduces the labor and time cost.

Description

一种在半导体表面一次形成具有不同深度沟槽的方法A method of forming trenches with different depths on the surface of semiconductor at one time

技术领域technical field

本发明属于半导体器件制备的刻蚀技术领域,尤其涉及一种在半导体表面一次性形成具有不同深度系列沟槽的方法。The invention belongs to the technical field of etching for semiconductor device preparation, in particular to a method for forming a series of grooves with different depths on the surface of a semiconductor at one time.

背景技术Background technique

在制备半导体器件的过程中往往需要在半导体材料表面或其上不同功能材料的表面形成不同大小和深度的精细沟槽结构,这些沟槽结构对器件性能具有关键作用。In the process of preparing semiconductor devices, it is often necessary to form fine groove structures of different sizes and depths on the surface of semiconductor materials or on the surfaces of different functional materials. These groove structures play a key role in device performance.

比如,大功率碳化硅MOSFET器件的设计中通常需要设计一系列终端结构以保证器件的正常工作。其中一种设计是围绕工作区域刻蚀多个系列沟槽,且沟槽深度逐渐变化以便提高器件性能。For example, in the design of high-power silicon carbide MOSFET devices, it is usually necessary to design a series of terminal structures to ensure the normal operation of the device. One such design is to etch a series of trenches around the active region with gradually varying trench depths to improve device performance.

这些精细的沟槽结构往往是通过光刻工艺加干法刻蚀工艺形成,干法刻蚀工艺所使用的方法之一是利用等离子体在反应气体的作用下,通过物理作用和化学反应使暴露在等离子束的半导体表面被移除从而达到刻蚀的作用以形成沟槽结构。此种方法称为离子束刻蚀法,其主要特点是效率高,方向性强。这种方法还需要光刻工艺的配合在掩膜材料上产生图形,也就是把需要刻蚀的表面暴露给等离子束,而不需要刻蚀的部分用掩膜材料保护起来。These fine groove structures are often formed by photolithography process plus dry etching process. One of the methods used in dry etching process is to use plasma under the action of reactive gas to make exposed through physical action and chemical reaction. In the plasma beam the semiconductor surface is removed and etched to form trench structures. This method is called ion beam etching, and its main features are high efficiency and strong directionality. This method also requires the cooperation of photolithography to produce patterns on the mask material, that is, the surface to be etched is exposed to the plasma beam, and the part that does not need to be etched is protected by the mask material.

其具体工艺如下:在半导体表面涂敷一层光刻胶层,其特点是被光照射的部分可以被特定化学溶剂溶解掉而没有被光照射的部分则不能(反之亦然)。光通过光刻板,其上已设计形成可以透光和不能透光的图形照射在光刻胶层上从而将光刻板上设计好的图形转移到光刻胶层上,再通过湿法腐蚀的方法在掩膜上形成需要刻蚀去除的表面窗口,最后通过干法或湿法腐蚀的方式在半导体内形成需要的沟槽结构。如图1所示,目前形成具有不同深度的系列沟槽的方法是:第一次光刻加干法刻蚀形成具有第一深度的沟槽,第二次光刻加干法刻蚀形成具有第二深度的沟槽,以此类推,通过多次光刻加多次刻蚀的方式形成不同深度的系列沟槽。The specific process is as follows: a layer of photoresist is coated on the surface of the semiconductor, which is characterized in that the part irradiated by light can be dissolved by a specific chemical solvent, but the part not irradiated by light cannot (and vice versa). The light passes through the photoresist plate, on which it has been designed to form light-transmitting and non-transmittable patterns and irradiates on the photoresist layer so that the designed pattern on the photoresist plate is transferred to the photoresist layer, and then through the method of wet etching Form the surface windows that need to be etched and removed on the mask, and finally form the required trench structure in the semiconductor by dry or wet etching. As shown in Figure 1, the current method of forming a series of trenches with different depths is: first photolithography plus dry etching to form trenches with the first depth, and second photolithography plus dry etching to form trenches with For the trenches of the second depth, by analogy, a series of trenches of different depths are formed by multiple times of photolithography and multiple times of etching.

但此种方法应用在所需系列沟槽数量比较多的情况下,就需要多次反复光刻加刻蚀,存在效率非常低的技术问题。However, when this method is applied to a large number of required series of trenches, multiple repetitions of photolithography and etching are required, and there is a technical problem of very low efficiency.

发明内容Contents of the invention

为了解决以上技术问题,本发明提供一种在半导体表面一次形成具有不同深度沟槽的方法,可以通过一次光刻加干法刻蚀技术形成多个具有不同深度的系列沟槽,效率高,人力和时间成本大大降低。In order to solve the above technical problems, the present invention provides a method for forming grooves with different depths on the semiconductor surface at one time, which can form multiple series of grooves with different depths by one-time photolithography plus dry etching technology, with high efficiency and less manpower. and time costs are greatly reduced.

解决以上技术问题的本发明中的一种在半导体表面一次形成具有不同深度沟槽的方法,包括以下步骤:A method of forming grooves with different depths on the semiconductor surface at one time in the present invention that solves the above technical problems includes the following steps:

S1:在被刻蚀材料的表面的指定位置形成具有厚度逐渐减少的斜坡结构的第一掩膜材料;S1: forming a first mask material with a slope structure whose thickness gradually decreases at a designated position on the surface of the etched material;

S2:在第一掩膜材料上形成厚度均匀且具有同样斜坡的第二掩膜材料;S2: forming a second mask material with uniform thickness and the same slope on the first mask material;

S3:在第二掩膜材料形成一层厚度均匀且具有同样斜坡的光刻胶层,并通过光刻工艺按所需在光刻胶层的特定的斜坡区域上按设计形成系列窗口,局部暴露第二掩膜材料;S3: Form a photoresist layer with uniform thickness and the same slope on the second mask material, and form a series of windows according to the design on the specific slope area of the photoresist layer through the photolithography process, and partially expose a second mask material;

S4:将第二掩膜材料上暴露位置腐蚀掉,使系列窗口转移到第二掩膜材料上,局部暴露第一掩膜材料;S4: Etching away the exposed positions on the second mask material, transferring the series of windows to the second mask material, and partially exposing the first mask material;

S5:刻蚀第一掩膜材料及被刻蚀材料,直到在被刻蚀材料上刻蚀出具有不同深度的系列沟槽后,去除第一掩膜材料和第二掩膜材料。S5: Etching the first mask material and the material to be etched until a series of trenches with different depths are etched on the material to be etched, then removing the first mask material and the second mask material.

所述S1中第一掩膜材料通过压印法来形成。The first mask material in S1 is formed by imprinting.

优化方案中,所述第一掩膜材料为适合压印的材料,第一掩膜材料可为有机聚合物,且通过干法刻蚀法对被刻蚀材料进行刻蚀时,第一掩膜材料也能被刻蚀。In the optimized solution, the first mask material is a material suitable for imprinting, the first mask material can be an organic polymer, and when the etched material is etched by dry etching, the first mask Materials can also be etched.

所述S2中形成第二掩膜材料的方法通过其它任何可形成均匀厚度薄膜的方法来形成。The method for forming the second mask material in S2 is formed by any other method that can form a thin film with uniform thickness.

所述第二掩膜材料可为二氧化硅,也可为金属。由于第二掩膜材料的刻蚀速率远小于第一掩膜材料和被刻蚀材料的刻蚀速率,以保证斜坡结构不会在整个刻蚀完成前被破坏。The second mask material can be silicon dioxide or metal. Since the etching rate of the second mask material is much lower than that of the first mask material and the material to be etched, it is ensured that the slope structure will not be destroyed before the entire etching is completed.

优化方案中,所述斜坡结构的角度≤45度。掩膜材料用斜坡,起到调节刻蚀前沿的作用。In the optimized scheme, the angle of the slope structure is ≤45 degrees. The slope of the mask material plays the role of adjusting the etching front.

所述S4和S5中通过干法或湿法刻蚀法将系列窗口转移到第二掩膜材料、第一掩膜材料上。In S4 and S5, the series of windows are transferred to the second mask material and the first mask material by dry or wet etching.

所述S5中通过干法刻蚀法将系列窗口转移到被刻蚀材料上。经过干法刻蚀继续将设计图形转移到半导体表面,去除掩膜材料,在半导体表面形成多个具有不同深度的系列沟槽。In S5, the series of windows are transferred to the material to be etched by dry etching. Continue to transfer the design pattern to the semiconductor surface after dry etching, remove the mask material, and form multiple series of grooves with different depths on the semiconductor surface.

所述S4中,第二掩膜材料的选取应满足的条件为:第二掩膜材料的刻蚀速率远小于第一掩膜材料和被刻蚀材料的刻蚀速率;其中,第一掩膜材料、被刻蚀材料与第二掩膜材料的刻蚀速率比较应在相同的刻蚀方法下。In said S4, the selection of the second mask material should meet the following conditions: the etching rate of the second mask material is much lower than the etching rate of the first mask material and the material to be etched; wherein, the first mask material The comparison of the etching rate of the material, the material to be etched and the second mask material should be under the same etching method.

所述S5中,第一掩膜材料的选取应满足的条件为:第一掩膜材料在垂直于表面方向的刻蚀速率等于被刻蚀材料的刻蚀速率,第一掩膜材料在平行于表面方向的刻蚀速率小于被刻蚀材料的刻蚀速率;其中,第一掩膜材料与被刻蚀材料的刻蚀速率比较应在相同的刻蚀方法下。In said S5, the selection of the first mask material should meet the following conditions: the etching rate of the first mask material in the direction perpendicular to the surface is equal to the etching rate of the material to be etched, and the first mask material in the direction parallel to the surface The etching rate in the surface direction is lower than the etching rate of the material to be etched; wherein, the etching rate of the first mask material and the material to be etched should be compared by the same etching method.

本发明中通过干法刻蚀法,使其有效刻蚀被刻蚀材料和第一掩膜材料,由于斜坡的存在,在其上形成的窗口区域存在高低差,因此刻蚀前沿到达被刻蚀材料的表面存在时间差,而最终在被刻蚀材料上形成的沟槽具有不同深度。In the present invention, the dry etching method is used to effectively etch the etched material and the first mask material. Due to the existence of the slope, there is a height difference in the window area formed thereon, so the etching front reaches the etched There is a time difference on the surface of the material, and the grooves finally formed on the etched material have different depths.

本发明提供了在半导体表面一次形成具有不同深度沟槽的方法,克服了如果系列沟槽数量比较多,就需要多次反复光刻加刻蚀,效率非常低的技术问题,本发明的方法仅通过一次光刻加干法刻蚀技术形成多个具有不同深度的系列沟槽,效率高,人力和时间成本大大降低。The present invention provides a method for forming grooves with different depths on the semiconductor surface at one time, which overcomes the technical problem that if the number of series of grooves is relatively large, repeated photolithography and etching are required, and the efficiency is very low. The method of the present invention only Multiple series of grooves with different depths are formed by one-time photolithography plus dry etching technology, which has high efficiency and greatly reduces labor and time costs.

附图说明Description of drawings

图1为本发明中传统离子束刻蚀法工艺流程图;Fig. 1 is traditional ion beam etching process flow chart among the present invention;

图2(a)为本发明中形成第一掩膜材料的示意图;Figure 2(a) is a schematic diagram of forming the first mask material in the present invention;

图2(b)为本发明中形成第一掩膜材料和第二掩膜材料的示意图;Figure 2(b) is a schematic diagram of forming the first mask material and the second mask material in the present invention;

图2(c)为本发明中光刻胶层的被刻蚀示意图;Figure 2(c) is a schematic diagram of the etched photoresist layer in the present invention;

图3为本发明中第二掩膜材料和光刻胶层的被刻蚀示意图;Fig. 3 is the etched schematic diagram of the second mask material and photoresist layer in the present invention;

图4为本发明中去除光刻胶层的示意图;Fig. 4 is the schematic diagram that removes photoresist layer among the present invention;

图5为本发明中第一掩膜材料、第二掩膜材料以及被刻蚀材料的被刻蚀示意图;5 is a schematic diagram of etching of the first mask material, the second mask material and the etched material in the present invention;

图6为本发明中去除第一掩膜材料和第二掩膜材料的示意图;6 is a schematic diagram of removing the first mask material and the second mask material in the present invention;

图中具体标识为:The specific identification in the figure is:

1-第一掩膜材料,2-被刻蚀材料,3-第二掩膜材料,4-斜坡结构,5-系列窗口,6-斜坡角度,7-系列沟槽,8-光刻胶层。1-first mask material, 2-etched material, 3-second mask material, 4-slope structure, 5-series windows, 6-slope angle, 7-series grooves, 8-photoresist layer .

具体实施方式Detailed ways

下面结合具体实施方式对本发明中做进一步的阐述:Below in conjunction with specific embodiment, do further elaboration among the present invention:

实施例1Example 1

如图2(a)所示,首先在被刻蚀材料2的表面的指定位置形成具有斜坡结构4的第一掩膜材料1;形成第一掩膜材料1的方法之一是压印方法,斜坡结构4的斜坡角度6可以设定为小于等于45度。As shown in Fig. 2(a), firstly, a first mask material 1 with a slope structure 4 is formed at a designated position on the surface of the etched material 2; one of the methods for forming the first mask material 1 is the embossing method, The slope angle 6 of the slope structure 4 can be set to be less than or equal to 45 degrees.

其中,指定位置是器件设计时需要刻蚀的沟槽所处的位置,与当时器件的结构相关,为实际所需而确定的。Wherein, the specified position is the position of the groove to be etched during device design, which is related to the structure of the device at that time and determined for actual needs.

如图2(b)所示,然后在第一掩膜材料1上形成第二掩膜材料3。形成第二掩膜材料3为其它方法来形成,其它方法为常规的方法,压印方法是将板料放在上、下模之间,在压力作用下使其材料厚度发生变化,并将挤压外的材料,充塞在有起伏细纹的模具形腔凸、凹处,而在工件表面得到形成起伏鼓凸及字样或花纹的一种成形方法,也为常规方法。As shown in FIG. 2( b ), a second mask material 3 is then formed on the first mask material 1 . Forming the second mask material 3 is formed by other methods, and the other methods are conventional methods. The embossing method is to place the sheet material between the upper and lower molds, and the thickness of the material is changed under pressure, and the extruded A forming method in which the pressed material is filled in the convex and concave parts of the mold cavity with undulating fine lines, and the undulating bulges and characters or patterns are formed on the surface of the workpiece, which is also a conventional method.

第二掩膜材料3可为二氧化硅,也可为金属。由于第二掩膜材料3的刻蚀速率远小于第一掩膜材料1和被刻蚀材料2的刻蚀速率,能保证斜坡结构4不会在整个刻蚀完成前被破坏。The second mask material 3 can be silicon dioxide or metal. Since the etching rate of the second mask material 3 is much lower than that of the first mask material 1 and the material to be etched 2, it can be ensured that the slope structure 4 will not be destroyed before the entire etching is completed.

如图2(c)所示,在第二掩膜材料3形成一层光刻胶层8,再通过光刻工艺在光刻胶层8上按设计形成系列窗口5。As shown in FIG. 2( c ), a layer of photoresist layer 8 is formed on the second mask material 3 , and then a series of windows 5 are formed on the photoresist layer 8 according to the design through a photolithography process.

本实例中掩膜材料有二层,分别为第一层的第一掩膜材料1和第二层的第二掩膜材料3,在第二层第二掩膜材料3的上面形成一层光刻胶层8,即为第三层,再利用光刻方法在第三层上开出系列窗口5,局部暴露第二掩膜材料3;In this example, the mask material has two layers, which are respectively the first mask material 1 of the first layer and the second mask material 3 of the second layer, and a layer of light is formed on the second layer of the second mask material 3. The resist layer 8 is the third layer, and a series of windows 5 are opened on the third layer by photolithography to partially expose the second mask material 3;

如图3所示,经过湿法或干法刻蚀将第二掩膜材料3所暴露部分腐蚀,将系列窗口5图形转移到第一掩膜材料1上,将第一掩膜材料1的局部暴露出来。As shown in Figure 3, after wet or dry etching, the exposed part of the second mask material 3 is etched, the pattern of the series of windows 5 is transferred to the first mask material 1, and the local area of the first mask material 1 exposed.

第二掩膜材料3的选取应满足的条件为:第二掩膜材料3的刻蚀速率远小于第一掩膜材料1和被刻蚀材料2的刻蚀速率;其中,第一掩膜材料1、被刻蚀材料2与第二掩膜材料3的刻蚀速率比较应在相同的刻蚀方法下,该刻蚀方法为干法刻蚀法或湿法刻蚀法。The selection of the second mask material 3 should meet the following conditions: the etching rate of the second mask material 3 is much lower than the etching rate of the first mask material 1 and the etched material 2; wherein, the first mask material 1. The etching rate of the material to be etched 2 and the second mask material 3 should be compared under the same etching method, and the etching method is a dry etching method or a wet etching method.

如图4所示,去除第三层的光刻胶层8。As shown in FIG. 4, the photoresist layer 8 of the third layer is removed.

如图5和图6所示,再经过湿法或干法刻蚀使系列窗口5转移到第一掩膜材料1、以及用干法刻蚀到被刻蚀材料2上,最后去除第一掩膜材料1和第二掩膜材料3。第一掩膜材料1的选取应满足的条件为:第一掩膜材料1在垂直于表面方向的刻蚀速率等于被刻蚀材料2的刻蚀速率,第一掩膜材料1在平行于表面方向的刻蚀速率小于被刻蚀材料2的刻蚀速率;其中,第一掩膜材料1与被刻蚀材料2的刻蚀速率比较应在相同的刻蚀方法下,该刻蚀方法为干法刻蚀法或湿法刻蚀法。As shown in Figures 5 and 6, the series of windows 5 are transferred to the first mask material 1 through wet or dry etching, and dry etched to the etched material 2, and finally the first mask is removed. Membrane material 1 and second mask material 3 . The selection of the first mask material 1 should meet the following conditions: the etching rate of the first mask material 1 in the direction perpendicular to the surface is equal to the etching rate of the etched material 2, and the first mask material 1 is parallel to the surface. The etching rate in the direction is less than the etching rate of the etched material 2; wherein, the etching rate comparison between the first mask material 1 and the etched material 2 should be under the same etching method, and the etching method is dry etching method or wet etching method.

在具有斜坡结构4的第一掩膜材料1上设计系列窗口5,当第一掩膜材料1最厚处的沟槽前沿达到被刻蚀材料2的表面时,已经在被刻蚀材料2的内部形成不同深度的系列沟槽7。A series of windows 5 are designed on the first mask material 1 with a slope structure 4. When the front edge of the groove at the thickest part of the first mask material 1 reaches the surface of the material 2 to be etched, the window 5 has already been formed on the material 2 to be etched. A series of grooves 7 of different depths are formed inside.

实施例2Example 2

在实施例1的内容基础之上,设定第一掩膜材料1和第二掩膜材料3,以及被刻蚀材料2的刻蚀法为干法刻蚀法,使其能有效刻蚀被刻蚀材料2外,对第一掩膜材料1也能有效刻蚀。On the basis of the content of embodiment 1, the etching method of setting the first mask material 1 and the second mask material 3, and the material to be etched 2 is a dry etching method, so that it can effectively etch the material to be etched. In addition to the etching material 2, the first mask material 1 can also be effectively etched.

通过干法刻蚀法刻蚀第一掩膜材料1,由于第一掩膜材料1在垂直方向的厚度不同,干法刻蚀过程中最薄处刻蚀沟槽前沿到达被刻蚀材料2的表面时,其他部分的沟槽前沿仍然在第一掩膜材料1内。当最厚处的沟槽前沿达到被刻蚀材料2的表面时,最薄处的沟槽已经进入被刻蚀材料2的内部,以在被刻蚀材料2的内部形成不同深度的系列沟槽7。The first mask material 1 is etched by dry etching. Since the thickness of the first mask material 1 in the vertical direction is different, the front edge of the thinnest etched trench reaches the edge of the etched material 2 during the dry etching process. surface, other parts of the trench front are still inside the first mask material 1 . When the front edge of the groove at the thickest point reaches the surface of the etched material 2, the groove at the thinnest point has entered the inside of the etched material 2 to form a series of grooves with different depths inside the etched material 2 7.

斜坡结构4的斜坡角度6可以设定为小于45度。由于斜坡结构4的存在,在其上形成的窗口区域存在高低差,因此刻蚀前沿到达被刻蚀材料2的表面存在时间差,如图5所示;去除第一掩膜材料1和第二掩膜材料3,最终在被刻蚀材料2上形成的系列沟槽7具有不同深度。如图6所示,干法刻蚀法的刻蚀条件可以不用事先设定,可根据具体要刻蚀的材料和掩膜材料来确定。The slope angle 6 of the slope structure 4 can be set to be less than 45 degrees. Due to the existence of the slope structure 4, there is a height difference in the window region formed thereon, so there is a time difference for the etching front to reach the surface of the etched material 2, as shown in FIG. 5; remove the first mask material 1 and the second mask The membrane material 3 and finally the series of trenches 7 formed on the etched material 2 have different depths. As shown in FIG. 6 , the etching conditions of the dry etching method do not need to be set in advance, but can be determined according to the specific material to be etched and the mask material.

本发明中被刻蚀材料2可为现有半导体材料,第一掩膜材料1可为有机聚合物,第二掩膜材料3可以是二氧化硅,但二氧化硅的厚度必须保证在整个刻蚀过程中不被完全刻蚀掉,第二掩膜材料3也可以是某些金属材料。Among the present invention, the etched material 2 can be an existing semiconductor material, the first mask material 1 can be an organic polymer, and the second mask material 3 can be silicon dioxide, but the thickness of the silicon dioxide must ensure that the entire etching If it is not completely etched away during the etching process, the second mask material 3 can also be some metal material.

本发明中干法或湿法刻蚀为常规技术,形成系列窗口5的方法也是常规的光刻技术。In the present invention, dry or wet etching is a conventional technique, and the method of forming the series of windows 5 is also a conventional photolithography technique.

本发明中经过在被刻蚀材料2表面的指定位置形成具有斜坡结构4的第一掩膜材料1和第二掩膜材料3后,通过光刻工艺在第二掩膜材料3上形成光刻胶层8以及按设计形成系列窗口5。通过此系列窗口5刻蚀第二掩膜材料3直到第一掩膜材料1暴露;选择干法刻蚀法的刻蚀条件,使其对第一掩膜材料1和被刻蚀材料2均具有刻蚀作用,然后再进行下一步的刻蚀,至到在被刻蚀材料2上形成所需要的系列沟槽7,最后去除所有的掩膜材料。本发明的方法可以通过一次光刻加干法刻蚀技术形成多个具有不同深度的系列沟槽7,效率高,人力和时间成本降低。In the present invention, after forming the first mask material 1 and the second mask material 3 with the slope structure 4 at the specified position on the surface of the material 2 to be etched, a photolithographic mask material 3 is formed on the second mask material 3 by a photolithography process. The adhesive layer 8 forms the series of windows 5 as designed. Etch the second mask material 3 through the series of windows 5 until the first mask material 1 is exposed; the etching conditions of the dry etching method are selected so that it has the same effect on the first mask material 1 and the etched material 2 Etching action, and then carry out the next step of etching until the required series of grooves 7 are formed on the etched material 2, and finally all the mask materials are removed. The method of the present invention can form a plurality of serial grooves 7 with different depths by one-time photolithography plus dry etching technology, which has high efficiency and reduces manpower and time costs.

上述实施/试验例仅仅是为清楚地说明所作的举例,而并非对实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引伸出的显而易见的变化或变动仍处于本发明创造的保护范围之中。The above implementation/test examples are merely examples for clear description, and are not intended to limit the implementation. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. And the obvious changes or changes derived therefrom are still within the scope of protection of the present invention.

Claims (8)

1. A method of forming trenches having different depths at a time in a semiconductor surface, comprising: the method comprises the following steps:
s1: forming a first mask material (1) with a slope structure (4) at a designated position on the surface of the etched material (2);
s2: forming a second mask material (3) with the same slope on the first mask material (1);
s3: forming a photoresist layer (8) with the same slope on the second mask material (3), and forming a series of windows (5) on the slope area of the photoresist layer (8) as required to locally expose the second mask material (3);
s4: transferring the series of windows (5) onto the second mask material (3), locally exposing the first mask material (1);
s5: and etching the first mask material (1) and the etched material (2) until the first mask material (1) and the second mask material (3) are removed after the series of grooves (7) with different depths are etched on the etched material (2).
2. A method of forming trenches having different depths at a time in a semiconductor surface according to claim 1, wherein: the inclination angle of the slope structure (4) is less than or equal to 45 degrees.
3. A method of forming trenches having different depths at a time in a semiconductor surface according to claim 1, wherein: the method for forming the first mask material (1) in the step S1 is an imprinting method.
4. A method of forming trenches having different depths at a time in a semiconductor surface according to claim 3, wherein: the first mask material (1) is an organic polymer.
5. A method of forming trenches having different depths at a time in a semiconductor surface according to claim 1, wherein: and in S4 and S5, transferring the series of windows (5) onto the second mask material (3) and the first mask material (1) by a dry etching method or a wet etching method.
6. A method of forming trenches having different depths at a time in a semiconductor surface as recited in claim 5, wherein: in the steps S4 and S5, the conditions to be satisfied for selecting the second mask material (3) are: the etching rate of the second mask material (3) is far smaller than the etching rates of the first mask material (1) and the etched material (2); wherein, the etching rates of the first mask material (1), the etched material (2) and the second mask material (3) are compared under the same etching method.
7. A method of forming trenches having different depths at a time in a semiconductor surface according to claim 1, wherein: and in the step S5, transferring the series of windows (5) onto the etched material (2) by a dry etching method.
8. A method of forming trenches having different depths in a semiconductor surface at a time as claimed in claim 6 or 7, wherein: in the S4 and S5, the conditions to be satisfied for selecting the first mask material (1) are: the etching rate of the first mask material (1) in the direction vertical to the surface is equal to the etching rate of the etched material (2), and the etching rate of the first mask material (1) in the direction parallel to the surface is smaller than the etching rate of the etched material (2); wherein, the etching rate of the first mask material (1) and the etched material (2) is compared under the same etching method.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208612A (en) * 1999-01-14 2000-07-28 Seiko Epson Corp Method for manufacturing semiconductor device having trench element isolation region
CN102117763A (en) * 2010-01-06 2011-07-06 上海华虹Nec电子有限公司 Manufacturing process method for obtaining inclined trench structure or changing inclination angle of trench structure
EP2824692A1 (en) * 2012-03-05 2015-01-14 Enraytek Optoelectronics Co., Ltd. Methods for manufacturing isolated deep trench and high-voltage led chip
US20200203131A1 (en) * 2017-10-20 2020-06-25 Lg Chem, Ltd. Plasma etching method using faraday cage
US10823888B1 (en) * 2019-11-12 2020-11-03 Applied Materials, Inc. Methods of producing slanted gratings with variable etch depths
CN113168021A (en) * 2018-12-17 2021-07-23 应用材料公司 Method for forming multiple gratings

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208612A (en) * 1999-01-14 2000-07-28 Seiko Epson Corp Method for manufacturing semiconductor device having trench element isolation region
CN102117763A (en) * 2010-01-06 2011-07-06 上海华虹Nec电子有限公司 Manufacturing process method for obtaining inclined trench structure or changing inclination angle of trench structure
EP2824692A1 (en) * 2012-03-05 2015-01-14 Enraytek Optoelectronics Co., Ltd. Methods for manufacturing isolated deep trench and high-voltage led chip
US20200203131A1 (en) * 2017-10-20 2020-06-25 Lg Chem, Ltd. Plasma etching method using faraday cage
CN113168021A (en) * 2018-12-17 2021-07-23 应用材料公司 Method for forming multiple gratings
US10823888B1 (en) * 2019-11-12 2020-11-03 Applied Materials, Inc. Methods of producing slanted gratings with variable etch depths
CN114651198A (en) * 2019-11-12 2022-06-21 应用材料股份有限公司 Method of manufacturing slanted gratings with variable etch depth

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
李向红;张斌珍;孟祥娇;范新磊;: "基于SU-8的微流沟道的设计和制作", 传感器与微系统, no. 10, pages 99 - 101 *

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