CN115361631A - Wireless microphone system and method thereof - Google Patents

Abstract

The invention provides a wireless microphone system and a method thereof, which use an FPGA algorithm to replace the traditional data transmission FSK, GFSK, OOK and DS-SS circuits or analog amplitude modulation and frequency modulation and phase modulation circuits. The circuit architecture of wireless audio transmission is simplified, the universality of components is improved, and the production efficiency is improved. In the aspect of product application scenes: according to the setting or configuration of a user application scene, the ultra-long distance voice communication of a DS-SS modulation mode can be realized by using a set of standard circuits, the application scenes of low delay, high-quality audio and a long-distance concert of an analog FM modulation mode can be realized, and the HIFI-level pure digital audio transmission mode with high bandwidth can be realized. The user can cover almost all the scene requirements of wireless audio transmission by using one set of products. Furthermore, the structure circuit based on the FPGA and the algorithm thereof is simple, the stability is high, and the carrier frequency and the modulation mode which are variable from 100MHz to 6GHz can effectively avoid the audio transmission signal from being interfered.

Description

A wireless microphone system and method thereof

technical field

The invention relates to the technical fields of voice processing, FPGA and wireless communication, in particular to a wireless microphone system and a method thereof.

Background technique

Wireless audio transmission technology has been applied in many fields, such as mobile phones, walkie-talkies, wireless voice fax machines, cordless phones, Bluetooth audio, FM radio, teaching loudspeakers, conference systems, simultaneous interpretation, radio and television, wireless microphone systems, etc. Etc., in today's society is almost all-encompassing. In these applications in many fields, wireless transmission technology has played a key role.

There are various types of wireless transmission technologies, which can be divided into long-distance wireless transmission, short-distance wireless transmission and near-field transmission according to distance; VLF, VHF, UHF and SHF according to frequency or wavelength; classified according to modulation method or spectrum characteristics. Divided into narrowband microwave, direct sequence spread spectrum, frequency hopping spread spectrum, HomeRF, Bluetooth, etc.; classified by carrier, it can be divided into light wave transmission and radio wave transmission.

Among these wireless transmission technologies, the wireless transmission technology of audio signals is the most complex, and the methods are extremely diverse. Generally, wireless audio transmission has higher performance and requirements for carrier and codec than other wireless transmission technologies. Meet the needs of different usage occasions. For example, performing arts wireless microphones require low delay, ultra-high sound quality, mobile transmission without dead angle and ultra-low power consumption; conference systems require voice encryption, low delay, noise removal, no howling and accompanying speech control, etc.; Long communication distance, low power consumption, broadcast TV system requires large bandwidth, Bluetooth audio requires high transmission efficiency, etc.

It can be seen from this that in the applications with different characteristics, different wireless audio transmission technologies are adopted due to different application occasions, and different products are designed accordingly. There are most applications. Although the application scenarios are different, users hope to buy a set of equipment to cover most application scenarios to save unnecessary waste. Unfortunately, there is no such product on the market.

Contents of the invention

In view of the above actual needs, the purpose of the present invention is to provide a wireless microphone system and its method, which upgrades the structure and method of the existing wireless microphone system, and uses FPGA algorithms to replace traditional digital transmission circuits or analog frequency modulation circuits. Traditional digital transmission circuits generally have a combined architecture of MCU or DSP and digital transmission modules, in which MCU or DSP audio signal processing, and digital transmission modules are responsible for modulating audio data with built-in modulation methods and sending them out, or using built-in The demodulation method restores the audio data from the received carrier. The receiving and transmitting of the traditional audio transmission analog circuit architecture are not the same. The receiving end of the traditional audio transmission analog circuit is generally composed of a decompression circuit, a demodulation circuit, an intermediate frequency circuit, a mixing circuit, a local oscillator and an LNA. The traditional audio transmission analog circuit transmits The end is generally composed of a pressure circuit, a modulation circuit, a local oscillator and a PA. It can be seen that the traditional digital transmission circuit and analog circuit mode are very fixed, practical and inflexible, and cannot be applied to the switching of multiple practical scenarios. Compared with the traditional digital transmission circuit, the FPGA algorithm is simple and free of debugging. The FPGA algorithm is used in the form of algorithm firmware in the FPGA memory, and different working modes can be switched according to different application scenarios.

In order to achieve the above-mentioned purpose and other related purposes, the technical scheme adopted in the present invention is as follows:

A wireless microphone system, comprising: an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;

The array silicon microphone module is used to convert audio signals into electrical signals from multiple directions;

The CODEC module is used to convert digital signals into electrical signals or convert electrical signals into digital signals, and is connected to the array silicon wheat module;

Described FPGA module is used for realizing the processing of audio digital signal, generates modulation signal and demodulation signal, is connected with described CODEC module, and wherein audio frequency digital signal is a subset of digital signal;

The radio frequency module is used for mixing, transmitting and receiving wireless signals, and is connected with the FPGA module;

The FPGA firmware signal processing method of described wireless microphone system, comprises the steps:

S1) launch mode step;

S11) pick up the array silicon microphone data, and perform noise suppression, echo suppression, reverberation processing, companding and data compression processing on the data;

S12) write Matlab file and generate cosine data table, configure and generate FPGA ROM IP core with cosine data table;

S13) calling and configuring the FPAG multiplier IP;

S14) Input modulation mode, generate modulation signal with DDS method according to the configuration of ROMIP;

S15) move the modulated signal to the carrier configured by the FPGA with a multiplier, and output it;

S2) receiving mode step;

S21) Obtain the intermediate frequency digital signal from the CODEC module, call and configure the FPGA filter IP core, filter the intermediate frequency digital signal and obtain the processed carrier signal S(n);

S22) Write Matlab file and generate sine and cosine quadrature signal data table, configure and generate FPGA ROM IP core with sine and cosine data table, and generate sine signal sin(ω _c n) and cosine signal cos(ω _c n), Where _ωc is the center frequency;

S23) calls and configures the FPAG multiplier IP, and implements the following calculations:

I(n)=S(n)×cos(ω _c n)

Q(n)=S(n)×sin(ω _c n),

Wherein I(n) is the I-way signal of S(n), and Q(n) is the Q-way signal of S(n);

S24) carry out following calculation:

其中m(n)就是解调信号；

Where m(n) is the demodulated signal;

S25) Select the decoding function DC();

S26) Execute the decoding operation DC(m(n)), perform decompression and decompression processing, and restore the signal.

Optionally, the array silicon mic module is an 8-way array silicon mic.

Optionally, the CODEC module has a 24bit high-precision AD/DA interface, wherein the DA interface has an output interface with a first-stage amplification function.

Optionally, the firmware function of the FPGA module also includes filtering processing of audio data, compression and decompression processing of audio data, encoding processing of audio data, synthesis of modulated signals, demodulated signals and modulation transformation, wherein modulation transformation includes AM, FM, SSB, PM, FSK, GFSK, DS-SS modulation technology.

Optionally, the radio frequency module includes VCO, PLL, mixer and configurable frequency and RX or TX mode.

Optionally, the carrier frequency of the radio frequency module is from 100MHz to 6GHz.

Optionally, the FPAG multiplier IP is an optional function package of FPGA to perform multiplication.

Optionally, the FPGA ROM IP core is an optional function package of the FPGA, which performs a table lookup function.

The beneficial effects of the present invention are: the present invention uses the FPGA algorithm to replace traditional digital transmission FSK, GFSK, OOK, DS-SS circuits or analog amplitude modulation, frequency modulation and phase modulation circuits. In terms of product production: the circuit architecture of wireless audio transmission is simplified, and the transmitter and receiver circuits are consistent, which facilitates product production and debugging, reduces the technical level requirements for production line workers, improves component versatility, and greatly improves production efficiency. In terms of product application scenarios: According to user application scenario settings or configurations, a set of standard circuits can realize ultra-long-distance voice communication in DS-SS modulation mode, and can also realize low delay, high-quality audio and long-distance communication in analog FM modulation mode. It can also realize high-bandwidth HIFI-level pure digital audio transmission mode. Users can use a set of products to cover almost all wireless audio transmission scenarios. Furthermore, the architecture circuit based on FPGA and its algorithm is simple and stable, and the variable carrier frequency and modulation method from 100MHz to 6GHz can effectively avoid the interference of audio transmission signals.

Description of drawings

Fig. 1 is a system block diagram of a wireless microphone system and its method.

Fig. 2 is a schematic diagram of implementing a wireless microphone system and its method.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

In one embodiment, a wireless microphone system, the overall architecture structure is as shown in Figure 1; the implementation process is as shown in Figure 2, including: an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;

The array silicon microphone module is used to convert audio signals into electrical signals from multiple directions;

The CODEC module is used to convert digital signals into electrical signals or convert electrical signals into digital signals, and is connected to the array silicon wheat module;

Described FPGA module is used for realizing the processing of audio digital signal, generates modulation signal and demodulation signal, is connected with described CODEC module, and wherein audio frequency digital signal is a subset of digital signal;

The radio frequency module is used for mixing, transmitting and receiving wireless signals, and is connected with the FPGA module;

The FPGA firmware signal processing method of described wireless microphone system, comprises the steps:

S1) launch mode step;

S11) pick up the array silicon microphone data, and perform noise suppression, echo suppression, reverberation processing, companding and data compression processing on the data;

S12) write Matlab file and become cosine data table, configure and generate FPGAROM IP core with cosine data table;

S13) calling and configuring the FPAG multiplier IP;

S14) input modulation mode, according to the configuration of FPGAROMIP, generate modulation signal with DDS method;

S15) move the modulated signal to the carrier of FPGA configuration with FPAG multiplier, and output;

S2) receiving mode step;

S21) Obtain the intermediate frequency digital signal from the CODEC module, call and configure the FPGA filter IP core, filter the intermediate frequency digital signal and obtain the processed carrier signal S(n);

S22) Write Matlab file and generate sine and cosine quadrature signal data table, configure and generate FPGA ROM IP core with sine and cosine data table, and generate sine signal sin(ω _c n) and cosine signal cos(ω _c n), Where _ωc is the center frequency;

S23) calls and configures the FPAG multiplier IP, and implements the following calculations:

I(n)=S(n)×cos(ω _c n)

Q(n)=S(n)×sin(ω _c n),

Wherein I(n) is the I-way signal of S(n), and Q(n) is the Q-way signal of S(n);

S24) carry out following calculation:

其中m(n)就是解调信号；

Where m(n) is the demodulated signal;

S25) Select the decoding function DC();

S26) Execute the decoding operation DC(m(n)), perform decompression and decompression processing, and restore the signal.

In yet another embodiment, the arrayed silicon microphone module is an 8-way arrayed silicon microphone. The CODEC module has a 24bit high-precision AD/DA interface, wherein the DA interface has an output interface with a first-stage amplification function. The firmware function of the FPGA module also includes filtering processing of audio data, compression and decompression processing of audio data, audio data encoding processing, synthesis modulation signal, demodulation signal and modulation conversion, wherein modulation conversion includes AM, FM, SSB, PM, FSK, GFSK, DS-SS modulation technology. The radio frequency module includes VCO, PLL, mixer and configurable frequency and RX or TX mode. The carrier frequency of the radio frequency module is from 100MHz to 6GHz. The FPGA multiplier IP is an optional function package of the FPGA, which performs multiplication. The FPGA ROM IP core is an optional function package of the FPGA, which performs a table lookup function.

The beneficial effects of the present invention are: the present invention uses the FPGA algorithm to replace traditional digital transmission FSK, GFSK, OOK, DS-SS circuits or analog amplitude modulation, frequency modulation and phase modulation circuits. In terms of product production: the circuit architecture of wireless audio transmission is simplified, and the transmitter and receiver circuits are consistent, which facilitates product production and debugging, reduces the technical level requirements for production line workers, improves component versatility, and greatly improves production efficiency. In terms of product application scenarios: According to user application scenario settings or configurations, a set of standard circuits can realize ultra-long-distance voice communication in DS-SS modulation mode, and can also realize low delay, high-quality audio and long-distance communication in analog FM modulation mode. It can also realize high-bandwidth HIFI-level pure digital audio transmission mode. Users can use a set of products to cover almost all wireless audio transmission scenarios. Furthermore, the architecture circuit based on FPGA and its algorithm is simple and stable, and the variable carrier frequency and modulation method from 100MHz to 6GHz can effectively avoid the interference of audio transmission signals.

The above are only preferred embodiments of the present invention, and it should be pointed out that for those of ordinary skill in the art, some improvements and modifications can also be made without departing from the principle of the present invention, and these improvements and modifications should also be considered Be the protection scope of the present invention.

Claims (9)

1. A wireless microphone system, comprising: the system comprises an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;

the array silicon microphone module is used for converting audio signals into electric signals from multiple directions;

the CODEC module is used for converting digital signals into electric signals or converting the electric signals into digital signals and is connected with the array silicon microphone module;

the FPGA module is used for realizing the processing of audio digital signals, generating modulation signals and demodulation signals and is connected with the CODEC module, wherein the audio digital signals are subsets of the digital signals;

the radio frequency module is used for mixing, transmitting and receiving wireless signals and is connected with the FPGA module.

2. The wireless microphone system as claimed in claim 1, wherein the FPGA firmware signal processing method of the wireless microphone system comprises the steps of:

s1) transmitting a mode;

s11) picking up array silicon microphone data, and performing noise suppression, echo suppression, dereverberation processing, companding and data compression processing on the data;

s12) compiling a Matlab file and generating a cosine data table, and configuring and generating an FPGA ROM IP core by using the cosine data table;

s13) calling and configuring an FPAG multiplier IP;

s14) inputting a modulation mode, and generating a modulation signal by using a DDS method according to the ROMIP configuration;

s15) moving the modulation signal to a carrier wave configured by the FPGA by using a multiplier and outputting the modulation signal;

s2) receiving a mode;

s21) acquiring an intermediate frequency digital signal from the CODEC module, calling and configuring an IP core of an FPGA filter, filtering the intermediate frequency digital signal and acquiring a processed carrier signal S (n);

s22) writing Matlab files and generating sine and cosine orthogonal signal data tables, configuring and generating an FPGA ROM IP core by using the sine and cosine data tables, and generating sine signal sin (omega) _c n) and cosine signal cos (ω) _c n) where ω is _c Is the center frequency;

s23) calls and configures the FPAG multiplier IP and performs the following calculations:

I(n)＝S(n)×cos(ω _c n)

Q(n)＝S(n)×sin(ω _c n)，

wherein I (n) is the I signal of S (n), and Q (n) is the Q signal of S (n);

s24) performs the following calculation:

where m (n) is the demodulated signal;

s25) selecting a decoding function DC ();

s26) performs a decoding operation DC (m (n)), and performs decompression and decompression processing to restore the signal.

3. A wireless microphone system according to claim 1, wherein the arrayed silicon microphone module is an 8-way arrayed silicon microphone.

4. The wireless microphone system of claim 1, wherein the CODEC module has a 24-bit high-precision AD/DA interface, wherein the DA interface has an output interface with a first amplification function.

5. The wireless microphone system of claim 1, wherein the firmware functions of the FPGA module further comprise audio data filtering processing, audio data compression and decompression processing, audio data encoding processing, modulation signal synthesis, demodulation signal and modulation conversion, wherein the modulation conversion comprises AM, FM, SSB, PM, FSK, GFSK, DS-SS modulation technology.

6. A wireless microphone system according to claim 1 wherein the rf module includes a VCO, a PLL, a mixer and configurable frequency and RX or TX modes.

7. The wireless microphone system of claim 1, wherein the radio frequency module carrier frequency is from 100MHz to 6GHz.

8. The method as claimed in claim 2, wherein the FPAG multiplier IP is an optional functional packet of the FPGA, and performs multiplication.

9. The method as claimed in claim 2, wherein the FPGA ROM IP core is an optional feature packet of the FPGA that performs a table lookup function.

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