CN1993893B - Integrated low-IF frequency terrestrial audio broadcast receiver and related methods - Google Patents

Abstract

An integrated low-IF (low intermediate frequency) terrestrial broadcast receiver and associated method are disclosed that provide an advantageous and cost-efficient solution. The integrated receiver includes a mixer, local oscillator generation circuitry, low-IF conversion circuitry, and DSP circuitry. And the integrated receiver is particularly suited for small, portable devices and the reception of terrestrial audio broadcasts, such as FM and AM terrestrial audio broadcast, in such portable devices.

Description

Integrated low-IF frequency terrestrial audio broadcast receiver and related methods

technical field

The present invention relates to receiver architectures for radio frequency communications. More specifically, the present invention relates to audio broadcast receivers.

Background technique

Radio Frequency (RF) communication systems are used in a variety of applications such as televisions, cellular telephones, pagers, Global Positioning System (GPS) receivers, cable modems, cordless telephones, radios and other devices that receive radio frequency signals. Typically, RF receivers require frequency translation or mixing. For example, for frequency modulated (FM) audio broadcasts, an FM audio receiver may convert one of the broadcast channels in the FM band to an intermediate frequency. In the United States, FM radios typically convert FM audio signals broadcast on a 200 kHz channel in the 88 MHz to 108 MHz frequency band to an intermediate frequency of 10.7 MHz. An FM demodulator and stereo decoder then convert this 10.7MHz IF signal into demodulated left and right audio signals that can be sent to the stereo speakers. Reception of audio broadcast signals, such as FM audio broadcasts, is similarly accomplished using radio frequency receivers, although other countries have different frequency bands and channel spacing.

Most typical RF receivers utilize oscillators and analog frequency multipliers or mixers to perform frequency translation or mixing. Typically, the oscillator outputs a local oscillator or local oscillator ( _LO ) signal in the form of a sine wave or other periodic wave having a tuning frequency (f LO ). Thereafter, the mixer mixes the RF input signal spectrum and the LO signal to form an output signal that includes the desired spectral content at a target channel with a specific center frequency (f _CH ) at The spectral content of frequencies equal to the sum and difference of the two input frequencies, ie f _CH +f _LO and f _CH −f _LO . One of these components forms the channel center frequency which is converted to the desired IF frequency, while the other frequency component is filtered out. Oscillators can be implemented with different circuits, for example, tuned inductor-capacitor (LC) oscillators, charge relaxation oscillators, and ring oscillators.

The design requirements for any given application for an RF receiver will affect the specific architecture chosen for the receiver. And some applications have tough design requirements. One such application is terrestrial audio broadcast receivers, and more particularly such receivers that may be used in small low cost portable devices. Such devices include portable stereos, CD players, MP3 players, cellular telephones, and other small portable devices. Current architectures for such portable device environments are often too expensive compared to the cost of the portable devices themselves, and thus, do not provide an effective cost-effective solution.

Contents of the invention

The present invention is an integrated low-IF (low intermediate frequency) terrestrial audio broadcast receiver and associated methods that provide an advantageous and cost-effective solution particularly useful in the portable device environment.

In one embodiment, the present invention is an integrated terrestrial audio broadcast receiver comprising: a mixer connected to receive as input a radio frequency signal spectrum and a mixed signal, and having a low intermediate frequency signal as output, wherein the radio frequency input signal The spectrum includes a plurality of channels from terrestrial audio broadcasts; a local oscillator or local oscillator (LO) generating circuit connected to receive a channel selection signal as input and configured to provide an oscillating signal dependent on the channel selection signal and is used to generate a mixing signal for the mixer; a low-IF conversion circuit, which is connected to receive the low-IF signal from the mixer, and is configured to output a digital signal; and a digital signal processor (DSP) , which is connected to receive a digital signal from a low-IF conversion circuit, and is configured to output a digital audio signal; wherein, a mixer, a local oscillator generation circuit, a low-IF conversion circuit, and digital signal processing are integrated in a single integrated In circuit. More specifically, the integrated circuit is fabricated using a process comprising or consisting essentially of a CMOS process.

In another embodiment, the present invention is a portable device with an integrated terrestrial audio broadcast receiver comprising a channel selection interface, an audio output interface, and an integrated terrestrial audio broadcast receiver of the present invention connected to the channel selection interface and the audio output interface. machine. More specifically, the portable device is capable of receiving a variety of terrestrial audio broadcasts, including amplitude modulated (AM) spectrum and frequency modulated (FM) spectrum signals.

In another embodiment, the present invention is a method of tuning a terrestrial audio broadcast in an integrated receiver, the method comprising: generating an oscillating signal dependent on a channel selection signal; generating a mixing signal based on the oscillating signal; A radio frequency input signal from a channel of terrestrial audio broadcasting and a mixing signal are mixed to generate a low intermediate frequency output signal; the low intermediate frequency output signal is converted into a digital signal; and the digital signal is processed to generate a digital audio signal; wherein, generating , generation, mixing, conversion and processing steps in a single integrated circuit.

Description of drawings

It is to be noted that the appended drawings illustrate only exemplary embodiments of the invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

Figure 1A is a block diagram of an embodiment of an integrated terrestrial broadcast receiver employing a low intermediate frequency architecture.

FIG. 1B is a more detailed block diagram of the circuit blocks in FIG. 1A .

Figure 1C is a block diagram of one example implementation of an integrated terrestrial broadcast receiver including example external components.

2A is a block diagram of an embodiment of an integrated terrestrial broadcast receiver employing a phase-locked loop (PLL) and a ratiometric clock to provide mixing and digital clock signals to receiver circuitry.

Figure 2B is a block diagram of a proportional clock.

Figure 3A is a block diagram of an alternative embodiment of an integrated terrestrial broadcast receiver employing a tuning control circuit and a proportional clock to provide a mixed frequency signal and a digital clock signal to the receiver circuit.

Figure 3B is a block diagram of an alternative embodiment of an integrated terrestrial broadcast receiver employing a ratiometric clock and an external reference clock for the digital circuitry.

4A is a block diagram of an embodiment of an integrated terrestrial broadcast receiver that includes both AM broadcast reception and FM broadcast reception.

Figure 4B is a block diagram of an embodiment of a portable device utilizing an integrated terrestrial broadcast receiver in accordance with the present invention.

Figure 5A is a block diagram of an embodiment of an integrated terrestrial broadcast receiver incorporating local oscillator (LO) control circuitry for adding certain frequency control features.

FIG. 5B is a signal diagram of a frequency control characteristic provided by the embodiment of FIG. 5A , that is, high-side to low-side local oscillator signal injection.

FIG. 5C is a signal diagram of another frequency control feature provided by the embodiment of FIG. 5A , that is, a programmable intermediate frequency position.

Detailed ways

The present invention provides an integrated low intermediate frequency terrestrial audio broadcasting receiver and associated method which provide an advantageous and cost effective solution.

FIG. 1A is a block diagram of an embodiment 100 of an integrated terrestrial broadcast receiver employing a low-IF architecture. The input signal spectrum (f _RF ) 112 is expected to be the radio frequency signal spectrum comprising a plurality of tunable channels. Note that "radio frequency" or radio frequency signals as used herein means electrical signals that carry useful information and have frequencies from about 3 kHz to thousands of GHz, regardless of the medium through which such signals are carried. Thus, radio frequency signals can propagate in air, free space, coaxial cables, fiber optic cables, and the like. More specifically, the present invention may provide an advantageous architecture for an FM terrestrial broadcast receiver. Therefore, for purposes of the following description, the discussion of radio frequency signal spectrum (f _RF ) 112 will primarily be directed to radio frequency signal spectrum (f _RF ) 112 which is an FM terrestrial broadcast spectrum comprising a plurality of different FM broadcast channels centered at different broadcast frequencies.

Referring back to the embodiment 100 in FIG. 1A , a low noise amplifier (LNA) 102 receives a radio frequency signal spectrum (f _RF ) 112 . The output of low noise amplifier 102 is then applied to mixer 104 , which produces real (I) and imaginary (O) output signals represented by signal 116 . To generate these low-IF signals 116 , mixer 104 mixes signal (f LO ) 118 using a phase-shifted local oscillator ( _LO ). LO generation circuit 130 includes an oscillator circuit and outputs two out-of-phase LO mixing signals (f _LO ) 118 for use by mixer 104 . The output of the mixer 104 is at a low intermediate frequency, which may be designed to be fixed or variable, for example, if discrete step tuning is implemented for the local oscillator generation circuit 130 . An example of a large stride LO generation circuit using discrete tuning steps is described in commonly owned and co-pending U.S. Patent Application Serial No. 10/412,963, filed April 14, 2003, entitled "RECEIVER ARCHITECTURES UTILIZINGCOARSE ANALOG TUNING AND ASSOCIATED METHODS (Receiver Architecture and Associated Methods Using Coarse Analog Tuning)", which application is hereby incorporated by reference in its entirety.

Low-IF conversion circuit 106 receives real (I) and imaginary (Q) signals 116 and outputs real and imaginary digital signals represented by signal 120 . The low-IF conversion circuit 106 preferably includes a band-pass or low-pass analog-to-digital converter (ADC) circuit that converts the low-IF input signal into the digital domain. The low-IF conversion circuit 106 partially provides analog-to-digital conversion, signal gain and signal filtering functions. Thereafter, additional digital filtering and digital processing circuits with digital signal processing (DSP) circuits 108 are used to further tune and extract signal information from the digital signal 120 . DSP circuitry 108 thereafter generates baseband digital output signal 122 . This digital processing provided by DSP circuitry 108 may include, for example, FM demodulation and stereo decoding when the incoming signal is associated with FM broadcasts. As depicted in embodiment 100 in FIG. 1A , digital output signals 122 may be left (L) and right (R) digital audio signals 122 representing the content of the FM broadcast channel being tuned. It should be noted that the output of receiver 100 may be other desired signals including, for example, low-IF quadrature I/Q signals from analog-to-digital converters passed through decimation filters, undemodulated baseband signals, multiple Multiplexed L+R and L-R audio signals, L and R analog audio signals and/or any other desired output signal.

It should be noted that a low-IF conversion circuit as used herein refers to a circuit that partially mixes the channel of interest in the input signal spectrum down to a fixed intermediate frequency, or down to a variable intermediate frequency, which is equal to or lower than about three channel width. For example, for FM broadcasting in the United States, the channel width is about 200 kHz. Thus, broadcast channels in the same broadcasting area are designated to be at least about 200 kHz apart. Therefore, for the purposes of this specification, the low intermediate frequency The frequency is the IF frequency equal to or lower than 600 kHz. It should further be noted that for a spectrum with non-uniform channel spacing, the low IF frequency will be equal to or lower than three steps in the channel tuning resolution of the receiver circuit. For example, If the receiver circuitry is configured to tune channels at least about 100 kHz apart, the low IF frequency will be at or below about 300 kHz. As noted above, the IF frequency can be fixed at a particular frequency or vary within a range of low IF frequencies, which Depends on the LO generating circuit 130 used and how it is controlled.

It should further be noted that the architecture of the present invention can be used to receive signals in a variety of signal frequency bands, including AM audio broadcasts, FM audio broadcasts, television audio broadcasts, weather channels and other desired broadcasts. The following table provides example frequencies and uses for different broadcast frequency bands that may be received by the integrated terrestrial broadcast receiver of the present invention.

Table 1 - Example frequency bands and uses

frequency Purpose/Service 150-535kHz European LW radio broadcasting 9kHz spacing 535-1700kHz MW/AM radio broadcasting US uses 10kHz spacing Europe uses 9kHz spacing 1.7-30 SW/HF International Radio Broadcasting 46-49 Cordless telephone and "mini-monitor", remote control 59.75(2)65.75(3)71.75(4)81.75(5)87.75(6) US TV channels 2-6 (VHF_L) at 54, 60, 66, 76 and 82 6MHz channel audio carrier at 5.75MHz (FM MTS) 47-54(E2)54-61(E3)61-68(E4)174-181(E5)181-188(E6)188-195(E7)195-202(E8)202-209(E9)209- 216(E10)216-223(E11)223-230(E12) European TV 7MHz spacing, FM audio band I: E2-E4 Band III: E5-E12 76-91 Japan FM radio frequency band

frequency Purpose/Service 87.9-108 US/Europe FM broadcast band 200kHz spacing (USA) 100kHz spacing (Europe) frequency Purpose/Service 162.550(WX1)162.100(WX2)162.475(WX3)162.425(WX4)162.450(WX5)162.500(WX6)162.525(WX7) 7 channels in the US weather frequency band, 25kHz interval SAME: Specific AreaMessage Encoding (Specific AreaMessage Encoding) 179.75(7)215.75(13) US TV channels 7-13 (VHF_High) at 174, 180, 186, 192, 198, 204, 210 6MHz channels at 5.75MHz FM sound 182.5(F5)224.5(F10) France TV F5-F10 frequency band III 8MHz channels at 176, 784, 192, 200, 208, 216 images at +6.5MHz AM sound

frequency Purpose/Service 470-478(21)854-862(69) Band IV - TV broadcasting Band V - TV broadcasting 6MHz channels from 470 to 862MHz UK system I (PAL): +/-25kHz offset can be used to mitigate co-channel interference AM image carrier at +1.25 (lower sideband residual) FMW sound at +7.25 Nicam digital sound at +7.802 French system L (Secam): +/-37.5kHz offset can be used AM image carrier at +1.25 (inverted video) FMW sound at +7.75 Nicam digital sound at +7.55 frequency Purpose/Service 470-476(14)819-825(69) US TV channel 14-696MHz channel sound carrier at 5.75MHz (FM MTS) legal mandatory 14-20 sharing

Figure 1B is a more detailed block diagram of the low-IF circuit 106 and DSP circuit 108 of Figure 1A, wherein the receiver circuit is used in an integrated FM terrestrial broadcast receiver. More specifically, in the embodiment 150 of Figure 1B, the low-IF circuit 106 Contains variable gain amplifiers (VGAs) 152 and 154 which receive real (I) and imaginary (Q) signals 116 which have been mixed down to a low IF frequency by mixer 104. Thereafter, the output of VGA 152 is Pass ADC158 is converted from low intermediate frequency to digital domain. Similarly, the output of VGA154 is converted from low intermediate frequency to digital domain by using bandpass ADC156. ADC156 and 158 together generate real (I) and imaginary (Q) digital output Signal 120. DSP circuitry 108 performs digital processing in the digital domain to further tune the target channel. More specifically, low-IF DSP circuitry 108 employs a channel selection filter represented by channel filter block 162 to further tune the target channel. As above As noted, DSP circuitry 108 may implement digital processing to provide FM demodulation of the tuned digital signal, as represented by FM demodulation block 166, and may implement stereo decoding, such as MPX decoding, as represented by stereo decoder block 164 In addition, using in part the RDS (Radio Data System)/RBDS (Radio Broadcast Data System) decoder 168 in the DSP circuit 108, the embodiment 150 can tune and decode RDS and/or RBDS information from low intermediate frequency The output signals of DSP circuit 108 are left (L) and right (R) digital audio signals 122. If desired, integrated digital-to-analog converters (DACs), such as DACs 170 and 172, can be used to convert these digital audio signals to left (L) ) and right (R) analog audio signal 212. It should also be noted that if desired, ADCs 156 and 158 may be implemented as complex bandpass ADCs, real lowpass ADCs, or other desired ADC architectures.

As noted above, the architecture of the present invention is advantageous for small, low-cost portable devices, and especially for those devices that need to receive terrestrial audio broadcasts, such as FM broadcasts. Specifically, the LO generating circuit 130, the mixer 104, the low-IF circuit 106 and the DSP circuit 108 are preferably all integrated on the same integrated circuit. In addition, LNA 102 and other desired circuits can also be integrated on the same integrated circuit. For example, this integrated circuit may be fabricated using a CMOS process, a BiCMOS process, or any other desired process or combination of processes. In this way, for example, a single integrated circuit can receive a terrestrial broadcast signal spectrum and output a digital or analog audio signal associated with a tuned terrestrial broadcast channel. Preferably, this integrated circuit is a CMOS integrated circuit, and the integrated CMOS terrestrial receiver of the present invention is mounted in a 4 x 4mm 24-pin micro-soldered frame (MLP) package for small portable devices, such as cellular phones, portable Audio devices, MP3 players, portable computing devices and other small portable devices offer advantageous cost, size and performance characteristics.

Power consumption is another concern for such small portable devices. The integrated receiver architecture of the present invention advantageously provides reduced energy consumption and allows the use of a different range of power sources to power the integrated receiver. In particular, the invention allows low current consumption with source current less than or equal to 30 mA (milliamps). Furthermore, the level of integration provided by the present invention allows for a small package size and reduced external component count of less than or equal to about 6 external components.

FIG. 1C is a block diagram of an example embodiment 175 of an integrated terrestrial broadcast receiver 196 . In the depicted embodiment, integrated receiver 196 includes an AM antenna and an FM antenna. FM antenna 111 provides a differential FM input signal represented by signals FMIP (FM input positive) and FMIN (FM input negative) to first low noise amplifier (LNA) 102A. The FMIN node is connected to ground 113 . AM antenna 115 provides a differential AM input signal represented by signals AMIP (AM input positive) and AMIN (AM input negative) to second low noise amplifier (LNA) 102B. The AMIN node is connected to ground 113 . As depicted, the AM antenna 115 is a ferrite rod antenna and can be tuned for AM reception using an on-chip variable capacitor circuit 198 . The connection between the on-chip variable capacitor circuit 198 and the AM antenna 115 is indicated by the AMACP signal. It should also be noted that the FM antenna reception can also be tuned using the on-chip variable capacitor circuit if desired. For power to the integrated receiver 196, an integrated power regulator (LDO) block 185 may be provided to help regulate on-chip power.

As in FIG. 1A, the outputs of LNAs 102A and 102B may be processed by mixer 104 to produce real (I) and imaginary (Q) signals. Thereafter, these signals are processed by a programmable gain amplifier (PGA) 176 which is controlled by an automatic gain control (AGC) block 180 . Thereafter, the output signal from PGA 176 is converted to digital I and Q values by I-path ADC 158 and Q-path ADC 156. Thereafter, DSP circuitry 108 processes the digital I and Q values to generate left (L) and right (R) digital audio output signals that may be provided to digital audio block 194 . Additionally, these left (L) and right (R) digital audio output signals may be processed by additional circuitry represented by digital-to-analog conversion (DAC) circuits 170 and 172 to generate left (LOUT) and right (ROUT) analog output signals. These analog output signals can thereafter be output to a listening device such as headphones. For example, amplifier 178 and speaker outputs 177A and 177B may represent headphones for listening to analog audio output signals. As described above with respect to FIG. 1B , DSP circuitry 108 may provide a variety of processing features, including digital filtering, FM and AM demodulation (DEMOD), and stereo/audio decoding such as MPX decoding. Low IF block 186 includes additional circuitry that is used to control the operation of DSP circuitry 108 when processing digital I/Q signals.

A digital control interface 190 may also be provided in the integrated receiver 196 to communicate with external devices such as the controller 192. As depicted, the digital communication interface includes power-down (PDN_) (power-down) input signals, reset (RST_) input signal, bidirectional serial data input/output (SDIO) signal, serial clock input (SCLK) signal, and serial interface enable (SEN) input signal. As part of the digital interface, the digital audio block 194 can also output digital audio signal to an external device such as the controller 192. As described, this communication is provided through one or more general-purpose programmable input/output (GPIO) signals. The GPIO signal represents a pin on the integrated receiver 196, Receiver 196 may be programmed by the user to perform various functions as desired, depending on the functionality desired by the user. Additionally, through interface 190, a wide variety of control and/or data information may be provided to an external device such as controller 192 Or provided from an external device. For example, the RDS/RBDS block 187 can report the relevant RDS/RBDS data through the control interface 190. The received strength quality indicator block (RSQI) 188 can analyze the received signal and report information about the signal passed through the control interface 190 Intensity data. It should be noted that other communication interfaces may be used if desired, including serial or parallel interfaces using synchronous or asynchronous communication protocols.

Referring back to mixer 104 in FIG. 1C, the LO mixed signal is received by mixer 104 from a phase shift block (0/90) 132 that generates two mixed signals that are 90 degrees out of phase with each other. Phase shift block 132 receives an oscillating signal from frequency synthesizer (FREQ SYNTH) 182 . The frequency synthesizer 182 receives a reference frequency from a reference frequency (REF) block 183 and receives a control signal from an automatic frequency control (AFC) block 181 . For example, the external crystal oscillator 184 operating at 32.768kHz provides a fixed reference clock signal for the reference frequency block 183 through the connections XTAL1 and XTAL2. AFC block 181 receives a tuning error signal from receive path circuitry within integrated receiver 196 and provides a correction control signal to frequency synthesizer 182 . The use of such error correction signals will be described in detail below.

Figures 2A, 2B, 3A, 3B are now discussed. These figures provide additional embodiments of receivers according to the present invention that employ a ratiometric clock system of mixing circuits and digital circuits on the same integrated circuit. The resulting clock signals are considered ratiometric in that they are all divisors or multiples of at least one common clock signal. As discussed below, such a ratiometric clock signal can be generated by first generating a base oscillator signal that is then used to generate multiple related clocks through a divider and multiplier signal, so these clock signals are ratiometric relative to each other.

2A is a block diagram of an embodiment 200 of an integrated terrestrial broadcast receiver that employs a frequency synthesizer 209 and a ratiometric clock signal to provide the receiver circuitry with an LO mixed signal (f _LO ) 118 and a digital clock signal (f _DIG )205. As in FIG. 1A , a radio frequency input signal spectrum (f _RF ) 112 is received by a low noise amplifier (LNA) 102 and processed by a mixer 104 to generate real (I) and imaginary (Q) signals 116 . Low-IF conversion circuitry 106 and DSP circuitry 108 process these signals to produce left (L) and right (R) digital audio output signals 122 . In addition, as shown in FIG. 1B, these left (L) and right (R) digital audio output signals 122 can be processed by additional circuitry, such as represented by digital-to-analog conversion (DAC) circuits 170 and 172, to generate left (L) ) and right (R) analog output signal 212.

As further described in the embodiment 200 of FIG. 2A , a phase shift block 132 may be employed, and this phase shift block 132 may be a divide-by-two frequency divider that produces two mixed signals 118 that are 90 degrees out of phase with each other. -two) blocks. Using two mixed signals that are 90 degrees out of phase with each other is a typical technique for generating mixed signals for a mixer such as mixer 104 to produce real (I) and imaginary (Q) signals such as signal 116 . If desired, phase shift block 132 may also be a divide-by-three block that generates two mixed signals that are 120 degrees out of phase with each other. Depending on the implementation of phase shift block 132, the processing provided by low-IF conversion circuit 132 and DSP circuit 108 may vary accordingly. It should be noted that the more general block 132 represents a quadrature generation circuit that can be implemented in a number of different ways to obtain the mixed signal 118 for the mixer 104 . Furthermore, the functionality of block 132 may be included in other blocks represented in Figures 2A and 3A-3B, if desired.

In the depicted embodiment 200 , the local oscillator generation circuit includes a frequency synthesizer 209 , a divide by X (÷X) block 204 and a quadrature generation circuit or phase shift block 132 . Phase shift block 132 provides phase shifted LO mixed signal 118 to mixer 104 . The frequency synthesizer 209 produces an output signal (f _OSC ) 252 at the desired frequency. Frequency synthesizer 209 can be implemented in a variety of ways, including using a phase locked loop (PLL), a frequency locked loop (FLL), or some other desired oscillation generating circuit. The frequency of the output signal (f _OSC ) 252 is determined by control circuitry that uses the target channel input signal (TARGET CHANNEL ) 222 to select the desired output frequency. As discussed further below, the frequency of this target channel signal 222 may be related to an integer (N) selected based on the desired channel. Frequency synthesizer 209 also employs input reference frequency (f _REF ) 206 in generating output signal (f _OSC ) 252 at the desired frequency. Thereafter, the output signal (f _OSC ) 252 passes through a divide-by-X (÷X) block 204 to generate the output signal 117 , which is used to generate the desired LO mixed signal (f _LO ) 118 for the mixer 104 . If desired, a band selection signal (BANDSELECTION) 207 may be employed and applied to a divide by X (÷X) block 204 as discussed in more detail below. This band select signal 207 may be used to adjust the tuning band for the receiver 200 . For example, the tuning band may be adjusted from an FM broadcast band to an AM broadcast band. In this way, a single receiver can be used to tune channels within multiple broadcast frequency bands.

Advantageously, output signal (f _OSC ) 252 may also be used to generate digital clock signal (f _DIG ) 205 employed by digital circuits in low-IF conversion block 106 , DSP circuit 108 , and DACs 170 and 172 . Thus, digital clock signal (f _DIG ) 205, other clock signals based on digital clock signal (f _DIG ) 205, LO mixing signal 118, output signal (f _OSC ) 252, and intervening clock nodes are all located at At frequencies that are divisors or multiples of each other or of a common reference clock signal, thus making the clock signal proportional. To generate digital clock signal (f _DIG ) 205 , output signal (f _OSC ) 252 passes through Y divide (÷Y) block 202 . By using output signal (f _OSC ) 252 to generate LO mixing signal 118 and digital clock signal (f _DIG ) 205 for mixer 104, the two resulting signals become ratiometric and thus tend to limit the distance between the two signals. potential interference because the digital harmonics of these signals tend to fall on the frequency of the oscillating signal (f _OSC ) 252 . Previous systems typically used an external reference clock to drive a digital clock signal on an integrated circuit separate from the mixing circuit. If such systems then attempt to integrate the mixer and digital circuitry onto the same integrated circuit, there will typically be performance-degrading interference. In contrast, the ratiometric clock characteristic of the present invention reduces unwanted interference and improves integrated receiver performance.

FIG. 2B is a block diagram of the basic structure of a proportional clock system 250 illustrating the basic components of the proportional clock of the present invention. An input oscillator signal (f _OSC ) 252 is received by system 250 . This oscillating signal (f _OSC ) 252 can be generated using a variety of different circuits. For example, a PLL may be employed to provide the oscillating signal (f _OSC ) 252 used to generate the LO mixing signal 118 and the digital clock signal (f _DIG ) 205 . In FIG. 3A discussed below, a voltage controlled oscillator (VCO) 314 is used to generate an oscillating signal (f _VCO ) 315 used to generate the LO mixing signal 118 and the digital clock signal (f _DIG ) 205 . For example, VCO 314 may be controlled as part of a PLL or by a frequency locked loop control algorithm implemented in tuning control circuit 312 . In short, the ratiometric clock of the present invention can be used in a wide variety of circuits capable of generating initial oscillating signals from which a number of other ratiometric clock signals are derived.

Looking back at the example in Figure 2B, it can be seen that the first and second divider circuits are used to generate two ratiometric clock signals. In particular, divide by X (÷X) block 204 receives input oscillator signal (f _OSC ) 252 and outputs signal 117 as depicted. This output signal is processed by a quadrature generation (QUAD GEN) circuit 132 to generate two LO mixed signals (f _LO ) 118 that can be used by mixer 104 . Y frequency division (÷Y) block 202 receives input oscillating signal ₍ f _OSC ) 252 and outputs digital clock signal (f _DIG ) 205, which is used to generate The digital clock signal used by the integrated digital circuits of the digital circuits within circuit 108 . It should be noted that other ratiometric clock signals can also be generated, if desired, and that the generated ratiometric clock signals can be used for other purposes, if desired. It should also be noted that the mixer circuits and digital circuits that use these proportional clock signals, along with the proportional clock system 250, are preferably integrated in the same integrated circuit.

In operation, as described above, the ratiometric clock characteristic of the present invention helps reduce unwanted interference because the mixed signal and the digital clock signal are divisors or multiples of each other or a common reference clock signal. Frequency division The values X and Y, together with an integer N with respect to the target channel signal 222, provide programmable control of the clock signal used. For example, the following equations can be used to represent the circuit in FIG. 3A , which will be discussed in detail below, the oscillating output signal ( The proportional values of f _OSC ) 252 , digital clock signal (f _DIG ) 205 and LO mixing signal (f _LO ) 118 (assuming a divide-by-two quadrature generator) are all based on reference frequency 206 .

f _VCO ＝(F _REF /R)·N

f _signal117 = f _VCO /X = (f _REF N)/(R X)

f _LO = f _signal117 /2 = (f _REF N)/(2 R X)

f _DIG ＝f _VCO /Y＝(f _REF N)/(R Y)

f _VCO ＝f _LO ·(2·X)＝f _DIG ·Y

Thereafter, the values of N, R, X and Y can be selected and controlled to achieve the desired frequencies of these signals. The selection criteria for the values of N, R, X and Y can be implemented as desired. For example, these values can be selected from an on-chip look-up table or set through user-configurable registers. As shown in FIG. 3A, an error signal (ERROR) 322 may be generated, for example, using DSP circuitry 108 that identifies errors in tuning the received signal. Thereafter, this error signal can be used to modify the N value in order to reduce the frequency error substantially to zero when tuning the received signal.

As an example of an FM spectrum, the reference frequency 206 may be chosen to be 32.768 kHz. A low-IF target frequency may be chosen to be around 200kHz. X can be chosen to be 12. Y can be chosen to be 100. The choice of N and R varies according to the FM channel to be tuned. For example, for a desired FM channel to be tuned centered at about 100 MHz, N may be chosen to be 73096, while R is considered to be nominally equal to 1. Using these chosen numbers, the oscillation signal (f _OSC ) 252 will be 2.395 GHz. The digital clock signal (f _DIG ) 205 will be 23.95 MHz. The output signal 117 will be 199.6 MHz. And the LO mixing signal (f _LO ) 118 to the mixer 104 will be 99.8 MHz. Thereafter, the mixer 104 will mix the input signal spectrum 112 (f _RF ) and the mixing signal 118 from the phase shift block 132 to mix the desired FM channel at 100 MHz to a low-IF target frequency of approximately 200 kHz (i.e., the 100.0MHz-99.8MHz component ends at about 200kHz.) Thereafter, an appropriate value of N for each channel with the FM broadcast spectrum can be similarly chosen such that mixer 104 mixes the desired channel down to the target intermediate frequency frequency. It should be noted that the X and Y values can be modified if desired. It should also be noted that the target IF frequency can be variable if, for example, discrete tuning steps are used for the LO generation circuit.

In addition, as noted above, the Divide by X (÷X) block can also receive a band selection signal (BAND SELECTION) 207 . This signal can be used to select the frequency band in which the receiver is tuning the channel. For example, the oscillating output signal (f _OSC ) 252 may be a signal at about 2-3 GHz or greater, and the band selection signal (BAND SELECTION ) 207 may be used to select the value used for X, thus determining the tuning range of the receiver. Because many oscillators have a good operating range, the minimum to maximum frequency differs by a factor of about 1.3. Therefore this technique is very useful. Therefore, since it is related to an oscillating output signal (f _OSC ) 252 from about 2.114GHz to 2.590GHz, it is possible to tune the FM spectrum from 88.1 to 107.9 using a single on-chip oscillator, assuming a value of X of 12 and that this range is Within a factor of 1.3 from the minimum frequency to the maximum frequency. However, if it is desired to tune additional broadcast spectrum, the individual on-chip oscillators have to operate outside of their good operating range unless other coefficients are modified. Using the architecture described above, the value of X (and N) can be adjusted to move the resulting tuning range into the desired frequency band, but still using the same on-chip oscillator.

3A is a block diagram of an alternate embodiment 300 of an integrated terrestrial broadcast receiver employing a tuning control circuit 312 and a ratiometric clock system to provide the receiver circuitry with an LO mixing signal (f _LO ) 118 and a digital clock signal ( f _DIG )205. 1 and 2A, a radio frequency input signal spectrum (f _RF ) 112 is received by a low noise amplifier (LNA) 102 and processed by a mixer 104 to produce real (I) and imaginary (Q) signals 116. IF conversion circuit 106 and DSP circuit 108 process these signals to generate left (L) and right (R) digital audio output signals 122. Also, as shown in FIG. 2A, these left (L) and right (R) digital audio output signals 122 may be processed by additional circuitry as represented by digital-to-analog converter (DAC) circuits 170 and 172 to generate left (L) and right (R) analog audio output signals 212. Meanwhile, as shown in FIG. 2A, the LO input signal (f _LO ) 118 and digital clock signal (f _DIG ) 205 may be generated as ratiometric clock signals by using divide-by-X (÷X) block 204 and divide-by-Y (÷Y) block 202 . A band selection signal (BANDSELECTION) 207 may also be applied to the X frequency division (÷X) block 204 if desired. Additionally, a quadrature generator or phase shift block 132 provides the phase shifted mixed signal 118 to the mixer 104 . As detailed in FIG. 3A , dashed line 304 represents digital circuitry in a single integrated circuit, such as the digital circuitry in low-IF conversion circuit 106 , DSP circuit 108 , and DACs 170 and 172 . In particular, analog-to-digital converters (ADCs) 156 and 158 represent analog-to-digital conversion circuits that generate real (I) and imaginary (Q) digital signals 120 . ADC 156 and ADC 158 employ a sampling clock signal based on digital clock signal (f _DIG ) 205 . Similarly, circuits in DSP circuitry 108 are clocked based on digital clock signal (f _DIG ) 205 . In contrast to the embodiment 200 of FIG. 2A, in the embodiment 300 of FIG _. Clock signal (f _{REF_FIXED} ) 320 . Although a ratiometric clock signal 329 is desirable to reduce performance-degrading disturbances, an external reference clock signal such as clock signal (f _{REF_XED} ) 320 can be used if desired. Additionally, clock signal (f _{REF — FIXED} ) 320 may be used as a separate clock source in addition to digital clock signal (f _DIG ) 205 for digital circuitry 304 instead of being selected by MUX 328 , if desired. For example, switch 321 may be used to provide clock signal (f _{REF — FIXED} ) 320 directly to digital circuit 304 such that both clock signal (f _{REF — FIXED} ) 320 and ratiometric clock signal 329 may be employed by digital circuit 304 . Such an embodiment is described in more detail below with respect to Figure 3B. It should further be noted that the digital clock signal (f _DIG ) 205 and the reference clock signal 320 from the MUX 328 may be passed through additional splitter Frequency converter, frequency multiplier or other clock generation circuit. With different circuit blocks in digital circuitry 304, one or more different clock signals may be generated for use.

Tuning control circuit 312 in FIG. 3A controls a voltage controlled oscillator (VCO) 314 which then generates an oscillating signal (f _VCO ) 315 for generating a proportional clock signal. Tuning control circuit 312 receives target channel signal (TARGETCHANNEL) 222, which indicates the desired channel to be tuned; tuning control circuit 312 receives oscillation signal 315 from VCO 314 as a feedback signal; and reference frequency signal (f _REF ) 206. As discussed above, target channel signal 222 may be associated with an integer N selected based on the desired channel. The divider block values represented by the divide-by-N block (÷N) 316 and the divide-by-R block (÷R) 318 are selected based on the target channel signal (TARGET CHANNEL) 222 to control the coarse and fine tuning signals 317 and 319. More specifically, assuming that R has a nominal value of 1, the value of N corresponds to the desired target channel. In the depicted embodiment, FINE TUNE and COARSE TUNE 317 are 10-bit control signals. It should be noted that the coarse and fine tuning signals 317 and 319 may be signals of any desired bit length, may be of different lengths, and may be variable or analog signals if desired. Other control signals may also be used, depending on the VCO circuitry used for VCO 314, if desired. It should further be noted that the VCO circuit represented by block 314 can be implemented using many different oscillator circuits. US Patent No. 6,388,536 entitled "METHOD AND APPARATUS FOR PROVIDING COARSE AND FINE TUNING CONTROL FOR SYNTHESIZING HIGH-FREQUENCY SIGNALS FOR WIRELESS COMMUNICATIONS" describes The example oscillator circuit employed, this patent is incorporated by reference in its entirety.

It should also be noted that the output frequency of the VCO is preferably equal to or greater than about 2.3 GHz in order to reduce interference with other services such as cellular telephone operating frequencies. This relatively high output frequency also contributes to an efficient small integrated circuit, which employs an LC tank oscillator circuit because the LC tank component can be made relatively small. In particular, since the output frequency of the VCO 314 is in the range equal to or greater than approximately 2.3 GHz, the one or more inductors required for LC energy storage implementation of the VCO 314 may be integrated into the integrated circuit or contained within the device package.

In operation, the tuning control circuit 312 first receives a target channel signal (TARGET CHANNEL) 222 , which indicates the channel within the spectrum of the input signal spectrum (f _RF ) 112 to be tuned. Tuning control circuit 312 places fine tuning signal (FINE TUNE) 319 at a nominal or initial setting, and thereafter tuning control circuit 312 outputs a coarse tuning control (COARSE TUNE) 317 to provide coarse tuning of VCO 314 . Thereafter, tuning control circuit 312 adjusts fine tuning signal (FINE TUNE) 319 to fine tune and lock VCO 314 to desired oscillating output signal 315 . Thereafter, the feedback signal from the oscillating signal 315 is used to control the tuning of the output from the VCO 314 . Additionally, an error signal (ERROR) 322 may be used to aid in this tuning. Error signal (ERROR) 322 can indicate tuning errors in the received signal, and tuning control circuit 312 can use this error signal to automatically adjust the output frequency of VCO 314 to correct for these tuning errors. Thus, the tuning control circuit 312 can simultaneously use the feedback signal from the output signal 315 of the VCO 314 and the additional error signal (ERROR) 322 for frequency control.

When changing the oscillating signal 315 to tune a particular desired channel, the digital clock signal (f _DIG ) 205 may also be changed in a proportional fashion, depending on the selection of the values of X and Y in blocks 204 and 200, respectively. Similarly, this change in digital clock signal (f _DIG ) 205 also occurs due to a change in output signal (f _OSC ) 252 of FIG. 2A . As shown in FIG. 3A , due to this change in digital clock signal (f _DIG ) 205 , tuning control circuit 312 may output LO jump signal (JUMP) 326 to indicate that a change has occurred in oscillator signal 315 . Using this LO jump signal (JUMP) 326, digital circuitry 304 can employ compensation routines to adjust for proportional changes in digital clock signal ( _fDIG ) 205, if desired.

As mentioned above, the X and Y divider blocks in Figures 2A, 2B, 3A and 3B can be changed programmatically or algorithmically to obtain the oscillation frequency and desired ratiometric ratio, if desired. For example, it is desirable that changes in oscillating signals 252 and 315 in FIGS. 2A , 3A and 3B correlate with less than 1% change in the value of digital clock signal (f _DIG ) 205 . The values of X and Y in blocks 204 and 202 may thus be selected accordingly. It should be noted that an integrated on-chip microcontroller can be employed to provide control of the frequency divider and other receiver operating parameters if desired. And this microcontroller can also be used to implement some or all of the digital processing performed by the DSP circuit 108 .

As noted above, for additional control, tuning control circuit 312 can receive error signal (ERROR) 322 from digital circuit 304 . This error signal 322 from the digital circuit 304 represents the error signal associated with detecting noise or interference in the receiver path due to errors in tuning the input signal spectrum (f _RF ) 112 to the appropriate channel . Tuning control signal 312 may use this error signal (ERROR) 322 to adjust the value of N in block 316 so that the received signal is ultimately more tuned. Additional control signals, as represented by element 325, may also be provided by DSP circuitry 108 to LNA 102, low-IF conversion circuitry 106, or other receiver circuitry to provide control for those circuitry.

FIG. 3B is a block diagram of an additional alternative embodiment 350 of an integrated terrestrial broadcast receiver that employs a ratiometric clock signal (f _DIG ) 205 and a fixed external reference clock (f _{REF_FIXED} ) 320 for digital circuit. A radio frequency input signal spectrum (f _RF ) 112 is received by a low noise amplifier (LNA) 112 and processed by a mixer 104 to generate real (I) and imaginary (Q) signals. These signals are thereafter processed by VGAs 152 and 154 and ADCs 158 and 156 to generate digital signals. Thereafter, these digital signals are provided to I path buffer (BUF) 354 and Q path buffer (BUF) 352 before being processed by DSP 108 to generate digital left and right audio signals. Thereafter, the output of DSP 108 is provided to left Audio signal buffer (BUF) 356 and right audio signal buffer (BUF) 358. The output of these buffers 356 and 358 can provide left and right digital audio signal 122. The output of these buffers 356 and 358 can also be provided to DACs 170 and 172 to generate left and right analog audio signals 212. The clock signal employed in embodiment 350 will be described in more detail below.

As in the previous embodiment, the LO input signal (f _LO ) 118 and the digital clock signal (f _DIG ) 205 can be used as a ratiometric clock using an X divider block (÷X) 204 and a Y divider block (÷Y) 202 signal is generated. The output of divide-by-X block (÷X) 204 passes through divide-by-two block (÷2) 132 to provide two LO mix signals 118 out of phase. Frequency synthesizer 182 generates oscillator signal (f _OSC ) 252 and is controlled by an automatic frequency control block (AFC). AFC block 181 receives external reference signal (f _REF ) 206 , channel select (CHANNEL) signal 222 and tuning correction error (ERROR) signal 322 . These signals are discussed above with respect to Figure 3A. Additionally, it should be noted that the external reference signal (f _REF ) 206 can be the same signal as the fixed external reference clock (f _{REF_FIXED} ) 320, or if this clock configuration is desired, the external reference signal (f _REF ) 206 can be derived from the fixed An external reference clock (f _{REF_FIXED} ) is generated in 320 .

Clock signals for the digital circuitry in embodiment 350 are provided using digital clock signal (f _DIG ) 205 and fixed external reference clock (f _{REF — FIXED} ) 320 . If desired, a fixed external reference clock (f _{REF — FIXED} ) 320 may be generated by a crystal oscillator (XTAL OSC) 374 operating at, for example, 12.288 MHz. As mentioned above, the digital clock signal (f _DIG ) 205 is ratiometric with respect to the oscillator signal (f _OSC ) 252 , and the DSP circuit 108 can be clocked using the digital clock signal (f _DIG ) 205 . Also, by using a ratiometric clock signal to clock the DSP circuit 108, interference with the mixer circuit 104 and other analog circuits on the integrated circuit (represented by arrow 372) is reduced. The digital audio output circuit 362 and the external codec (CODEC) 364 are clocked using a fixed external reference clock (f _{REF — FIXED} ) 320 rather than the digital clock signal (f _DIG ) 205 . The ADCs and DACs 156 , 158 , 170 and 172 in this embodiment are also clocked using a fixed external reference clock (f _{REF — FIXED} ) 320 . Because DSP 108 and ADCs and DACs 156, 158, 170 and 172 operate at different clock frequencies, buffers 352, 354, 356 and 358 can be used to buffer data between different data rates. For example, these buffers 352, 354, 356 and 358 may be dual port buffer memories capable of inputting data at one desired clock rate and outputting data at another desired clock rate.

This timing architecture can provide advantages for receiver applications where integrated circuits need to communicate at a specified rate. For example audio standards require communication to provide audio data at a certain rate, such as 48,000 samples per second (48ks/s). In the embodiment of FIG. 3B , the digital audio output circuit 362 can transmit the left (L) and right (R) digital audio signals 122 to the external CODEC 364 through the external interface 370 at a specified rate. Thus the sampling rate is related to the specified communication rate, a fixed external reference clock (f _{REF — FIXED} ) 320 may also be used to clock the ADCs and DACs 156 , 158 , 170 and 172 . Although some glitches may arise from using these non-ratiometric clock signals, the advantages of correlated sampling rates make this architecture advantageous. It should be noted that dashed lines 360 represent the boundaries of the integrated circuit.

Figure 4A is a block diagram of an embodiment 450 of an integrated terrestrial broadcast receiver that includes both AM broadcast reception and FM broadcast reception. In the depicted embodiment, input FM broadcast signal 112A is sent to LNA 102A as a differential signal. The differential output of LNA 102A is sent to mixer 104A, which uses LO mixed signal 118A from LO generation circuit 130 to generate I and Q signals 116A. Thereafter, these quadrature FM signals are processed by ADC and DSP circuits integrated into the same integrated circuit. The input AM broadcast signal 112B is sent to the LNA 102B and then to the mixer 104B. Mixer 104B uses LO mixing signal 118B from LO generation circuit 130 to generate I and Q signals 116B. Thereafter, these quadrature AM signals are processed by ADC and DSP circuits integrated into the same integrated circuit. In operation, LO generation circuit 130 is capable of receiving a band selection (BAND SELECTION) signal 207 which allows selection of which broadcast frequency band the receiver processes. It should be noted that LO generation circuit 130 is capable of generating a single set of mixed These mixed signals can be used by both the FM mixer 104A and the AM mixer 104B, depending on the selection made by the band selection signal 207.

4B is a block diagram of an embodiment of a portable device 402 that employs a low-IF integrated terrestrial broadcast receiver 100 in accordance with the present invention. As depicted, the portable device includes a low-IF receiver integrated circuit 100 which is connected to channel selection interface circuit 404 by line 412 and to audio output interface circuit 406 by line 410 . The audio output interface circuit 406 is in turn connected to the listening device 108 via a connection 414 . In such portable devices, the listening device 408 is typically an earphone that can be easily plugged into the portable device 402 . Embodiment 400 may include one or more antennas, such as FM broadcast antenna 420 and AM broadcast antenna 422 . It should be noted that the portable devices contemplated in this embodiment are preferably small portable devices having a volume of about 70 cubic inches or less and a weight of about 2 pounds or less. For example, as noted above, small portable device 402 may be a cell phone, MP3 player, PC card for a portable computer, USB connected device, or any other small portable device with an integrated terrestrial audio broadcast receiver. It should also be noted that the audio output interface 406 may provide a digital audio output signal, an analog audio output signal, or both. And if desired, the interface circuits 406 and 408 can be combined, for example if a single serial or parallel interface is used to provide the communication interface for the portable device 402 . FIG. 5A is a block diagram of an embodiment 520 of an integrated terrestrial broadcast receiver that implements

Embodiments include a local oscillator (LO) control circuit 500 for adding certain frequency control characteristics. As with embodiment 100 in FIG. 1A , radio frequency input signal spectrum (f _RF ) 102 is received by low noise amplifier (LNA) 102 and processed by mixer 104 to produce real (I) and imaginary (Q) signals 116 . Low-IF conversion circuitry 106 and DSP circuitry 108 process these signals to generate left (L) and right (R) digital audio output signals 122 . As discussed above with respect to FIG. 1A, note again that other or different output signals may be provided by the receiver, if desired. Additionally, as discussed above, LO mixing signals (f _LO ) 118 may be generated by LO generation circuitry 130 , and these phase-shifted mixing signals 118 may be used by mixer 104 .

LO control circuit 500 is added to FIG. 5A for additional frequency control features. One such feature is the high-side to low-side LO signal injection selection feature represented by block HI/LO INJECTION 510 . Another feature is a programmable IF location selection feature as represented by block IF SELECTION 512. These frequency control characteristics will be discussed in more detail with respect to Figures 5B and 5C. LO control circuit 500 is connected to DSP circuit 108 by one or more signals 504 and is connected to LO generation circuit 130 by one or more signals 506 .

FIG. 5B is a signal diagram of the high-side vs. low-side LO signal injection selection feature. In example 550 , the desired channel (f _CH ) to be tuned is represented by signal arrow 554 . A larger interfering signal (f _IMH ) is represented by signal arrow 552 . As is well known, the mixer 104 mixes the input radio frequency signal spectrum (f _RF ) to the intermediate frequency (f _IF ), and if low-side injection is used, the mixing is done according to the equation f _RF −f _LO =f _IF ; if With high-side injection, frequency mixing is done according to the equation f _IF =f _LO -f _RF . The designations (f _LOL ) and (f _LOH ) denote these two possible LO signals: low-side injection signal (f _LOL ) 562 and high-side injection signal (f _LOH ) 560 , respectively. Many systems operate by implementing either high-side injection or low-side injection and do not have the ability to transition between the two during operation. Many systems attempt to choose between high-side and low-side injection during operation by estimating the noise level or spurious phase noise (spur) in the tuned target channel signal after it has been processed through the receiver path.

Nevertheless, with the LO control circuit 500 of the present invention, prior to selecting either high-side injection or low-side injection, and prior to processing and tuning the desired channel itself, it is possible to achieve a high-side or low-side injection by estimating the image signal power in the spectrum. Dynamic selection of . For example, selection can be made using a selection algorithm based on image power at frequencies equidistant from the LO frequency as the desired channel to determine whether high-side injection or low-side injection is better. For example, by Tuned to these frequencies and via the signal 504 from the DSP circuit 108, the LO control circuit can estimate the signal power at the frequency of the image that can produce significant performance degradation. In particular, the next adjacent upper image (upper image) can be estimated Signal power and the next adjacent lower image signal power to determine whether to use high-side or low-side injection. And this estimation can be done at power-up across the entire spectrum, periodically across the entire spectrum, across a reduced spectrum that includes the desired channel to be tuned each time a channel is tuned, or at any other desired time This is done across any desired portion of the spectrum depending on the algorithm implemented.

Referring back to FIG. 5B , the interfering signal (f _IMH ) 552 represents an upper image that is as far away from the high-side LO injection signal (f _LOH ) 560 as the desired channel (f _CH ) 554 . If high side injection is used, the mixer will use the high side injection LO signal (f _LOH ) 560 and the interfering signal (f _IMH ) 552 will be mixed with the desired channel (f _CH ) 552 onto the intermediate frequency (f _IF ). Thus, using high-end injection will produce large unwanted images. Similarly, the interfering signal (f _IML ) 553 represents a down image as far from the low-side LO injection signal (f _LOL ) 562 as the desired channel (f _CH ) 554 . If low-side injection is used, the mixer will use the low-side injection LO signal (f _LOL ) 562 and the interfering signal (f _IML ) 553 will be mixed onto the intermediate frequency (f _IF ) along with the desired channel (f _CH ) 554 . Thus, using low-side injection will create an unwanted image, but the signal power of this image is much lower than that caused by using high-side LO injection. By estimating the signal power at the upper and lower image frequencies, the LO control circuit can determine whether high-side or low-side injection should be used. Therefore, in example 550, low-side injection should be used to prevent mixing of the larger interfering signal (f _IMH ) 552 onto the intermediate frequency (f _IF ). It should be noted that signal power at other frequencies, such as harmonics of the up-image and down-image frequencies, can be estimated to determine whether to dynamically select whether to use high-side or low-side injection, if desired.

Figure 5C is a signal diagram of the programmable IF position selection feature. In example 570, the channel to be tuned (f _CH ) is represented by signal arrow 554 and is using low-side injection. The LO control circuit 500 provides a programmable selection of an LO signal that can be used by a mixer to mix an input signal radio frequency spectrum (f RF ) 112 to an intermediate frequency (f _RF ) according to the equation f _RF - f _LO = f _{IF IF} ). As shown, two selectable IF target frequencies are represented by a first IF target frequency (f _IF1 ) 580 and a second IF target frequency (f _IF2 ) 582 . Thus, for a given desired channel (f _CH ) 554 that will be the tuned LO signal, if the first intermediate frequency target frequency (f _IF1 ) 580 is selected, then the first LO signal (f _LO1 ) 578 is used. Line 572 represents the action of mixer 104 to mix desired channel (f _CH ) 554 down to first intermediate frequency (f _IF1 ) 580 . Similarly, if a second intermediate frequency target frequency (f _IF2 ) 582 is selected, then a second LO signal (f _LO2 ) 576 is used. Line 574 represents the action of mixer 104 to mix desired channel (f _CH ) 554 down to second intermediate frequency (f _IF2 ) 582 .

Programmable selection of the LO signal may be provided by an intermediate frequency select signal (IF CODE) 502 received by LO control circuit 500, as shown in embodiment 520 of FIG. 5A. For example, this IF CODE 502 can be based on user-programmable on-chip registers. Factors in selecting a desired target IF frequency include the channel width of the RF spectrum of interest or other environmental considerations. For example, if the integrated terrestrial broadcast receiver 520 is to be used in multiple countries, a different target IF frequency is selected for each country. This choice may depend on the nature of the broadcast spectrum within the country, including the respective channel widths. It should be noted that a number of different mechanisms can be employed to provide programmable control of the LO control circuit 500 to select the IF frequency to be employed in operation.

Further modifications and alternative embodiments of the invention will be apparent to those skilled in the art from a review of this specification. Accordingly, it should be recognized that the invention is not limited to these example devices. Accordingly, this specification is constructed to illustrate It is intended to teach those skilled in the art the manner of carrying out the invention. It should be understood that the form of the invention shown in this specification is considered and described as the presently preferred embodiment. Various changes may be made. For example, equivalent elements may be substituted for elements illustrated and described in this specification, and certain features of the invention may be employed independently of the use of other features, which are within the skill of the art. It will be apparent after benefiting from the description of the invention.

Claims (29)

1. An integrated terrestrial audio broadcast receiver comprising: A mixer connected to receive as input a radio frequency signal spectrum comprising a spectrum of an FM audio broadcast signal including a spectrum from a terrestrial a plurality of FM channels of an audio FM broadcast, the mixer being configured to output real and imaginary low intermediate frequency signals; A local oscillator generating circuit connected to receive an FM channel selection signal as input and configured to provide an oscillating signal dependent on the FM channel selection signal and used to generate the mixing signal; an oscillation generating circuit within the local oscillator generating circuit configured to generate the oscillation signal; a quadrature generating circuit within the local oscillator generating circuit configured to receive the oscillation signal from the oscillation generating circuit and generate two signals for the mixer to output the real and imaginary low intermediate frequency signals a phase-shifted mixed signal; a low-intermediate frequency conversion circuit, which is connected to receive the low-intermediate frequency signal from the mixer and is configured to output a digital signal, the low-intermediate frequency conversion circuit includes first and second analog-to-digital converters, the said analog-to-digital converters are respectively connected to said real and imaginary low intermediate frequency signals and are configured to output real and imaginary digital signals; a digital signal processor connected to receive said digital signal from said low-intermediate frequency conversion circuit and configured to demodulate said FM in a selected FM channel, thereby decoding in a selected FM channel FM stereo encoding to digitally tune a selected FM channel and output a digital audio signal, the digital signal processor including an on-chip microcontroller; and digital-to-analog converter circuitry coupled to receive said digital audio signal from said digital signal processor and configured to output an analog audio signal; Wherein, the mixer, the local oscillator generation circuit, the low-intermediate frequency conversion circuit and the digital signal processor including the microcontroller are integrated in a single integrated circuit; and wherein the integrated circuit Manufactured using a Complementary Metal Oxide Semiconductor process. 2. The integrated terrestrial audio broadcast receiver of claim 1, further comprising input circuitry configured to receive FM audio broadcasts and AM audio broadcasts. 3. The integrated terrestrial audio broadcast receiver of claim 2, further comprising a second mixer configured to receive a mixed frequency signal from said local oscillator generating circuit, wherein one mixer is connected to receive a frequency modulated audio signal and another mixer is connected to receive the AM audio signal. 4. The integrated terrestrial audio broadcast receiver of claim 1, wherein the local oscillator generating circuit comprises a voltage controlled oscillator. 5. The integrated terrestrial audio broadcasting receiver according to claim 4, wherein the voltage controlled oscillator is constructed so that the frequency of the output signal is equal to or greater than 2.3 GHz. 6. An integrated terrestrial audio broadcast receiver according to claim 4, wherein said voltage controlled oscillator comprises an LC tank tank circuit, and wherein any inductance required for said LC tank tank is integrated in said single integrated circuit or contained within the package of the single integrated circuit. 7. The integrated terrestrial audio broadcast receiver of claim 4, wherein said local oscillator generation circuit comprises a frequency locked loop comprising said voltage controlled oscillator. 8. The integrated terrestrial audio broadcast receiver of claim 3, wherein the local oscillator generating circuit provides an output oscillating signal at discrete frequency steps. 9. The integrated terrestrial audio broadcast receiver of claim 1, wherein the two phase shifted mixed signals are 90 degrees out of phase. 10. The integrated terrestrial audio broadcast receiver of claim 1, wherein the two phase shift mixed signals are 120 degrees out of phase. 11. The integrated terrestrial audio broadcast receiver of claim 1, wherein the analog-to-digital converter is a bandpass analog-to-digital converter. 12. The integrated terrestrial audio broadcast receiver of claim 11, wherein the digital signal processor circuit includes a channel selection filter configured to provide additional tuning to a desired channel in the radio frequency signal spectrum. 13. The integrated terrestrial audio broadcast receiver of claim 1, wherein the analog-to-digital converter is a low-pass analog-to-digital converter. 14. The integrated terrestrial audio broadcast receiver of claim 13, wherein the digital signal processor circuit includes a channel selection filter configured to provide additional tuning to a desired channel in the radio frequency signal spectrum. 15. The integrated terrestrial audio broadcast receiver of claim 1 , further comprising a control circuit connected to the local oscillator generation circuit, the control circuit configured to select an intermediate frequency target frequency to be employed by the receiver . 16. The integrated terrestrial audio broadcast receiver of claim 15, wherein the IF target frequency selection is based on a programmable setting. 17. A portable device with an integrated terrestrial audio broadcast receiver, comprising: Channel selection interface; audio output interface; and an integrated terrestrial audio FM receiver connected to said channel selection interface and said audio output interface, said audio receiver comprising: A mixer coupled to receive as input a signal spectrum comprising an FM audio broadcast signal spectrum including a frequency FM audio broadcast signal from a terrestrial audio FM broadcast a plurality of FM channels, the mixer configured to output real and imaginary low intermediate frequency signals; A local oscillator generation circuit connected to receive an FM channel selection signal as input and configured to provide an oscillating signal dependent on the FM channel selection signal and used to generate the mixing signal; an oscillation generating circuit within the local oscillator generating circuit configured to generate the oscillation signal; a quadrature generating circuit within the local oscillator generating circuit configured to receive the oscillation signal from the oscillation generating circuit and generate two signals for the mixer to output the real and imaginary low intermediate frequency signals a phase-shifted mixed signal; a low-intermediate frequency conversion circuit, which is connected to receive the low-intermediate frequency signal from the mixer and is configured to output a digital signal, the low-intermediate frequency conversion circuit includes first and second analog-to-digital converters, the said analog-to-digital converters are respectively connected to said real and imaginary low intermediate frequency signals and are configured to output real and imaginary digital signals; a digital signal processor connected to receive said digital signal from said low-intermediate frequency conversion circuit and configured to demodulate said FM in a selected FM channel, thereby decoding in a selected FM channel FM stereo encoding to digitally tune a selected FM channel and output a digital audio signal, said digital signal processor comprising an on-chip microcontroller; and a digital-to-analog converter circuit connected to extract from said The digital signal processor receives the digital audio signal and is configured to output an analog audio signal; wherein said mixer, said local oscillator generation circuit, said low-intermediate frequency conversion circuit and said digital signal processor including said microcontroller are integrated in a single integrated circuit; and wherein said integrated circuit uses Complementary Metal Oxide Semiconductor process to manufacture. 18. The portable device of claim 17, wherein the portable device has a volume of 70 cubic inches or less and weighs 2 pounds or less. 19. The portable device according to claim 17, wherein said audio output interface comprises an interface configured to provide a digital audio output signal, and said digital audio signal from said digital signal processor is used to provide said Digital audio output signal. 20. The portable device of claim 17, wherein the integrated terrestrial audio receiver further comprises input circuitry configured to receive frequency modulated audio signals and amplitude modulated audio signals. 21. The portable device of claim 17, wherein the integrated circuit is configured to draw a current of 30 mA or less during operation. 22. The portable device of claim 21, wherein the integrated circuit in the portable device requires six or fewer external components. 23. The portable device of claim 17, wherein the integrated terrestrial audio receiver is configured in a package no larger than 4x4 millimeters. 24. The portable device of claim 17, wherein said integrated terrestrial audio receiver further comprises an LC tank oscillator circuit, and wherein an inductor of said LC tank is integrated in said integrated terrestrial audio receiver or Included in the package of the integrated terrestrial audio receiver. 25. A method of tuning a terrestrial audio broadcast in an integrated receiver, comprising: generating an oscillating signal dependent on the channel selection signal; providing a phase-shifted mixing signal based on the oscillating signal; mixing a radio frequency input signal spectrum comprising an FM audio broadcast signal spectrum comprising a frequency modulated audio broadcast signal from Multiple FM channels for terrestrial audio FM broadcasts; converting said low intermediate frequency output signal into real and imaginary digital signals; and The digital signal is processed by a digital signal processor circuit including an on-chip microcontroller to demodulate FM in the selected FM channel to decode the FM stereo code in the selected FM channel to digitally tune the selected FM channel FM channels, and output digital audio signals; and converting said digital audio signal to an analog audio output signal; Therein, all of the above steps are performed in a single integrated circuit at least partially comprising complementary metal-oxide-semiconductor circuits. 26. The method of claim 25, further comprising providing an input circuit configured to receive frequency modulated audio signals and amplitude modulated audio signals. 27. The method of claim 25, wherein said converting step includes converting said real low-IF signal to a digital signal using a band-pass analog-to-digital converter circuit and converting said imaginary signal to a digital signal using a band-pass analog-to-digital converter circuit. The low-IF signal is converted into a digital signal. 28. The method of claim 25, wherein said converting step includes converting said real low-IF signal to a digital signal using a low-pass analog-to-digital converter circuit and converting said virtual signal to a digital signal using a low-pass analog-to-digital converter circuit. The low intermediate frequency signal is converted into a digital signal. 29. The method of claim 25, further comprising selecting an IF target frequency employed by the receiver based on programmable settings.

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