CN115032169A - Gallium nitride-based terahertz detector array unit, detector and preparation method - Google Patents
Gallium nitride-based terahertz detector array unit, detector and preparation method Download PDFInfo
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Abstract
本发明涉及一种氮化镓基太赫兹探测器阵列单元、探测器及制备方法，阵列单元包括：太赫兹天线、检波单元和功率放大器。检波单元包括至少一个第一晶体管，功率放大器包括至少一个第二晶体管，至少一个第一晶体管和至少一个第二晶体管均采用氮化镓基高电子迁移率晶体管且集成在同一预制片上；太赫兹天线与至少一个所述第一晶体管中的检波单元输入端连接，至少一个所述第一晶体管中的检波单元输出端与至少一个所述第二晶体管中的功率放大器输入端连接。该阵列单元检波单元的晶体管与功率放大器的晶体管集成于同一衬底上，能够有效提高探测器像元一致性与集成度，减少封装和工艺加工成本，提高整个探测器阵列单元的高温工作能力。
The invention relates to a gallium nitride-based terahertz detector array unit, a detector and a preparation method. The array unit includes a terahertz antenna, a detection unit and a power amplifier. The detection unit includes at least one first transistor, the power amplifier includes at least one second transistor, and the at least one first transistor and the at least one second transistor both use gallium nitride-based high electron mobility transistors and are integrated on the same prefab; a terahertz antenna It is connected to the input end of the detection unit in at least one of the first transistors, and the output end of the detection unit in at least one of the first transistors is connected to the input end of the power amplifier in at least one of the second transistors. The transistors of the detection unit of the array unit and the transistors of the power amplifier are integrated on the same substrate, which can effectively improve the consistency and integration of the detector pixels, reduce the cost of packaging and process processing, and improve the high-temperature working capability of the entire detector array unit.
Description
Technical Field
The invention belongs to the technical field of terahertz detection, and particularly relates to a gallium nitride-based terahertz detector array unit, a detector and a preparation method.
Background
The terahertz wave is an electromagnetic wave with the frequency range of 0.1 THz-10 THz and the wavelength range of 0.03 mm-3 mm, is between millimeter waves and infrared light in an electromagnetic spectrum and is in a cross region of electronics and photonics. Terahertz waves have long been known to be a "terahertz blank" in the electromagnetic spectrum because of the limited knowledge of this band due to the lack of efficient methods of terahertz signal generation and detection. In recent years, due to technical progress, terahertz waves become a hot spot of scientific research, and have wide application prospects in the fields of public safety, biomedicine, nondestructive testing, data communication and the like.
The terahertz detection technology is an important branch of the terahertz technology. Compare in infrared light and visible light detection, terahertz wave's penetrability is stronger, can pierce through smog, dust and sand, has stronger environmental suitability. Compared with microwave detection, terahertz detection has the advantages of high imaging resolution, high frame rate and the like. In terms of safety, the electronic energy of terahertz waves is lower than that of X-rays, and the photon energy with the frequency of 1THz is only 4meV, so that ionization damage to organisms is not caused.
The terahertz focal plane array imaging is a detection technology which takes terahertz waves as carriers and takes a focal plane array as a core. The conventional terahertz detector needs to additionally increase a power amplifier to amplify an output signal of the terahertz detector, and a packaging module of the detector is connected with a packaging module of the power amplifier through a lead, so that the whole terahertz detector is large in size, high in cost and poor in design flexibility.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a gallium nitride-based terahertz detector array unit, a detector and a preparation method. The technical problem to be solved by the invention is realized by the following technical scheme:
the embodiment of the invention provides a high-integration gallium nitride-based terahertz detector array unit, which comprises: a terahertz antenna, a detection unit and a power amplifier, wherein,
the detection unit comprises at least one first transistor, the power amplifier comprises at least one second transistor, and the at least one first transistor and the at least one second transistor are all gallium nitride-based high electron mobility transistors and are integrated on the same prefabricated chip;
the terahertz antenna is connected with the input end of the detection unit in at least one first transistor, and the output end of the detection unit in at least one first transistor is connected with the input end of the power amplifier in at least one second transistor.
In one embodiment of the invention, the preform sheet comprises: a substrate, a nucleation layer, a transition layer, a buffer layer, a channel layer, and a barrier layer, wherein,
the substrate, the nucleation layer, the transition layer, the buffer layer, the channel layer and the barrier layer are sequentially laminated;
each isolation groove penetrates through the barrier layer and the channel layer and is located in the buffer layer.
In one embodiment of the invention, the material of the substrate comprises one or more of high-resistivity silicon, silicon carbide, sapphire, diamond and aluminum nitride, and the thickness is 100-1500 μm;
the material of the nucleation layer comprises aluminum nitride, and the thickness of the nucleation layer is 50-300 nm;
the material of the transition layer comprises one or more of AlGaN and an aluminum nitride/gallium nitride superlattice structure, and the thickness is 100-1000 nm;
the buffer layer is made of one or more of gallium nitride and aluminum gallium nitrogen, and the thickness of the buffer layer is 100-5000 nm;
the material of the channel layer comprises gallium nitride, and the thickness of the channel layer is 50-500 nm;
the barrier layer is one or more of aluminum gallium nitride, indium aluminum nitride and aluminum nitride, and the thickness is 2-40 nm.
In one embodiment of the present invention, the preform sheet further comprises: an isolation layer between the channel layer and the barrier layer.
In one embodiment of the invention, the preform sheet further comprises: the cap layer is positioned on the upper surface of the barrier layer.
In one embodiment of the invention, at least one isolation groove, at least two sets of electrodes and leads are provided on the pre-formed sheet, wherein,
each isolation groove penetrates through the barrier layer and the channel layer and is positioned in the buffer layer;
each group of electrodes is positioned on the barrier layer, the isolation groove is arranged between two adjacent groups of electrodes, each group of electrodes comprises a source electrode, a drain electrode and a gate electrode, and the gate electrode is positioned between the source electrode and the drain electrode;
the source electrode and the gate electrode of any one of the at least two groups of electrodes form the input end of the detection unit, the drain electrode of any one group of electrodes forms the output end of the detection unit, and the gate electrodes of the rest of any one group of electrodes form the input end of the power amplifier;
the output end of the detection unit is connected with the input end of the power amplifier through the lead; the terahertz antenna is arranged at the input end of the detection unit.
In one embodiment of the present invention, the pre-fabricated sheet is provided with an isolation groove, a first source electrode, a first gate electrode, a first drain electrode, a second source electrode, a second gate electrode, a second drain electrode, and a lead, wherein,
the isolation groove penetrates through the barrier layer and the channel layer and is positioned in the buffer layer;
the first source electrode, the first gate electrode and the first drain electrode are positioned on the barrier layer and on one side of the isolation groove, the first gate electrode is positioned between the first source electrode and the first drain electrode, the first source electrode and the first gate electrode form the detection unit input end, and the first drain electrode forms the detection unit output end;
the second source electrode, the second gate electrode and the second drain electrode are positioned on the barrier layer and on the other side of the isolation groove, the second gate electrode is positioned between the second source electrode and the second drain electrode, and the second gate electrode forms the input end of the power amplifier;
the first drain electrode is connected to the second gate electrode through the wire.
In one embodiment of the invention, the terahertz antenna is arranged on the input end of the wave detection unit and is integrated with the wave detection unit and the power amplifier.
Another embodiment of the present invention provides a high-integration gallium nitride-based terahertz detector, which includes a plurality of sub-units, wherein the plurality of sub-units are distributed in an array, and each sub-unit adopts the high-integration gallium nitride-based terahertz detector array unit described in the above embodiment.
The invention further provides a preparation method of the high-integration gallium nitride-based terahertz detector array unit, which comprises the following steps of:
s1, growing a nucleation layer, a transition layer, a buffer layer, a channel layer and a barrier layer on the substrate in sequence;
s2, preparing electric isolation of the device in the barrier layer, the channel layer and the buffer layer, and forming at least one isolation groove which penetrates through the barrier layer and the channel layer and is positioned in the buffer layer;
s3, preparing at least two groups of source electrodes and drain electrodes on the barrier layer, so that each group of the source electrodes and the drain electrodes are located in an electric area between the at least one isolation groove;
s4, preparing a gate electrode between the source electrode and the drain electrode of each group, forming at least two groups of electrodes, wherein the source electrode and the gate electrode of any one group of electrodes in the at least two groups of electrodes form the input end of the detection unit, the drain electrode of any one group of electrodes forms the output end of the detection unit, and the gate electrode of any other group of electrodes forms the input end of the power amplifier;
s5, preparing a passivation layer on the surface of the device, and enabling the passivation layer to cover the surface of the device;
s6, preparing a lead so that the lead is connected with the output end of the detection unit and the input end of the power amplifier, and preparing a terahertz antenna on the input end of the detection unit.
Compared with the prior art, the invention has the beneficial effects that:
the transistor of the detection unit of the terahertz detector array unit and the transistor of the power amplifier are integrated on the same substrate, so that the consistency and the integration level of the detector pixel can be effectively improved, the packaging and process processing cost is reduced, the high-temperature working capacity of the whole detector array unit is improved, and the realization of a high-density terahertz detector focal plane array is facilitated.
Drawings
Fig. 1 is a schematic structural diagram of a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention;
fig. 2 is a schematic circuit structure diagram of a terahertz detector array unit provided by an embodiment of the present invention;
fig. 3 is a schematic cross-sectional view of an array unit according to an embodiment of the present invention;
fig. 4 is a schematic cross-sectional structure diagram of another array unit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a high-integration gallium nitride-based terahertz detector provided in the embodiment of the present invention;
fig. 6 is a schematic flow chart of a method for manufacturing a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention;
fig. 7a to 7k are schematic process diagrams of a method for manufacturing a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention, and fig. 2 is a schematic circuit structural diagram of the terahertz detector array unit according to the embodiment of the present invention.
The terahertz detector array unit comprises a terahertz antenna 1, a detection unit 2 and a power amplifier 3. The detecting unit 2 comprises at least one first transistor, the power amplifier 3 comprises at least one second transistor, and the at least one first transistor and the at least one second transistor are all gallium nitride-based high electron mobility transistors and are integrated on the same prefabricated chip. The terahertz antenna 1 is connected with a detection unit input end in at least one first transistor, and a detection unit output end in at least one first transistor is connected with a power amplifier input end in at least one second transistor.
Specifically, the detector unit 2 may be formed by electrically connecting one first transistor, or may be formed by electrically connecting a plurality of first transistors, the number of first transistors being determined by the circuit of the detector unit 2; the first transistor is a gallium nitride-based high electron mobility transistor. The power amplifier 3 may be formed by electrically connecting one second transistor, or may be formed by electrically connecting a plurality of second transistors, the number of the second transistors being determined by the circuit of the power amplifier 3; the second transistor is a gallium nitride-based high electron mobility transistor. The at least one first transistor and the at least one second transistor are integrated on the same pre-fabricated chip with at least two transistors, of which one part forms the detector element 2 and the other part forms the power amplifier 3. One of the transistors forming the detection unit 2 has a detection unit input terminal connected to the terahertz antenna 1, and the other transistor has a detection unit output terminal, and when the detection unit 2 includes 1 transistor, the detection unit input terminal and the detection unit output terminal are located in the same transistor, and when the detection unit 2 includes more than 1 transistor, the detection unit input terminal and the detection unit output terminal are located in different transistors. One of the transistors forming the power amplifier 3 has a power amplifier input connected to the detector unit output.
For example, in fig. 2, the detector unit 2 is composed of 1 transistor M1, the power amplifier is composed of 2 transistors M2 and M3, the gate and source of the transistor M1 are used as detector unit input terminals, which are respectively connected to the terahertz antenna 1, the drain of the transistor M1 is used as a detector unit output terminal, and the gate of the transistor M2 in the power amplifier is used as a power amplifier input terminal, which is connected to the drain of the transistor M1.
In this embodiment, the terahertz antenna 1 is connected to the input end of the detection unit in the gallium nitride-based hemt, which means that the terahertz antenna 1 may be externally connected to the input end of the detection unit, and the terahertz antenna 1 may be disposed on the input end of the detection unit and integrated on the same substrate as the detection unit and the power amplifier. Preferably, the terahertz antenna 1 is provided at the input end of the detector unit, and is integrated on the same substrate as the detector unit and the power amplifier.
In one particular embodiment, the preform sheet comprises: a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205 and a barrier layer 206, on which at least one isolation trench 207, at least two sets of electrodes and leads 214 are provided.
Specifically, a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205, and a barrier layer 206 are sequentially stacked. Each isolation trench 207 penetrates the barrier layer 206 and the channel layer 205, and is located in the buffer layer 204. Each group of electrodes is located on the barrier layer 206, an isolation groove 207 is arranged between two adjacent groups of electrodes, each group of electrodes comprises a source electrode, a drain electrode and a gate electrode, and the gate electrode is located between the source electrode and the drain electrode. The source electrode and the gate electrode of any one of the at least two sets of electrodes form the detector unit input, the drain electrode of any one set of electrodes forms the detector unit output, and the gate electrodes of the remaining any one set of electrodes form the power amplifier input. The output end of the detection unit is connected with the input end of the power amplifier through a lead 214; the input end of the detection unit is provided with a terahertz antenna 1.
Specifically, the substrate 201, the nucleation layer 202, the transition layer 203, the buffer layer 204, the channel layer 205, and the barrier layer 206 form a prefabricated sheet, a group of electrodes and the prefabricated sheet located at the bottom of the electrodes form a transistor, the plurality of groups of electrodes form a plurality of transistors, one part of the transistors form the detection unit 2, and the other part of the transistors form the power amplifier 3. Among the transistors forming the detection unit 2, the source electrode and the gate electrode of one of the transistors form the detection unit input terminal, the terahertz antenna 1 is provided on the source electrode and the gate electrode, the drain electrode of the other transistor serves as the detection unit output terminal, the remaining electrodes are connected in accordance with the circuit configuration of the detection unit 2, and the detection unit input terminal and the detection unit output terminal may be located in the same transistor or in different transistors. Of the transistors forming the power amplifier 3, one transistor has a gate electrode as a power amplifier input terminal, the gate electrode is connected to a drain electrode as a detector output terminal via a lead 214, and the remaining electrodes are connected in accordance with the circuit configuration of the power amplifier 3.
Referring to fig. 3, fig. 3 is a schematic cross-sectional structure diagram of an array unit according to an embodiment of the invention. In fig. 3, the terahertz antenna, the detection unit and the power amplifier are integrated on the same fabricated chip to form an array unit, and the array unit includes a first transistor and a second transistor, that is, the detection unit 2 includes a first transistor, and the power amplifier includes a second transistor, and a first transistor and a second transistor are integrated on the same fabricated chip. The preform sheet includes a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205, and a barrier layer 206, and an isolation groove 207, a first source electrode 208, a first gate electrode 209, a first drain electrode 210, a second source electrode 211, a second gate electrode 212, a second drain electrode 213, and a lead 214 are disposed on the preform sheet. Wherein, the substrate 201, the nucleation layer 202, the transition layer 203, the buffer layer 204, the channel layer 205 and the barrier layer 206 are laminated in sequence; each isolation trench 207 penetrates the barrier layer 206 and the channel layer 205, and is located in the buffer layer 204; a first source electrode 208, a first gate electrode 209 and a first drain electrode 210 are positioned on the barrier layer 206 and on one side of the isolation groove 207, the first gate electrode 209 is positioned between the first source electrode 208 and the first drain electrode 210, the first source electrode 208 and the first gate electrode 209 form a detection unit input end, the terahertz antenna 1 is arranged on the first source electrode 208 and the first gate electrode 209, and the first drain electrode 210 forms a detection unit output end; a second source electrode 211, a second gate electrode 212 and a second drain electrode 213 are positioned on the barrier layer 206 and on the other side of the isolation trench 207, the second gate electrode 212 is positioned between the second source electrode 211 and the second drain electrode 213, and the second gate electrode 212 forms an input end of the power amplifier; the first drain electrode 210 is connected to the second gate electrode 212 through a wire 214.
In one embodiment, the materials of the nucleation layer 202, the transition layer 203, the buffer layer 204, and the barrier layer 206 are all group iii nitrides. A two-dimensional electron gas is formed between the channel layer 205 and the barrier layer 206.
In a specific embodiment, the substrate 201 material comprises one or more of high resistivity silicon, silicon carbide, sapphire, diamond, aluminum nitride, and has a thickness of 100 μm to 1500 μm. The material of the nucleation layer 202 comprises aluminum nitride and has a thickness of 50-300 nm. The material of the transition layer 203 comprises one or more of AlGaN and an aluminum nitride/gallium nitride superlattice structure, and the thickness is 100-1000 nm. The buffer layer 204 is made of one or more of gallium nitride and aluminum gallium nitride, and has a thickness of 100-5000 nm. The material of the channel layer 205 includes gallium nitride and has a thickness of 50-500 nm. The barrier layer 206 is one or more of aluminum gallium nitride, indium aluminum nitride and aluminum nitride, and has a thickness of 2-40nm, wherein the atomic ratio of aluminum in the aluminum gallium nitride, namely aluminum in the aluminum gallium nitride, is 0.2-0.4; the indium component of indium aluminum nitride, i.e., the atomic ratio of indium in indium aluminum nitride, is 0.1 to 0.2. The source electrode and the drain electrode are made of one or more groups of Ti, Al, Ni and Au materials, and the thickness is 10-500 nm. The gate electrode is made of Pt/Au or Ni/Au material, and the thickness of the gate electrode is 10-800 nm.
Preferably, the substrate 201 is high-resistivity silicon, has a resistivity of 5000 Ω · cm, a crystal orientation of <111>, and a thickness of 575 μm. The transition layer 203 is made of AlGaN and has a thickness of 750 nm. The buffer layer 204 is made of gan and has a thickness of 1000 nm. The barrier layer 206 was made of AlGaN with a thickness of 15nm, wherein the Al component was 0.25. The source electrode and the drain electrode are made of Ti/Al/Ni/Au materials, and the thickness of the materials is 25nm/140nm/40nm/50 nm. The gate electrode was a Pt/Au material with a thickness of 20nm/100 nm.
Referring to fig. 4, fig. 4 is a schematic cross-sectional structure diagram of another array unit according to an embodiment of the present invention.
In fig. 4, the array cell includes a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205, an isolation layer 215, a barrier layer 206, an isolation trench 207, a first source electrode 208, a first gate electrode 209, a first drain electrode 210, a second source electrode 211, a second gate electrode 212, a second drain electrode 213, and a lead 214. Wherein the isolation layer 215 is located between the channel layer 205 and the barrier layer 206, and the isolation trench 207 penetrates the barrier layer 206, the isolation layer 215 and the channel layer 205, and is located in the buffer layer 204. For the relative positions of the other structures, please refer to the above description, which is not repeated herein.
Specifically, the material of the isolation layer 215 includes aluminum nitride and has a thickness of 0.5 to 3 nm. Preferably, the material of the isolation layer 215 is aluminum nitride and has a thickness of 1 nm.
In one particular embodiment, the array cell includes a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205, an isolation layer 215, a barrier layer 206, a cap layer 216, an isolation trench 207, a first source electrode 208, a first gate electrode 209, a first drain electrode 210, a second source electrode 211, a second gate electrode 212, a second drain electrode 213, and a lead 214. Wherein, the capping layer 216 is located on the upper surface of the barrier layer 206, and the isolation trench 207 penetrates through the capping layer 216, the barrier layer 206 and the channel layer 205 and is located in the buffer layer 204. For the relative positions of the other structures, please refer to the above description, and the description is omitted here.
Specifically, the material of cap layer 216 comprises gallium nitride and has a thickness of 1-5 nm. Preferably, capping layer 216 is 2nm thick.
In one particular embodiment, the array unit includes a substrate 201, a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205, an isolation layer 215, a barrier layer 206, a cap layer 216, an isolation trench 207, a first source electrode 208, a first gate electrode 209, a first drain electrode 210, a second source electrode 211, a second gate electrode 212, a second drain electrode 213, a lead 214, and a passivation layer 217, wherein the passivation layer 217 covers the surface of the device. For the relative positions of the other structures, please refer to the above description, which is not repeated herein.
The high-integration gallium nitride-based terahertz detector array unit has the following advantages: the output end of the detection unit is provided with a power amplifier for amplifying the generated terahertz photocurrent or terahertz photovoltage, so that the responsivity and sensitivity of the detector are improved. The detection unit and the power amplifier are integrated on the same prefabricated chip, core device transistors forming the detection unit and the power amplifier are gallium nitride-based high electron mobility transistors, and the detection unit and the power amplifier can be manufactured by the same semiconductor manufacturing technology, so that the process manufacturing cost is reduced. And the detection unit and the power amplifier are integrated in a single chip and are arranged in the same packaging tube shell, and compared with the conventional discrete detection unit and power amplifier scheme, the packaging cost and the lead cost are reduced, and the reliability of the display unit is also improved. And fourthly, the detection unit and the power amplifier adopt gallium nitride-based high electron mobility transistors, so that the whole detector array unit can bear higher working temperature. And fifthly, the detection unit and the power amplifier are integrated on the same prefabricated chip, the manufacturing process is compatible, and the high-density and high-resolution terahertz focal plane array can be realized more easily. Sixthly, the terahertz antenna can also be selectively integrated on the same substrate, and the process manufacturing cost and the packaging cost can be further reduced
In summary, in the terahertz detector array unit detection unit of the embodiment, the detection unit and the power amplifier are both formed by one or more monolithically integrated high electron mobility transistors, the transistors of the detection unit and the transistors of the power amplifier are integrated on the same prefabricated chip, and the terahertz antenna, the detection unit and the power amplifier can be monolithically integrated into a whole by adopting a semiconductor manufacturing process and processed by the same batch process, so that the consistency and the integration degree of detector pixels can be effectively improved, the packaging and process processing costs are reduced, the high-temperature working capacity of the whole detector array unit is improved, and the realization of a high-density terahertz detector focal plane array is facilitated.
Example II
On the basis of the first embodiment, please refer to fig. 5, and fig. 5 is a schematic structural diagram of a high-integration gallium nitride-based terahertz detector provided in the first embodiment of the present invention. The detector comprises a plurality of subunits 100, wherein the subunits 100 are distributed in an array, and each subunit 100 adopts a high-integration gallium nitride-based terahertz detector array unit as shown in embodiment one.
EXAMPLE III
On the basis of the first embodiment, please refer to fig. 6, and fig. 6 is a schematic flow chart of a method for manufacturing a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention. The preparation method comprises the following steps:
s1, growing a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205 and a barrier layer 206 on the substrate 201 in sequence.
S2, making electrical isolation of the device in the barrier layer 206, the channel layer 205, and the buffer layer 204, forming at least one isolation trench 207 through the barrier layer 206 and the channel layer 205 and in the buffer layer 204.
S3, preparing at least two sets of source and drain electrodes on the barrier layer 206 such that each set of source and drain electrodes is located in an electrical region between at least one isolation trench 207.
S4, preparing a gate electrode between the source electrode and the drain electrode of each group, forming at least two groups of electrodes, wherein the source electrode and the gate electrode of any one of the at least two groups of electrodes form the input end of the detection unit, the drain electrode of any one group of electrodes forms the output end of the detection unit, and the gate electrode of any other group of electrodes forms the input end of the power amplifier.
S5, preparing the passivation layer 217 on the device surface, so that the passivation layer 217 covers the device surface.
S6, a lead 214 is prepared so that the lead 214 connects the detector unit output terminal and the power amplifier input terminal, and the terahertz antenna 1 is prepared on the detector unit input terminal.
Further, in this embodiment, the gallium nitride-based high electron mobility transistor includes a first transistor and a second transistor, that is, the detecting unit 2 includes a first transistor, and the power amplifier includes a second transistor, for example, the preparation method is described.
Referring to fig. 7a to 7k, fig. 7a to 7k are schematic process diagrams of a method for manufacturing a high-integration gallium nitride-based terahertz detector array unit according to an embodiment of the present invention.
S1, growing a nucleation layer 202, a transition layer 203, a buffer layer 204, a channel layer 205 and a barrier layer 206 on the substrate 201 in sequence.
The method specifically comprises the following steps:
s11, selecting high-resistance silicon with crystal orientation <111> as the substrate 201, wherein the thickness is 585 μm, please refer to FIG. 7 a;
s12, epitaxially growing an aluminum nitride nucleation layer 202 with a thickness of 200nm on the high-resistance silicon substrate 201 by Metal-Organic Chemical vapor Deposition (MOCVD) technique and equipment, as shown in fig. 7 b;
s13, epitaxially growing a transition layer 203 on the aluminum nitride nucleation layer 202 by using MOCVD technique and equipment, wherein the material is aluminum gallium nitride and the thickness is 0.75 μm, as shown in fig. 7 c;
s14, epitaxially growing a gan buffer layer 204 with a thickness of 1.5 μm on the aln transition layer 203 by using MOCVD technique and equipment, as shown in fig. 7 d;
s15, epitaxially growing a gan channel layer 205 with a thickness of 300nm on the gan buffer layer 204 by using MOCVD technique and equipment, as shown in fig. 7 e;
s16, epitaxially growing an aluminum-gallium-nitrogen barrier layer 206 with a thickness of 20nm on the gallium nitride channel layer 205 by using MOCVD technique and equipment, wherein the aluminum composition is 0.25, as shown in fig. 7 f;
s2, electrical isolation of the device is fabricated in the barrier layer 206, the channel layer 205, and the buffer layer 204, forming an isolation trench 207 through the barrier layer 206 and the channel layer 205 and in the buffer layer 204.
Specifically, a layer of silicon dioxide is deposited on the surface of the barrier layer 206, a Reactive Ion Etching (RIE) device is used to etch the mesa with an etching depth of 150nm after the photolithography, so that the isolation trench 207 penetrates through the aluminum gallium nitride barrier layer 206 and the gallium nitride channel layer 205 and is located in the buffer layer 204, and then the photoresist and the silicon dioxide layer are removed to complete the electrical isolation, as shown in fig. 7 g.
S3, preparing a first source electrode 208, a first drain electrode 210, a second source electrode 211, and a second drain electrode 213 on the barrier layer 206 such that the first source electrode 208, the first drain electrode 210 are located in an electrical area of one side of the isolation trench 207, and the second source electrode 211 and the second drain electrode 213 are located in an electrical area of the other side of the isolation trench 207.
Specifically, an ohmic stack metal of Ti/Al/Ni/Au material is deposited on the barrier layer 206 by electron beam evaporation equipment, with a thickness of 25nm/130nm/40nm/50nm, an annealing temperature of 850 ℃, and an annealing time of 45s, to form a first source electrode 208, a first drain electrode 210, a second source electrode 211, and a second drain electrode 213, as shown in fig. 7 h.
S4, a first gate electrode 209 and a second gate electrode 212 on the barrier layer 206 such that the first gate electrode 209 is located between the first source electrode 208 and the first drain electrode 210, and the second gate electrode 212 is located between the second source electrode 211 and the second drain electrode 213.
Specifically, a silicon nitride passivation layer is deposited on the surface of the device by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology and equipment, and surface treatment is carried out on a gate region after photoetching; using an electron beam evaporation apparatus, a gate stack metal of Ni/Au material is deposited to a thickness of 30nm/200nm and an annealing temperature of 350 ℃, annealed for 10min, and then the photoresist and the passivation layer are removed to form the first gate electrode 209 and the second gate electrode 212, see fig. 7 i.
Further, first source electrode 208 and first gate electrode 209 form the detector element input, first drain electrode 210 forms the detector element output, and second gate electrode 212 forms the power amplifier input.
S5, preparing the passivation layer 217 on the device surface such that the passivation layer 217 covers the device surface.
Specifically, a silicon nitride passivation layer 217 is deposited on the surface of the device as a protection layer by using PECVD technique and equipment, as shown in FIG. 7 j.
S6, a lead 214 is prepared so that the lead 214 connects the detector unit output terminal and the power amplifier input terminal, and the terahertz antenna 1 is prepared on the detector unit input terminal.
Specifically, the passivation layer 217 is open etched to expose the electrode contact metal, and an interconnect metal is deposited over the first drain electrode 210 and the second gate electrode 212 to form the lead 214. And the terahertz antenna 1 is integrated on the first source electrode 208 and the first gate electrode 209, see fig. 7 k.
The manufacturing process of the high-integration gallium nitride-based terahertz detector array unit is simple, and is compatible with the existing process, and the process cost is low.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
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