CN114079374B - Filter capacitor discharging circuit, converting circuit and operation method for discharging filter capacitor - Google Patents
Filter capacitor discharging circuit, converting circuit and operation method for discharging filter capacitor Download PDFInfo
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- CN114079374B CN114079374B CN202110565104.7A CN202110565104A CN114079374B CN 114079374 B CN114079374 B CN 114079374B CN 202110565104 A CN202110565104 A CN 202110565104A CN 114079374 B CN114079374 B CN 114079374B
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- 239000003990 capacitor Substances 0.000 title claims abstract description 85
- 238000007599 discharging Methods 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims description 16
- 238000001514 detection method Methods 0.000 claims abstract description 43
- 238000002360 preparation method Methods 0.000 claims abstract description 9
- 238000001914 filtration Methods 0.000 claims abstract description 6
- 238000006243 chemical reaction Methods 0.000 claims description 17
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- 238000010586 diagram Methods 0.000 description 16
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- 238000013459 approach Methods 0.000 description 4
- 206010014357 Electric shock Diseases 0.000 description 3
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- 230000008878 coupling Effects 0.000 description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
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- Power Engineering (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
A filter capacitor discharging circuit includes a high voltage terminal, a signal preparing circuit, a low pass filter, a range detector, a timing unit and a switch unit. The signal preparation circuit receives a detection signal corresponding to the alternating voltage from the high voltage terminal and generates a voltage signal according to the detection signal. The low-pass filter provides a filtering signal according to the voltage signal, and the range detector checks whether the voltage distance between the voltage signal and the filtering signal is smaller than a default value. When the voltage distance is smaller than a default value, the timing unit starts timing to generate a timing result, and when the timing result exceeds a preset number of times or preset time, the switch unit is turned on to discharge the filter capacitor through the switch unit.
Description
Technical Field
The present invention relates to a discharging circuit, a converting circuit and a discharging operation method, and more particularly, to a discharging circuit of a filter capacitor for discharging an EMI filter capacitor, a converting circuit and an operation method for discharging a filter capacitor.
Background
Because of the importance of electronic products today to the quality of the input voltage (i.e., ac voltage) received by the conversion circuit, the front end of the conversion circuit typically employs a EMI (Electromagnetic Interference) filter to reduce electromagnetic interference. Among other things, EMI filters typically include a capacitor, commonly referred to as a filter capacitor or X-capacitor, coupled to the input of the conversion circuit. When the plug at the input end of the conversion circuit is removed from the socket to interrupt the input of the alternating voltage, the voltage at the two ends of the filter capacitor is not released, so that the voltage can be kept high continuously. If the high voltage is not consumed by the internal resistance for a long time, the high voltage is still electrified continuously, so that when a user touches a plug of the conversion circuit, the user has the doubt of electric shock, and the safety risk is caused.
How to design a filter capacitor discharging circuit, a converting circuit and an operation method for discharging the filter capacitor, so as to discharge the filter capacitor when the plug of the converting circuit is unplugged to interrupt the input of the alternating voltage, and the working efficiency of the converting circuit is not affected, is a big subject to be studied by the inventor.
Disclosure of Invention
The invention provides a filter capacitor discharging circuit, which comprises a high-voltage end, a low-pass filter, a range detector, a timing unit and a switch unit. The high voltage end is coupled with the filter capacitor of the input end, and the input end receives alternating voltage. The signal preparation circuit is coupled to the high voltage terminal and is used for generating a voltage signal representing an alternating voltage. The low-pass filter provides a filtered signal according to the voltage signal. The range detector compares the voltage signal and the filtered signal to check whether the voltage distance between the voltage signal and the filtered signal is smaller than a default value. When the voltage distance is smaller than the default value, the timing unit starts timing to generate a timing result. When the timing result exceeds the preset times or the preset time, the timing unit enables the switch unit to be conducted, and the filter capacitor is discharged through the switch unit.
The present invention provides a conversion circuit, comprising: the device comprises a filter capacitor, a detection circuit and a filter capacitor discharging circuit. The filter capacitor receives the alternating voltage from the input end, the detection circuit detects the alternating voltage to provide a detection signal, and the filter capacitor discharging circuit receives the detection signal through the high voltage end.
The invention provides an operation method for discharging a filter capacitor. The filter capacitor is coupled to the input end of the conversion circuit to receive the alternating voltage, and the operation method of the invention comprises the following steps: first, a voltage signal representing an ac voltage is provided according to the ac voltage. The voltage signal is then low-pass filtered to produce a filtered signal. Then, it is checked whether the voltage distance between the voltage signal and the filtered signal is smaller than a default value. When the voltage distance is smaller than a default value, starting to time to generate a timing result. Finally, when the timing result exceeds the preset times or the preset time, the filter capacitor discharging circuit discharges the filter capacitor.
The main purpose and effect of the invention is that when the plug of the converting circuit is pulled out to interrupt the input of the alternating voltage, the filter capacitor discharging circuit is used for checking whether the voltage distance between the voltage signal corresponding to the alternating voltage and the filter signal corresponding to the alternating voltage is smaller than a default value to determine whether to turn on the switch unit, so as to achieve the effect of discharging the energy remained in the filter capacitor within the preset time after the input of the alternating voltage is interrupted, so as to meet the safety standard and avoid the risk of electric shock of personnel.
So that the manner in which the above recited features, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the appended drawings, which are illustrated in the appended drawings.
The invention will now be described in more detail with reference to the drawings and specific examples, which are not intended to limit the invention thereto.
Drawings
FIG. 1 is a block diagram of a switching circuit with a filter capacitor discharge circuit according to the present invention;
FIG. 2 is a block diagram of a filter capacitor discharge circuit according to the present invention;
FIG. 3A is a circuit block diagram of a first embodiment of a range detector according to the present invention;
FIG. 3B is a schematic diagram of a first embodiment of a range detector with AC voltage waveforms according to the present invention;
FIG. 3C is a schematic waveform diagram of the first embodiment of the range detector according to the present invention when the AC voltage is removed;
FIG. 4A is a circuit block diagram of a second embodiment of a range detector according to the present invention;
FIG. 4B is a schematic diagram of a second embodiment of a range detector with AC voltage waveforms;
FIG. 4C is a schematic waveform diagram of a second embodiment of the range detector according to the present invention when the AC voltage is removed;
FIG. 5A is a flow chart of a method of discharging a filter capacitor according to the present invention;
FIG. 5B is a flowchart illustrating a first embodiment of a range detection method according to the present invention; and
FIG. 5C is a flowchart illustrating a second embodiment of a range detection method according to the present invention.
Wherein, the reference numerals:
100 … conversion circuit
100-1 … input terminal
C … filter capacitor
10 … detection circuit
D1 … first diode
D2 … second diode
R … resistor
20 … conversion unit
22 … rectifying circuit
Q … power switch
30 … control unit
32 … filter capacitor discharging circuit
32-1 … high voltage end
322 … signal preparation circuit
324 … low pass filter
326. 326' … range detector
3262. 3262' … range generating circuit
AU … addition unit
SU … subtracting unit
3264 … comparison circuit
OP1 … first comparing unit
OP2 … second comparing unit
LG … logic unit
328 … timing unit
330 … switch unit
332 … high-voltage starting NMOS transistor
200 … load
Vac … ac voltage
Vdc … DC voltage
Vo … output voltage
Upper voltage of Vu, vu' …
Lower limit voltage of Vl, vl' …
V1 … first reference Voltage
V2 … second reference Voltage
Ss … detection signal
Sv … Voltage Signal
Sf … filtered signal
Se … enable signal
Sc … control signal
CLK … frequency signal
S1 … first comparison Signal
S2 … second comparison Signal
Distance of X … voltage
t0, t1, t2 … time
(S100) to (S300) … steps
Detailed Description
The technical content and detailed description of the present invention are as follows in conjunction with the drawings:
fig. 1 is a circuit block diagram of a switching circuit with a filter capacitor discharging circuit according to the present invention. The input terminal 100-1 of the conversion circuit 100 receives the ac voltage Vac, and converts the ac voltage Vac into the output voltage Vo to power the load 200. The conversion circuit 100 includes a filter capacitor C, a detection circuit 10, a conversion unit 20, and a control unit 30. The filter capacitor C is coupled to the input terminal 100-1 and filters the AC voltage Vac. The detection circuit 10 detects the ac voltage Vac and provides a detection signal Ss to the control unit 30 according to the ac voltage Vac. The control unit 30 controls the conversion unit 20 to convert the ac voltage Vac into the output voltage Vo, and controls whether the filter capacitor C is discharged or not (indicated by a dotted line) according to the received detection signal Ss.
Further, the control unit 30 includes a filter capacitor discharge circuit 32. The filter capacitor discharging circuit 32 receives the detection signal Ss through the high voltage terminal 32-1, and determines whether to discharge the filter capacitor C according to the detection signal Ss. When the filter capacitor discharging circuit 32 determines that the ac voltage Vac exists according to the detection signal Ss, the filter capacitor discharging circuit 32 does not discharge the filter capacitor C to maintain the stable operation of the converting circuit 100. When the filter capacitor discharging circuit 32 determines that the ac voltage Vac does not exist (e.g., but not limited to, the plug is pulled out) according to the detection signal Ss, the filter capacitor discharging circuit 32 discharges the filter capacitor C to discharge the energy remaining in the filter capacitor C, so as to meet the safety specification and avoid the risk of electric shock of personnel.
Referring to fig. 1 again, the detection circuit 10 includes a first diode D1, a second diode D2 and a resistor R. The first diode D1 and the second diode D2 rectify the ac voltage Vac into the detection signal Ss of the continuous half-string wave, and the resistor R limits the current on the path of the detection circuit 10, so as to avoid the damage of the control unit 30 caused by the excessive current flowing through the high voltage terminal 32-1. It should be noted that, in an embodiment of the present invention, the structure of the detection circuit 10 is not limited, and any detection circuit (e.g. full-bridge rectification structure) capable of rectifying the ac voltage Vac into the continuous or discontinuous half-bridge detection signal Ss is included in the scope of the present invention.
The conversion unit 20 is exemplified by a flyback converter (flyback converter). The conversion unit 20 converts the ac voltage Vac into the dc voltage Vdc through the rectification circuit 22, and the control unit 30 controls switching of the power switch Q (i.e., the main switch of the flyback converter) to convert the dc voltage Vdc into the output voltage Vo. However, in one embodiment of the present invention, the converting unit 20 is not limited to the flyback converter, and any converting device having a dc power converting function is included in the scope of the present invention. In an embodiment of the present invention, the power supply mode of the control unit 30 and the feedback detection and control mode of the control unit 30 to the conversion unit 20 may be known to those skilled in the art, and will not be described herein.
Fig. 2 is a block diagram of a filter capacitor discharge circuit according to the present invention, and fig. 1 is also shown. The filter capacitor discharging circuit 32 includes a high voltage terminal 32-1, a signal preparing circuit 322, a low pass filter 324, a range detector 326, a timing unit 328, a switching unit 330, and a high voltage start up (HV start up) NMOS transistor 332. The main function of the switch unit 330 is to discharge the filter capacitor C, so the coupling position thereof is only required to discharge the filter capacitor C (indicated by the dotted line). In fig. 2, when the switch unit 330 is turned on, the filter capacitor C can be discharged through the high-voltage start NMOS transistor 332 and the detection circuit 10, but the coupling position between the switch unit 330 and the filter capacitor C is not limited thereto. In another embodiment, the switching unit 330 may directly discharge the filter capacitor C.
The signal preparation circuit 322 receives the detection signal Ss through the high voltage terminal 32-1, and generates a voltage signal Sv representing the ac voltage Vac according to the detection signal Ss. The signal preparation circuit 322 is, for example but not limited to, a step-down circuit, and mainly converts the received high voltage detection signal Ss into a voltage signal Sv which can be tolerated by the control unit 30. The signal preparation circuit 322 may be a voltage dividing circuit formed by resistors outside the control unit 30, or may be a voltage dividing or voltage reducing circuit formed by integrated circuit components (including but not limited to resistors, transistors, etc.) inside the control unit 30.
The low-pass filter 324 receives the voltage signal Sv and provides a filtered signal Sf according to the voltage signal Sv. The low-pass filter 324 may be a first-order, second-order or third-order low-pass filter, and the higher the filter, the more ideal the corresponding filtering effect.
The range detector 326 receives the voltage signal Sv and the filter signal Sf, compares the voltage signal Sv with the filter signal Sf, and provides an enable signal Se to the timing unit 328 according to the comparison result. Specifically, the range detector 326 is used to check whether the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than a default value. When the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the default value, the voltage value of the representative voltage signal Sv is close to the voltage value of the filter signal Sf. The reason for this may be that the voltage value of the alternating voltage Vac is rising or falling, or that the plug is removed. When the voltage value of the ac voltage Vac is rising or falling, the time when the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the default value is generally shorter, and when the plug is removed, the time when the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the default value is generally longer. Therefore, whether the plug is removed can be judged by the characteristic to determine whether to discharge the filter capacitor C.
The timing unit 328 receives the enable signal Se and the clock signal CLK, and provides the control signal Sc to the switching unit 330 according to the enable signal Se and the clock signal CLK. When the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the default value (known by the enable signal Se), the timing unit 328 generates the pulse number according to the count of the clock signal CLK, and determines whether to control the switch unit 330 to be turned on according to the pulse number. For example, when the number of pulses is greater than or equal to a predetermined number of times, the representative plug is removed. At this time, the timing unit 328 controls the switch unit 330 to be turned on by the control signal Sc, so that the energy remaining in the filter capacitor C is discharged through the switch unit 330. In another embodiment, the timing unit 328 is triggered by the enable signal Se to gradually increase a ramp signal, and when the ramp signal is higher than a default value, the timing result is determined to be longer than a predetermined time, that is, the plug has been removed, and the switch unit 330 starts to discharge the filter capacitor C.
The predetermined time, the predetermined number of times or the predetermined value may be preset for the filter capacitor discharging circuit 32 and may be adjusted according to actual requirements. In one embodiment, the predetermined time is on the order of hundreds of microseconds (us).
Please refer to fig. 3A, which is a block diagram of a first embodiment of the range detector according to the present invention, in combination with fig. 1-2. The range detector 326 includes a range generation circuit 3262 and a comparison circuit 3264. The range generation circuit 3262 receives the filtered signal Sf, and generates an upper voltage Vu corresponding to an upper limit of the voltage distance and a lower voltage Vl corresponding to a lower limit of the voltage distance according to the filtered signal Sf. The comparing circuit 3264 is for checking whether the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage Vl, and providing an enable signal Se to the timing unit 328 according to the checking result. When the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage Vl, the voltage distance between the representative voltage signal Sv and the filter signal Sf is smaller than a default value (the voltage difference between the upper limit voltage Vu and the lower limit voltage Vl represents the voltage distance).
Specifically, the range generation circuit 3262 includes an addition unit AU and a subtraction unit SU, and the addition unit AU and the subtraction unit SU are coupled between the low pass filter 324 and the comparison circuit 3264. The adding unit AU is used for adding the filtered signal Sf to the first reference voltage V1 to generate the upper limit voltage Vu, and the subtracting unit SU is used for subtracting the second reference voltage V2 from the filtered signal Sf to generate the lower limit voltage Vl. The voltage values of the first reference voltage V1 and the second reference voltage V2 may be the same or different, and in practical application, the voltage distance may be adjusted by adjusting the voltage values of the first reference voltage V1 and the second reference voltage V2.
The comparison circuit 3264 includes a first comparison unit OP1, a second comparison unit OP2, and a logic unit LG. The first comparing unit OP1 compares the upper voltage Vu with the voltage signal Sv to provide a first comparing signal S1. The second comparing unit OP2 compares the lower limit voltage Vl with the voltage signal Sv to provide a second comparing signal S2. The logic unit LG may be an AND gate (AND) for providing the enable signal Se to the timing unit 328 according to the first comparison signal S1 AND the second comparison signal S2.
When the first comparison signal S1 and the second comparison signal S2 are at the first level, the voltage distance between the representative voltage signal Sv and the filter signal Sf is smaller than the default value, and the comparison circuit 3264 uses the enable signal Se to inform the timing unit 328 to perform timing so that the timing unit 328 counts the clock signal CLK. It should be noted that, in one embodiment of the present invention, the first comparing unit OP1 and the second comparing unit OP2 are comparators, but not limited thereto. In other words, a comparing unit (such as, but not limited to, a comparing unit formed by a voltage dividing circuit) that can compare two input signals to generate a comparison result accordingly should be included in the scope of the present embodiment. Furthermore, in one embodiment of the present invention, the logic unit LG is not limited to be configured using only AND gates (AND). For example, a logic unit LG (such as, but not limited to, a NAND gate (NAND)) that can convert the levels of the output signals according to the two input signals converted to the same level should be included in the scope of the present embodiment.
Please refer to fig. 3B, which is a schematic diagram of the waveform of the first embodiment of the range detector with ac voltage, fig. 3C, which is a schematic diagram of the waveform of the first embodiment of the range detector with ac voltage removed, in combination with fig. 1-3A, and repeatedly referring to fig. 3A-3C. The high voltage terminal 32-1 receives the detection signal Ss of the continuous half-wave, and the signal preparation circuit 322 steps down the detection signal Ss to the voltage signal Sv. The low-pass filter 324 filters the voltage signal Sv to generate a filtered signal Sf, and the range generation circuit 3262 generates an upper limit (i.e., an upper limit voltage Vu) corresponding to the voltage distance X according to the filtered signal Sf and the first reference voltage V1, and generates a lower limit (i.e., a lower limit voltage Vl) corresponding to the voltage distance X according to the filtered signal Sf and the second reference voltage V2. In fig. 3B, when the voltage value of the voltage signal Sv is rising or falling, a short period of time falls between the upper limit voltage Vu and the lower limit voltage Vl, so that the voltage distance X between the voltage signal Sv and the filter signal Sf is smaller than the default value. At this time, the logic unit LG informs the timing unit 328 to count the clock signal CLK accordingly. Since the time during which the voltage value of the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage Vl is short in a state in which the voltage value of the voltage signal Sv is rising or falling when the ac voltage Vac is present, the number of pulses counted up by the timer unit 328 is not equal to or greater than a predetermined number of times (or the counted up time is not equal to or greater than a predetermined time). Therefore, in this situation, the control signal Sc provided by the timing unit 328 keeps the switch unit 330 turned off and off, so as not to cause the filter capacitor C to be discharged.
In fig. 3C, at time t1, the plug is removed. At this time, the ac voltage Vac is turned off, so that the voltage signal Sv is maintained at a constant value (the constant value is the energy remaining in the filter capacitor C) that gradually decreases by interrupting the change of the half-wave. At this time, since the half-sine wave variation of the voltage signal Sv is interrupted, the voltage value of the voltage signal Sv filtered by the low-pass filter 324 (i.e. the filtered signal Sf) starts to approach the voltage signal Sv maintained at the constant value. Therefore, the voltage value of the voltage signal Sv is brought between the upper limit voltage Vu and the lower limit voltage Vl (i.e., the range of the upper limit voltage Vu and the lower limit voltage Vl approaches the voltage value of the voltage signal Sv), resulting in the voltage distance X being smaller than the default value. For convenience, the embodiment shows that the voltage signal Sv is exactly between the upper limit voltage Vu and the lower limit voltage Vl when the plug is removed (time t 1). At time t1, the logic unit LG notifies the timing unit 328 to count the clock signal CLK, and the timing unit 328 continuously counts the clock signal CLK because the voltage signal Sv is maintained at a constant value such that the voltage distance X is always smaller than the default value. At time t2, the timing unit 328 determines that the number of pulses is greater than or equal to a predetermined number of times or the time counted by the timing unit 328 is greater than or equal to a predetermined time (i.e., time t1 to time t 2), and the timing unit 328 controls the switch unit 330 to be turned on by the control signal Sc to drain the energy stored in the filter capacitor C.
Please refer to fig. 4A, which is a block diagram illustrating a second embodiment of the range detector according to the present invention, in combination with fig. 1-2. The range detector 326' of FIG. 4A is identical and similar to the range detector 326 of FIG. 3A and will not be described in detail through the previous teachings. The difference between fig. 4A and fig. 3A is that: the filter signal Sf and the voltage signal Sv are just interchanged. Briefly, the range detector 326 in fig. 3A generates the upper voltage Vu and the lower voltage Vl based on the filtered signal Sf, and then checks whether the voltage signal Sv is between the upper voltage Vu and the lower voltage Vl. The range detector 326' in FIG. 4A generates the upper voltage Vu ' and the lower voltage Vl ' based on the voltage signal Sv, and then checks whether the filtered signal Sf is located between the upper voltage Vu ' and the lower voltage Vl '.
The adding unit AU adds the first reference voltage V1 to the voltage signal Sv to generate the upper limit voltage Vu ', and the subtracting unit SU subtracts the second reference voltage V2 from the voltage signal Sv to generate the lower limit voltage Vl'. The first comparing unit OP1 receives the upper limit voltage Vu 'and the filtered signal Sf, and compares the upper limit voltage Vu' and the filtered signal Sf to provide a first comparing signal S1. The second comparing unit OP2 receives the lower voltage Vl 'and the filtered signal Sf, and compares the lower voltage Vl' with the filtered signal Sf to provide a second comparing signal S2. It should be noted that the circuits and control manners not mentioned in fig. 4A are the same as those in fig. 3A, and are not described herein again.
Please refer to fig. 4B, which is a schematic diagram of a waveform of the second embodiment of the range detector according to the present invention with an ac voltage, and fig. 4C, which is a schematic diagram of a waveform of the second embodiment of the range detector according to the present invention with an ac voltage removed, with reference to fig. 1-4A, and with reference to fig. 4A-4C repeatedly. The range generation circuit 3262' generates an upper limit voltage Vu ' corresponding to an upper limit of the voltage distance X (i.e., the first reference voltage V1) and a lower limit voltage Vl ' corresponding to a lower limit of the voltage distance X (i.e., the second reference voltage V2) according to the voltage signal Sv. In fig. 4B, when the voltage value of the filter signal Sf is rising or falling, a short period of time falls between the upper limit voltage Vu 'and the lower limit voltage Vl', so that the voltage distance X between the voltage signal Sv and the filter signal Sf is smaller than the default value. Since the time during which the voltage value of the filter signal Sf falls between the upper limit voltage Vu 'and the lower limit voltage Vl' is short when the ac voltage Vac is present, the number of pulses counted by the timer unit 328 is not equal to or greater than a predetermined number of times (or the counted time is not equal to or greater than a predetermined time). Therefore, in this situation, the control signal Sc provided by the timing unit 328 does not turn on the switching unit 330, so that the energy remaining in the filter capacitor C is discharged.
In fig. 4C, at time t1, the plug is removed. At this time, the ac voltage Vac is turned off, so that the voltage signal Sv is maintained at a constant value (the constant value is the energy remaining in the filter capacitor C) that gradually decreases by interrupting the change of the half-wave. At this time, since the half-sine wave variation of the voltage signal Sv is interrupted, the upper limit voltage Vu 'and the lower limit voltage Vl' generated according to the voltage signal Sv are also maintained at constant values. At this time, the voltage value of the voltage signal Sv filtered by the low-pass filter 324 (i.e., the filtered signal Sf) gradually approaches the voltage signal Sv maintained at the constant value. Therefore, the voltage value of the voltage signal Sv is brought between the upper limit voltage Vu 'and the lower limit voltage Vl' (i.e. the voltage value of the filter signal Sf approaches the range between the upper limit voltage Vu 'and the lower limit voltage Vl'), resulting in the voltage distance X being smaller than the default value. For convenience, the embodiment shows that the filtered signal Sf happens to be between the upper voltage Vu 'and the lower voltage Vl' when the plug is removed (time t 1). It should be noted that waveforms and control manners not mentioned in fig. 4B and 4C are the same as those of fig. 3B and 3C, and are not described herein again.
Please refer to fig. 5A, which is a flowchart illustrating a method for discharging a filter capacitor according to the present invention, and further refer to fig. 1-4C. In the flowchart shown in fig. 5A, the operation method for discharging the filter capacitor C of the input terminal 100-1 of the converting circuit 100 mainly aims at the ac voltage Vac when the ac voltage Vac is powered off, and the operation method includes providing a voltage signal Sv representing the ac voltage Vac according to the ac voltage Vac (S100). The detection circuit 10 detects the ac voltage Vac to obtain a detection signal Ss of the ac voltage Vac, and the signal preparation circuit 322 performs signal processing (voltage reduction) on the detection signal Ss to obtain a voltage signal Sv. Then, the voltage signal Sv is low-pass filtered to generate a filtered signal Sf (S120). The low-pass filter 324 receives the voltage signal Sv and provides a filtered signal Sf according to the voltage signal Sv. Then, it is checked whether the voltage distance between the voltage signal and the filtered signal is less than a predetermined value (S140). The range detector 326 checks whether the voltage distance X between the voltage signal Sv and the filter signal Sf is smaller than a predetermined value, and provides the enable signal Se to the timing unit 328 according to the result. When the voltage distance X between the voltage signal Sv and the filter signal Sf is greater than or equal to the default value, the enable signal Se causes the timing unit 328 to reset (reset) the timing result (S300), and returns to step S140. It should be noted that, in one embodiment of the present invention, the timing result may be reset (reset) at any time point after the voltage distance X is greater than or equal to the default value (as shown in fig. 3C and 4C). For example, but not limited to, any point in time between times tA-tB, tC-tD, t 0-t 1.
When the voltage distance X between the voltage signal Sv and the filter signal Sf is smaller than the default value, the voltage value of the representative voltage signal Sv is close to the voltage value of the filter signal Sf. The reason for this may be that the voltage value of the alternating voltage Vac is rising or falling, or that the plug is removed. At this time, the enable signal Se causes the timing unit 328 to generate the clock number according to the clock signal CLK count, and starts to generate the timing result (S160). Then, it is judged whether the timing result exceeds a predetermined number of times or a predetermined time (S180). When the timing result does not exceed the predetermined number of times or the predetermined time, the voltage value representing the alternating voltage Vac may be rising or falling, and thus returns to step (S140) to check again whether the voltage distance X is less than the default value. When the timing result exceeds the predetermined time (e.g. the number of pulses exceeds the predetermined number of times or the duration of the plurality of pulses exceeds the predetermined time), the plug is removed, and the timing unit 328 controls the switch unit 330 to turn on and turn off by the control signal Sc, so as to discharge the filter capacitor C (S200).
Please refer to fig. 5B, which is a flowchart illustrating a first embodiment of the range detection method of the present invention, and fig. 5C, which is a flowchart illustrating a second embodiment of the range detection method of the present invention, in combination with fig. 1-5A. In FIG. 5B, step (S140) includes steps (S200), (S220) and S (240). The adding unit AU adds the filtered signal Sf to the first reference voltage V1 to generate an upper limit voltage Vu, and the subtracting unit SU subtracts the filtered signal Sf from the second reference voltage V2 to generate a lower limit voltage Vl (S200). The first comparing unit OP1 compares the upper limit voltage Vu with the voltage signal Sv to provide a first comparing signal S1, and the second comparing unit OP2 compares the lower limit voltage Vl with the voltage signal Sv to provide a second comparing signal S2 (S220). The logic unit LG receives the first comparison signal S1 and the second comparison signal S2, checks whether the voltage signal Sv falls between the upper voltage Vu and the lower voltage Vl, and provides an enable signal Se for timing according to the checking result (S240). When the first comparison signal S1 and the second comparison signal S2 are at the first level, the voltage distance between the representative voltage signal Sv and the filter signal Sf is smaller than the default value, and the enable signal Se is used to inform the timing unit 328 to perform timing so that the timing unit 328 counts the clock signal CLK.
In FIG. 5C, step (S140) includes steps (S300), (S320) and (S340). The adding unit AU adds the voltage signal Sv to the first reference voltage V1 to generate an upper limit voltage Vu ', and the subtracting unit SU subtracts the voltage signal Sv from the second reference voltage V2 to generate a lower limit voltage Vl' (S300). The first comparing unit OP1 compares the upper voltage Vu 'with the filtered signal Sf to provide a first comparing signal S1, and the second comparing unit OP2 compares the lower voltage Vl' with the filtered signal Sf to provide a second comparing signal S2 (S320). Step (S340) is the same or similar to step (S240) of fig. 5B, and will be understood from the previous teachings and will not be repeated.
The detailed description and drawings of the embodiments are not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
Of course, the present invention is capable of other various embodiments and its several details are capable of modification and variation in light of the present invention by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (15)
1. A filter capacitor discharge circuit coupled to a detection circuit, comprising:
the high-voltage end is coupled with a filter capacitor of an input end, and the input end receives an alternating voltage;
a signal preparation circuit coupled to the high voltage terminal for generating a voltage signal representing the AC voltage;
a low-pass filter for providing a filtering signal according to the voltage signal;
a range detector for comparing the voltage signal with the filtered signal to check whether a voltage distance between the voltage signal and the filtered signal is smaller than a predetermined value;
a timing unit for starting timing and generating a timing result when the voltage distance is smaller than the default value;
when the timing result exceeds a preset time, the timing unit enables the switching unit to be conducted, and the filter capacitor is discharged through the switching unit; and
When the switch unit is turned on, the filter capacitor is discharged through the high-voltage start NMOS transistor and the detection circuit.
2. The filter capacitor discharge circuit of claim 1, wherein the range detector comprises:
a range generation circuit for generating an upper limit voltage and a lower limit voltage according to the filtered signal; and
A comparison circuit for checking whether the voltage signal falls between the upper limit voltage and the lower limit voltage and providing an enable signal to the timing unit according to the checking result.
3. The filter capacitor discharge circuit of claim 2, wherein the range generation circuit comprises:
an adding unit for adding a first reference voltage to the filtered signal to generate the upper limit voltage; and
A subtracting unit for subtracting a second reference voltage from the filtered signal to generate the lower limit voltage.
4. The filter capacitor discharge circuit of claim 2, wherein the comparison circuit comprises:
a first comparing unit for comparing the upper limit voltage with the voltage signal to provide a first comparing signal;
a second comparing unit for comparing the lower limit voltage with the voltage signal to provide a second comparison signal; and
A logic unit for providing the enable signal according to the first comparison signal and the second comparison signal.
5. The filter capacitor discharge circuit of claim 1, wherein the range detector comprises:
a range generation circuit for generating an upper limit voltage and a lower limit voltage according to the voltage signal; and
A comparison circuit for checking whether the filtered signal falls between the upper limit voltage and the lower limit voltage and providing an enable signal to the timing unit according to the checking result.
6. The filter capacitor discharge circuit of claim 5, wherein the range generation circuit comprises:
an adding unit for adding a first reference voltage to the voltage signal to generate the upper limit voltage; and
A subtracting unit for subtracting a second reference voltage from the voltage signal to generate the lower limit voltage.
7. The filter capacitor discharge circuit of claim 5, wherein the comparison circuit comprises:
a first comparing unit for comparing the upper limit voltage with the filtered signal to provide a first comparison signal;
a second comparing unit for comparing the lower limit voltage with the filtered signal to provide a second comparison signal; and
A logic unit for providing the enable signal representing the inspection result according to the first comparison signal and the second comparison signal.
8. The filter capacitor discharging circuit of claim 1, wherein said timing unit generates a pulse number according to a count of a frequency signal, and when said pulse number is greater than or equal to a predetermined number of times, said timing unit determines that said timing result exceeds said predetermined time, and turns on said switching unit.
9. A conversion circuit, comprising:
a filter capacitor for receiving an ac voltage from an input terminal; and
A detection circuit for detecting the AC voltage to provide a detection signal;
the filter capacitor discharge circuit of claim 1;
wherein the detection circuit detects the AC voltage to provide a detection signal, and the filter capacitor discharging circuit receives the detection signal by the high voltage terminal.
10. An operating method for discharging a filter capacitor, wherein the filter capacitor is coupled to an input terminal to receive an ac voltage, the operating method comprising the steps of:
providing a voltage signal representing the alternating voltage according to the alternating voltage;
low-pass filtering the voltage signal to generate a filtered signal;
checking whether a voltage distance between the voltage signal and the filtering signal is smaller than a default value;
when the voltage distance is smaller than the default value, starting timing to generate a timing result; and
And discharging the filter capacitor when the timing result exceeds a preset time.
11. The method of operation of claim 10, further comprising:
generating an upper limit voltage and a lower limit voltage according to the filtered signal; and
Checking whether the voltage signal falls between the upper limit voltage and the lower limit voltage, and providing an enable signal for starting timing according to the checking result.
12. The method of operation of claim 11, further comprising:
adding a first reference voltage to the filtered signal to generate the upper limit voltage, and subtracting a second reference voltage from the filtered signal to generate the lower limit voltage;
comparing the upper limit voltage with the voltage signal to provide a first comparison signal, and comparing the lower limit voltage with the voltage signal to provide a second comparison signal; and
The enable signal is provided according to the first comparison signal and the second comparison signal.
13. The method of operation of claim 10, further comprising:
generating an upper limit voltage and a lower limit voltage according to the voltage signal;
checking whether the filter signal falls between the upper limit voltage and the lower limit voltage, and providing an enable signal for timing according to the checking result.
14. The method of operation of claim 13, further comprising:
adding a first reference voltage to the voltage signal to generate the upper limit voltage, and subtracting a second reference voltage from the voltage signal to generate the lower limit voltage;
comparing the upper limit voltage with the filter signal to provide a first comparison signal, and comparing the lower limit voltage with the filter signal to provide a second comparison signal; and
The enable signal is provided according to the first comparison signal and the second comparison signal.
15. The method of claim 10, wherein the step of timing the result to exceed the predetermined time comprises:
generating a pulse number according to a frequency signal count, and discharging the filter capacitor when the pulse number is greater than or equal to a predetermined number.
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