CN101908200B - Drawing processing system and method with power gating function - Google Patents
Drawing processing system and method with power gating function Download PDFInfo
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Abstract
The invention provides a drawing processing system with a power gating function and a power gating method. The power gating method is suitable for a graphics processing unit, wherein the graphics processing unit is provided with a unified shader unit, and the unified shader unit comprises a plurality of shaders. The power supply gating method comprises the following steps: drawing a plurality of front pictures; calculating the number of first operation shaders for drawing each front picture and a corresponding picture speed; determining a second number of operating shaders for drawing a next frame after the front frames according to the first number of operating shaders of each front frame and the corresponding frame speed; and starting the corresponding shaders through one or more power gating elements according to the number of the second operation shaders. A graphics processing unit with improved power gating functions can achieve the purpose of saving power consumption according to the requirements of various graphics applications.
Description
Technical field
The invention relates to draws handles, and particularly relevant for graphics processing system with power gating function and power gating method, according to the variation of picture speed, comes the tinter quantity of the required running of performance prediction.
Background technology
Generally speaking; The drawing application program comprises the graphic plotting of complicated and high details, and for example: three-dimensional (3D) draws, and in order to meet ever-increasing in this respect at present demand; Set graphics processing unit (graphics processing unit in PC or mancarried device; GPU) be used to handle a large amount of calculating, in order to show various items, also therefore very power consumption.Further, for making battery-powered mancarried device, similarly be mobile phone, because power consumption is the problem of a particular importance, thereby the power consumption that graphics processing unit produced in the minimizing mobile phone is necessary.
In electronic component, the source of general power consumption mainly comprises: supply voltage and dynamic power consumption and because the static power consumption that the electric leakage consume is caused that frequency of operation produced.Along with the development of semiconductor process techniques, the caused static power consumption of electric leakage consume has become subject matter.Technology with below 65 nanometers (65nm) is example, and the power consumption above 40% results to leak electricity consumes.
Known; Such as clock pulse lock control (clock-gating) technology or dynamic electric voltage frequency modulating (dynamic voltage and frequency scaling; DVFS) technology is to be Power Cutback mode commonly used, and both effect ground reduces dynamic power consumption; But be helpless to reduce the electric leakage consume, or help limited.In addition, other known way, power gating (power-gating) technology for example on whole graphics processing unit,, but lacks flexibility the power gating arrangements of components to the control of supplying power of whole graphics processing unit through the power gating element.Perhaps, with the power gating arrangements of components in each element of inside.When an element when idle, close the power supply of feed element through the power gating element of correspondence, and then reduce simultaneously dynamically and static power consumption.Yet this power gating mechanism needs additional control circuit, is used for opening or closing the power supply of supplying with each element, therefore still has power consumption.In addition, when carrying out power gating function, need the extra time (overhead) recover to supply with the power supply of each element, make the known consuming time and inefficiency of power gating mechanism.
Therefore, need a kind of graphics processing unit, have improved power gating function, be able to reach the purpose of saving power consumption according to the demand of various drawing application programs.
Summary of the invention
Embodiments of the invention provide a kind of graphics processing system with power gating function, comprise a graphics processing unit and a driver.Said graphics processing unit comprises an integration tinter unit and one or more power gating element.Said integration tinter unit comprises a plurality of tinters.Said these tinters are in order to draw a plurality of preceding pictures.Said one or more power gating element is coupled to said these tinters, in order to according to the said second running tinter quantity, starts corresponding tinter.Said driver is coupled to said graphics processing unit; Calculate one first a running tinter quantity and a corresponding picture speed of drawing each preceding picture; And, draw one second running tinter quantity of said these preceding pictures next picture afterwards in order to decision according to the said first running tinter quantity of picture before each and the said picture speed of correspondence.
On the other hand, embodiments of the invention provide a kind of graphics processing system with power gating function, comprise a graphics processing unit and a driver.Said graphics processing unit comprises an integration tinter unit and one or more power gating element.Said integration tinter unit comprises a plurality of tinters.Said these tinters are in order to draw a plurality of preceding pictures.Said one or more power gating element is coupled to said these tinters, in order to according to the said second running tinter quantity, starts corresponding tinter.Said driver is coupled to said graphics processing unit; Calculate one first a running tinter quantity and a corresponding picture speed of drawing each preceding picture; And, draw one second running tinter quantity of said these preceding pictures next picture afterwards in order to decision according to the said first running tinter quantity of picture before each and the said picture speed of correspondence.
Said method of the present invention comes the tinter quantity of the required running of performance prediction according to the variation of picture speed, and the demand according to various drawing application programs reaches the purpose of saving power consumption in addition.
Description of drawings
Fig. 1 is the power gating method synoptic diagram that shows according to graphics processing system of the present invention.
Fig. 2 is a graphics processing unit calcspar that shows according to the embodiment of the invention.
Fig. 3 is the graphics processing system with power gating function that shows according to the embodiment of the invention.
Fig. 4 is a power gating method flow diagram that shows according to the embodiment of the invention.
Fig. 5 is a graphics processing unit calcspar that shows according to another embodiment of the present invention.
Fig. 6 is a graphics processing unit calcspar that shows according to another embodiment of the present invention.
Drawing reference numeral:
302～graphics processing unit;
304～driver;
308～moderator;
310～command processor;
312～application program interface;
314,316～application program;
The corresponding I/O of 318～storer;
320～integration tinter unit;
320A, 320B, 320C, 320D～tinter;
328A, 328B, 328C, 328D～power gating element;
Vdd～voltage source; And
Ck～clock pulse.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, hereinafter is special lifts embodiment, and cooperates appended accompanying drawing, specifies as follows.
Fig. 1 is the power gating method synoptic diagram that shows according to graphics processing system of the present invention.
In the embodiment of Fig. 1, be to add the power gating control circuit in the graphics processing unit 102, cause said graphics processing unit 102 to have power gating function.Further, draw pictures (frame) before in said graphics processing unit 102, in advance through the required picture speed of the said picture of a driver 104 decisions (frame rate per second, FPS), in order to represent the drawing amount of said picture.Therefore; Said driver 104 is according to the drawing amount of said picture; The electric power starting of controlling correlation function element in the said graphics processing unit 102 with close; Using is not influencing the user and (for example: the fluency that picture appeared) under the prerequisite, improve the overall power consumption of said graphics processing unit 102 is drawing usefulness.
Specifically, in an embodiment, when said graphics processing unit 102 was accomplished the drafting operation of a picture, said driver 104 calculated the pairing picture speed of said picture, in order to determine the required picture speed of next picture (shown in arrow 106).Then; Before said graphics processing unit 102 carries out the drafting operation of said next picture; Said driver 104 is controlled said graphics processing unit 102 just according to the picture speed of next picture, for example: set the electric power starting of correlation function element and close (shown in arrow 108).
In other embodiment, a plurality of preceding pairing picture speeds of picture more capable of using determine the picture speed that next picture is required.
Fig. 2 is a graphics processing unit 202 calcspars that show according to the embodiment of the invention.
With reference to figure 2, said graphics processing unit 202 has an integration tinter unit 220 (unified shader unit), and said integration tinter unit 220 is a multi-processor, can in single clock pulse, handle a plurality of instructions.Said integration tinter unit 220 comprises a plurality of tinters (shader processors or shader cores), like 220A, 220B, 220C etc.Each tinter can be VLIW collection (the very long instruction word of a kind of vector (vector) and scale (scalar) framework or a kind of most values (multiple scalar); VLIW) framework, and corresponding working storage archives and instruction memory cache are arranged.Moreover each tinter is carried out various coloration program, is responsible for carrying out the operation of vertex coloring (vertex shader) and pixel painted (pixel shader), in order to draw each picture.In addition, said graphics processing unit 202 more comprises: how much stages of fixed function (fixed-function geometry stages) 204, fixed function fragment stage (fixed-function fragment stages) 206, one moderator 208 and a command processor 210.
Particularly, how much stages 204 of said fixed function comprise a clipper (clipper) 212, a pel assembled unit (primitive assembly) 214 and a string stream receiver (streamer) 216.In this pipeline stage, said crossfire receiver 216 receives the vertex data of a 3D object, and is sent to tinter.Afterwards, said these tinters 220A, 220B, 220C carry out the vertex data character that relevant coloring process decides said 3D object, in order to convert said 3D object to be shown on the screen picture.Then, said pel assembled unit 214 is carried out geometrical combination, in order to the set of vertices composite polygon, similarly is triangle.Triangle beyond the said clipper 212 elimination viewing areas.
Further, the said fixed function fragment stage 206 comprises that a triangle sets up unit 222, a fragment generation unit 224, a hierarchy type advanced treatment unit 226, one degree of depth/template (Z/stencil) test cell 228, an interpolation unit 230 and a delineation unit 232.In this pipeline stage, said triangle is set up 222 execution planes, unit and is eliminated (face-culling), the triangle that removal can't show, and calculate leg-of-mutton side equation preface.Said fragment generation unit 224 provides leg-of-mutton fragment systematic function, in order to calculate the pixel (pixel) that desire shows.Said hierarchy type advanced treatment unit 226 optionally was disposed in the said fixed function fragment stage 206, in order to giving up the fragment beyond triangle or the vision area, and can once give up the entire segment block.The said degree of depth/template test unit 228 is utilized depth buffer and stencil, judges and gives up the fragment of being hidden.The triangle attribute that said interpolation unit 230 will carry out after the perspective correction carries out interpolation, in order to produce the attribute of fragment.Subsequently, carry out pixel by said delineation unit 232 again and describe operation.In an embodiment, the said degree of depth/template test unit 228 is also configurable after said delineation unit 232.
In operation, said command processor 210 is in order to receiving various drawing commands, and monitoring and set the power supply status of said these tinters.Said moderator 208 carries out Thread scheduling (thread scheduling) according to various drawing commands, and drawing command is dispensed to each tinter, in order to carry out 3D drawing computing.Because a large amount of drawing computings is responsible in said integration tinter unit 220, therefore become the bottleneck of whole graphics processing unit 202 power consumptions.Further; Because the drawing amount difference that each picture is required; Therefore can come to the control of supplying power of each tinter, for example by power gating: but respectively the power gating element of tinter 220A, 220B, 220C is carried out the action of conducting or cut-out.Thus, can effectively reduce the dynamic power consumption or the electric leakage consume of said graphics processing unit 202, make the overall power consumption of said graphics processing unit significantly reduce, and do not influence the execution usefulness of application program.
Fig. 3 is the graphics processing system calcspar with power gating function that shows according to the embodiment of the invention.
With reference to figure 3, said graphics processing system comprises a graphics processing unit 302 and a driver 304.In embodiment shown in Figure 3, said graphics processing unit 302 comprises an integration tinter unit 320, and it has 4 tinter 320A, 320B, 320C and 320D, in order to draw a plurality of pictures.Be similar to integration tinter unit 220 shown in Figure 2, said integration tinter unit 320 is a multi-processor, can in single clock pulse Ck, handle a plurality of instructions.Further, said graphics processing unit 302 comprises 4 power gating element 328A, 328B, 328C and 328D, is respectively coupled to each tinter.Said these power gating elements are according to control signal 330A, 330B, 330C and the 330D of correspondence, in order to start or to close the tinter of correspondence.Said driver 304 is coupled to said graphics processing unit 302; From an application program interface (application programming interface; API) 312 receive and carry out various application programs; For example: one first application program 314, one second application program 316 etc., draw in order to drive said graphics processing unit 302 accordingly.The power gating method of said graphics processing system will cooperate the 3rd and 4 figure to specify as follows.
Fig. 4 is a power gating method 40 process flow diagrams that show according to the embodiment of the invention.
As stated, draw a set picture Frame at said graphics processing unit 302
N+1Before, said driver 304 can use a kind of based on historical (history-based) account form, with previous rendered frame Frame
n, Frame
N-1..., Frame
N-m+1Picture speed FPS
n, FPS
N-1..., FPS
N-m+1And the tinter quantity S that is operated
n, S
N-1..., S
N-m+1Be the basis, draw said set picture Frame in order to predict said graphics processing unit 302
N+1The tinter quantity S that Shi Suoxu starts
N+1Wherein, m representes the preceding number of pictures in order to prediction.Then,,, make the computing more efficiently of said graphics processing unit 302, and improve the overall power consumption of said graphics processing system in order to open or to close the power supply of corresponding tinter through said these power gating elements.
Further, said driver 304 is that request according to each application program drives said graphics processing unit 302 and carries out various mapping operations.Therefore, said driver 304 also can be judged the beginning and the end of pattern drafting through the request of application program, in order to carry out the operation of power gating.For example, said first application program 314 can comprise an instruction SwapBuffer, and in order to the end of expression pattern drafting, and application program 316 can comprise an instruction ClearBuffer, in order to the end of expression pattern drafting.The term of execution of above-mentioned instruction, carry out the power gating operation, just can not have influence on the usefulness of drawing.
With reference to the 3rd and 4 figure; When said driver 304 when said application program interface 312 receives said first application program 314; Said driver 304 produces the corresponding command package, is sent to a command processor 310 (step S402) of said graphics processing unit 302 through the corresponding I/O of storer (memory-mapped I/O) 318.
In response to the execution of said instruction SwapBuffer, that is represent said set picture Frame
N+1Previous picture Frame
nComplete, said driver 304 calculates said these preceding picture Frame immediately
n, Frame
N-1..., Frame
N-m+1The tinter quantity S that is operated
n, S
N-1..., S
N-m+1And corresponding picture speed FPS
n, FPS
N-1..., FPS
N-m+1(step S404).
By way of example, when m=5, represent that said driver 304 calculates said set picture Frame
N+1Preceding 5 rendered frame Frame
n, Frame
N-1..., Frame
N-4The tinter quantity S that is operated
n, S
N-1..., S
N-4And corresponding picture speed FPS
n, FPS
N-1..., FPS
N-4
In addition, driver 304 is according to these preceding picture Frame
n, Frame
N-1..., Frame
N-m+1Running tinter quantity S
n, S
N-1..., S
N-m+1And corresponding picture speed FPS
n, FPS
N-1..., FPS
N-m+1, draw said set picture Frame in order to decision
N+1The tinter quantity S of required running
N+1(step S406).
More specifically, said driver 304 can be drawn said set picture Frame according to the following formula decision
N+1Required tinter quantity S
N+1:
Wherein, m is quantity, the S of said these preceding pictures
n, S
N-1..., S
N-m+1For drawing said these preceding picture Frame
n, Frame
N-1..., Frame
N-m+1The tinter quantity, the FPS that are operated
n, FPS
N-1..., FPS
N-m+1Be said these preceding picture Frame
n, Frame
N-1..., Frame
N-m+1Pairing picture speed, Target_FPS are a controlled variable and n>=m for a target picture speed, the α according to the adjustment of demonstration demand.
Afterwards, when said driver 304 when said application program interface 312 receives said second application program 316 (step S408), in response to the execution of said instruction ClearBuffer, that is expression begins to carry out said set picture Frame
N+1Drafting operation, said driver 304 is according to said set picture Frame
N+1The tinter quantity S of required running
N+1And the power supply status of present each tinter 320A, 320B, 320C and 320D; Produce a corresponding order package; In order to the electric power starting that disposes said these tinters 320A, 320B, 320C and 320D and close, and said corresponding order package is sent to said command processor 310 (step S410).In an embodiment, suppose said set picture Frame
N+1A picture Frame before
nEmployed tinter quantity S
nGreater than drawing said set picture Frame
N+1The tinter quantity S of required running
N+1, then close the power supply supply of idle (inactive) tinter accordingly.Otherwise, then open the power supply supply that needs running (active) tinter accordingly.
Next; In response to said order package; Said command processor 310 produces in order to conducting or cuts off control signal 330A, 330B, 330C and the 330D of each power gating element 328A, 328B, 328C and 328D; Use the electric power starting of setting said these tinters 320A, 320B, 320C and 320D or close, and notify a moderator 308 (step S412).
Afterwards, said moderator 308 can carry out drawing command and distribute according to the tinter that has started, carries out said set picture Frame
N+1Drafting operation (step S414), for example: the mode of can the segment formula drawing (tile-based rendering) is drawn said set picture Frame
N+1
In an embodiment, each power gating element comprises a transistor.As shown in Figure 3, each power gating element comprises a nmos pass transistor, be coupled between a voltage source V dd and each tinter, and its gate receives the control signal that said command processor 310 is sent.Whether therefore, each transistor is switched on or cuts off according to the control signal of correspondence, said voltage source V dd is provided to each tinter in order to decision.
Further, in operation, each tinter 320A, 320B, 320C and 320D can dispose a texture cell (texture unit) separately, perhaps share one or more texture cell.Therefore, each tinter 320A, 320B, 320C and 320D can receive data texturing from texture cell through texture access path 332,334,336 and 338 separately.In in the case, also can flexibly adjust the distribution of power gating element according to the configuration of texture cell.Thus, can significantly promote the efficient of power management.Above-mentioned power gating mechanism will cooperate Fig. 5 and Fig. 6 to specify as follows.
Fig. 5 is a graphics processing unit 502 calcspars that show according to another embodiment of the present invention.
With reference to figure 5, said graphics processing unit 502 comprises an integration tinter unit 520, regional shared storage 512 and 514, texture cell 508 and 510, universe shared storage 516 and Thread processing unit 518.
In this embodiment, said integration tinter unit 520 has a plurality of tinters.Said these tinters comprise 2 tinters gather together (cluster) 504 and 506, use said regional shared storage 502 and 514 to draw separately.In addition, tinter is gathered together and 504 and 506 is coupled to 2 texture cells 508 and 510 separately, and said universe shared storage 516 is shared by texture cell 508 and 510.Particularly, each tinter is gathered together and is comprised 8 tinters separately.Said Thread processing unit 518 comprises 2 Thread sequencers 522 and 524, in order to carry out the distribution of Thread.
In in the case, 504 and 506 each self-configuring one power gating element but each tinter is gathered together.Thus, the conducting of each power gating element or cut-out are with starting or closing corresponding tinter and gather together.In addition, the control of supplying power of regional shared storage under also can be simultaneously gathering together and texture cell to each tinter.Not only reduce the cost of power gating control circuit, also can save the power consumption that tinter periphery related elements is caused.
Fig. 6 is a graphics processing unit 602 calcspars that show according to another embodiment of the present invention.
With reference to figure 6, said graphics processing unit 602 comprises an integration tinter unit 620, how much control modules 604, a tinter control module 606 and texture cells 608.
In this embodiment, said integration tinter unit 620 has a plurality of tinters.Said these tinters comprise 2 multiple painted processing units (shader multi-processor) 610 and 612, and said 2 multiple painted processing units 610 and 612 form a tinter and gather together, and use said texture cell 608 to draw jointly.Said how much control modules 604 and said tinter control module 606 are in order to receive data and to distribute drawing work.In Fig. 6; Each multiple painted processing unit comprises 8 tinter SP, I and C memory cache (cache), multiple Thread release unit MT (multi-thread issue), 2 special function unit SFU (Special Function Unit) and shared storage MEM, in order to the computing of drawing.Under this framework, multiple painted processing unit 610 and 612 is shared said texture cells 608, therefore, can these 2 multiple painted processing units 610 and 612 be regarded as a power management unit, by the control of supplying power of same power gating element.When said power gating element cut off, whole tinter was gathered together, that is multiple painted processing unit 610 and 612, and said texture cell 608 will be closed together.Reduce unnecessary power gating element and power consumption further.
Therefore, through graphics processing system of the present invention and power gating method thereof, when drawing, can be according to the picture speed variation relation of each picture, dynamically control needs the tinter quantity of running, thereby reduces unnecessary power consumption.
Method of the present invention, or specific kenel or its part can exist with the kenel of procedure code.Procedure code can be contained in tangible media; Like floppy disk, CD, hard disk or any other machine-readable (getting) Storage Media like computer-readable; Also or be not limited to the computer program product of external form, wherein, when procedure code by machine; When being written into and carrying out like computer, this machine becomes in order to participate in device of the present invention.Procedure code also can pass through some transfer mediums, transmit like electric wire or cable, optical fiber or any transmission kenel, wherein, when procedure code by machine, as computer receive, when being written into and carrying out, this machine becomes in order to participate in device of the present invention.When the general service processing unit is done in fact, procedure code combines processing unit to provide a class of operation to be similar to the unique apparatus of using particular logic circuit.
Though the present invention discloses as above with preferred embodiment; Right its is not in order to limit the present invention; Anyly have the knack of those skilled in the art; Do not breaking away from the spirit and scope of the present invention, when can doing various changes and retouching, so protection scope of the present invention defines and is as the criterion when looking the claim scope.
Claims (14)
1. a power gating method is applicable to a graphics processing unit, it is characterized in that, said graphics processing unit has an integration tinter unit, and said integration tinter unit comprises a plurality of tinters, and said power gating method comprises:
Draw a plurality of preceding pictures;
Calculate one first a running tinter quantity and a corresponding picture speed of drawing each preceding picture;
According to the said first running tinter quantity and the corresponding said picture speed of picture before each, in order to one second running tinter quantity of the next picture after the said preceding picture of decision drafting; And
Start said tinter through one or more power gating element corresponding to the said second running tinter quantity;
Wherein, the said second running tinter quantity is to produce according to following formula:
Wherein, S
N+1For the said second running tinter quantity, the m that draws said next picture be said before quantity, the S of picture
n, S
N-1..., S
N-m+1For drawing the said first running tinter quantity, the FPS of picture before each
n, FPS
N-1..., FPS
N-m+1For the pairing said picture speed of picture before each, Target_FPS are that a target picture speed, α are a controlled variable and n>=m.
2. power gating method as claimed in claim 1 is characterized in that, said method more comprises:
Utilize the tinter that has started, in order to draw said next picture.
3. power gating method as claimed in claim 1 is characterized in that, said method more comprises:
Carry out one first application program; And
In response to the execution of said first application program, calculate the said first running tinter quantity and the corresponding said picture speed of each preceding picture, wherein, said first application program finishes corresponding to one of picture before each.
4. power gating method as claimed in claim 1 is characterized in that, determines the step of the said second running tinter quantity to comprise:
Before the said second running tinter quantity of decision, obtain a power supply status of each tinter.
5. power gating method as claimed in claim 4 is characterized in that, the step that starts said tinter comprises:
Carry out one second application program; And
In response to the execution of said second application program, according to the said power supply status of said second running tinter quantity and each tinter, produce an order package, in order to controlling said one or more power gating element,
Wherein, said second application program one initial corresponding to said next picture.
6. power gating method as claimed in claim 5 is characterized in that, said method more comprises:
In response to said order package, produce one or more control signal,
Wherein, each power gating element is control signal conducting or the cut-out by a correspondence.
7. power gating method as claimed in claim 6; It is characterized in that; Each power gating element comprises a transistor, is coupled between a voltage source and at least one tinter, and whether provide in order to the control signal decision according to said correspondence provides said voltage source to said at least one tinter.
8. the graphics processing system with power gating function is characterized in that, said system comprises:
One graphics processing unit comprises an integration tinter unit and one or more power gating element, and wherein, said integration tinter unit comprises a plurality of tinters, and in order to draw a plurality of preceding pictures, said one or more power gating element is coupled to said tinter; And
One driver; Be coupled to said graphics processing unit; Calculate one first a running tinter quantity and a corresponding picture speed of drawing each preceding picture; And, operate tinter quantity in order to one second of the next picture after the said preceding picture of decision drafting according to the said first running tinter quantity of picture before each and the said picture speed of correspondence;
Wherein said graphics processing unit starts the said tinter corresponding to the said second running tinter quantity through said one or more power gating element;
Wherein, the said second running tinter quantity is to produce according to following formula:
Wherein, S
N+1For the said second running tinter quantity, the m that draws said next picture be said before quantity, the S of picture
n, S
N-1..., S
N-m+1For drawing the said first running tinter quantity, the FPS of picture before each
n, FPS
N-1..., FPS
N-m+1For the pairing said picture speed of picture before each, Target_FPS are that a target picture speed, α are a controlled variable and n>=m.
9. graphics processing system as claimed in claim 8 is characterized in that, the tinter that said graphics processing unit utilization has started is in order to draw said next picture.
10. graphics processing system as claimed in claim 8; It is characterized in that; When one first application program was carried out, in response to the execution of said first application program, said driver calculated the said first running tinter quantity and the corresponding said picture speed of each preceding picture; And wherein, said first application program finishes corresponding to one of picture before each.
11. graphics processing system as claimed in claim 8 is characterized in that, said driver is obtained a power supply status of each tinter before the said second running tinter quantity of decision.
12. graphics processing system as claimed in claim 11 is characterized in that, when one second application program is carried out; Execution in response to said second application program; Said driver produces an order package, in order to control said one or more power gating element according to the said power supply status of the said second running tinter quantity and each tinter; And wherein, said second application program one initial corresponding to said next picture.
13. graphics processing system as claimed in claim 12 is characterized in that, said graphics processing unit comprises:
One command processor is coupled to said driver, produces one or more control signal, in order in response to said order package,
Wherein, each power gating element is control signal conducting or the cut-out by a correspondence.
14. graphics processing system as claimed in claim 13; It is characterized in that; Whether each power gating element comprises a transistor, is coupled between a voltage source and at least one tinter, said voltage source is provided to said at least one tinter in order to the control signal decision according to said correspondence.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101072349A (en) * | 2006-06-08 | 2007-11-14 | 威盛电子股份有限公司 | Decoding system and method for content adaptive variable length coding |
| CN101216932A (en) * | 2008-01-03 | 2008-07-09 | 威盛电子股份有限公司 | Graphics processing apparatus, unit and method for performing triangle configuration and attribute configuration |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101072349A (en) * | 2006-06-08 | 2007-11-14 | 威盛电子股份有限公司 | Decoding system and method for content adaptive variable length coding |
| CN101216932A (en) * | 2008-01-03 | 2008-07-09 | 威盛电子股份有限公司 | Graphics processing apparatus, unit and method for performing triangle configuration and attribute configuration |
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