CN108258001A - Imaging sensor and its manufacturing method - Google Patents

Abstract

This disclosure relates to imaging sensor and its manufacturing method.One of embodiment provides a kind of imaging sensor, including：Substrate, is formed with photodiode in the substrate, and the photodiode is made of the first semi-conducting material；And extend to the deep trench isolation portion in the substrate from a main surface of the substrate, the deep trench isolation portion is arranged in around the photodiode, and including at least insulating materials and the second semi-conducting material, each photodiode is isolated in wherein described insulating materials, and the band gap of second semi-conducting material is different from the band gap of first semi-conducting material.

Description

Image sensor and manufacturing method thereof

technical field

The present disclosure relates to the field of semiconductors, and in particular, to an image sensor and a method of manufacturing the same.

Background technique

In existing image sensors, there is a problem of dark current, which will affect the performance of the image sensor.

There is therefore a need to reduce dark current.

Contents of the invention

An object of the present disclosure is to provide a novel image sensor and a manufacturing method thereof. In particular, one object of the present disclosure relates to reducing the dark current of an image sensor.

According to a first aspect of the present disclosure, there is provided an image sensor including: a substrate in which a photodiode is formed, the photodiode is composed of a first semiconductor material; one major surface extends into a deep trench isolation in the substrate, the deep trench isolation is disposed around the photodiode and includes at least an insulating material and a second semiconductor material, wherein the insulating material isolates each A photodiode, the bandgap of the second semiconductor material is different from the bandgap of the first semiconductor material.

According to a second aspect of the present disclosure, there is provided a method for manufacturing an image sensor, comprising: forming deep trenches by etching a substrate from one main surface of the substrate, wherein the substrate A photodiode has been formed in the photodiode, the photodiode is composed of a first semiconductor material, the deep trench is located around the photodiode; the deep trench is filled to form a deep trench isolation, the deep trench isolation The portion includes at least an insulating material and a second semiconductor material, wherein the insulating material isolates the respective photodiodes, the second semiconductor material having a bandgap different from the bandgap of the first semiconductor material.

Other features and advantages of the present invention will become more apparent through the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings.

Description of drawings

The accompanying drawings, which constitute a part of this specification, illustrate the embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

The present disclosure can be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

FIG. 1 shows a cross-sectional view of an image sensor according to an exemplary embodiment of the present disclosure.

FIG. 2 shows a flowchart of a method of manufacturing an image sensor according to an exemplary embodiment of the present disclosure.

3A-3G respectively show cross-sectional schematic views of devices at various steps of a method example of manufacturing an image sensor according to an exemplary embodiment of the present disclosure.

Note that in the embodiments described below, the same reference numerals may be used in common between different drawings to denote the same parts or parts having the same functions, and repeated descriptions thereof will be omitted. In this specification, similar reference numerals and letters are used to refer to similar items, therefore, once an item is defined in one figure, it does not require further discussion in subsequent figures.

In order to facilitate understanding, the position, size, range, etc. of each structure shown in the drawings and the like may not represent the actual position, size, range, and the like. Therefore, the disclosed invention is not limited to the positions, dimensions, ranges, etc. disclosed in the drawings and the like.

Detailed ways

Various exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that relative arrangements of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and in no way intended as any limitation of the disclosure, its application or uses. That is, the image sensors and methods of fabrication thereof herein are shown by way of example to illustrate various embodiments of the structures and methods of the present disclosure. However, those skilled in the art will appreciate that they illustrate only exemplary, rather than exhaustive, ways in which the invention may be practiced. Furthermore, the figures are not necessarily to scale and some features may be exaggerated to show details of particular components.

Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods and devices should be considered part of the Authorized Specification.

In all examples shown and discussed herein, any specific values should be construed as exemplary only, and not as limitations. Therefore, other examples of the exemplary embodiment may have different values.

The inventors of the present application have found through research that, in existing image sensors, part of the dark current is caused by light of undesired wavelengths (eg, infrared light and ultraviolet light) entering the photodiode. And even with color filters, some infrared and ultraviolet light still enters the photodiode, causing dark current.

In this regard, after in-depth research, the inventors of the present application have proposed a novel image sensor structure, which forms a semiconductor with a different bandgap from the photodiode material in a Deep Trench Isolation (DTI) structure. A material that absorbs undesired sensed light (eg, infrared and/or ultraviolet light), thereby reducing the dark current it may cause. Therefore, dark current can be reduced using the techniques of this disclosure.

Herein, the term "band gap" refers to the energy band gap between the conduction and valence bands of a semiconductor material. Those skilled in the art understand that the bandgap of a semiconductor material is related to the energy (ie, wavelength) of the absorbed light.

In order to understand the present invention more comprehensively and clearly, the novel technology according to the present disclosure will be described below in conjunction with the accompanying drawings.

FIG. 1 shows a cross-sectional view of an image sensor according to an exemplary embodiment of the present disclosure. It should be noted that the actual image sensor may have other components produced before/after, but in order to avoid obscuring the gist of the present disclosure, the drawings do not show and this paper does not discuss other components. This article focuses on the DTI structure.

As shown in FIG. 1 , the image sensor includes a substrate 101 in which a photodiode PD 102 is formed. PD 102 is composed of a first semiconductor material. In some cases, the substrate 101 may be a simple semiconductor wafer, such as a silicon wafer, and the PD 102 is formed by doping the substrate 101 to form a suitable N-type region and/or a P-type region. When , the first semiconductor material is the material of the substrate 101 . However, the present invention does not limit the structure of the PD 102, and in order to avoid obscuring the gist of the present disclosure, the specific structure of the PD 102 is omitted in the figure. In addition, although the substrate 101 is drawn as a simple bulk substrate for the purpose of simplicity in the figure, it is obvious that the present invention is not limited thereto. The substrate 101 can be made of any semiconductor material suitable for image sensors (such as Si, SiC, SiGe, etc.), for example, it can be a single crystal silicon substrate. In some implementation manners, the substrate 101 may also be various composite substrates such as silicon-on-insulator (SOI), silicon-germanium-on-insulator, and the like. Those skilled in the art understand that the substrate 101 is not subject to any limitation, but can be selected according to practical applications. Other semiconductor device components may also be formed in and under the substrate 101 , for example, other components formed in early/subsequent processing steps, and the like. Moreover, the present invention does not limit the type of image sensor, for example, both front-illuminated (FSI) and back-illuminated (BSI) are applicable.

In addition, as shown in FIG. 1 , the image sensor further includes a deep trench isolation portion 103 extending from one main surface of the substrate 101 into the substrate. Deep trench isolation 103 is arranged around PD 102 . Those skilled in the art understand that, for a CMOS image sensor, usually several transistors (for example, 4 transistors) are formed between the PD 102 and the deep trench isolation portion 103, which together with the PD 102 form a pixel unit, and The deep trench isolation part 103 realizes isolation between each pixel unit. However, for the sake of simplicity, the transistors in the pixel unit are not shown in the figure, and the deep trench isolation part 103 can also be regarded as isolating each PD 102 .

In addition, for the sake of simplicity, only three PDs and two deep trench isolation parts therebetween are shown in the figure, but those skilled in the art understand that the present invention is not limited thereto. Typically, an image sensor may include a huge number of pixel elements and deep trench isolations for isolation therebetween. In addition, those skilled in the art can understand that the present invention is not limited to the shape of the deep groove shown in FIG. 1 .

The deep trench isolation portion 103 includes at least an insulating material 105 and a second semiconductor material 104, wherein the insulating material 105 isolates each PD 102, and the band gap of the second semiconductor material 104 is different from that of the first semiconductor material of the PD 102, for Light of a wavelength different from the light to be detected by the PD 102 is absorbed.

In some embodiments, the bandgap of the second semiconductor material 104 is smaller than the bandgap of the first semiconductor material such that the second semiconductor material 104 absorbs infrared light. For example, the second semiconductor material includes SiGe or TiO ₂ or the like.

In other embodiments, the bandgap of the second semiconductor material 104 is greater than that of the first semiconductor material, so that the second semiconductor material 104 can absorb ultraviolet light. For example, the second semiconductor material includes III-V compound semiconductors such as GaN or GaAs, and the like.

Although not shown in FIG. 1, in some cases, the deep trench isolation 103 not only includes the insulating material 105 and the second semiconductor material 104, but is between the second semiconductor material 104 and the insulating material 105 and/or between the second semiconductor material 104 and the insulating material 105. Other material layers may be included between the second semiconductor material 104 and the substrate 101 .

For example, in some embodiments, the deep trench isolation portion 103 may further include a third semiconductor material, wherein the band gap of one of the second semiconductor material and the third semiconductor material is larger than that of the first semiconductor material so as to absorb ultraviolet rays. light, while the other has a bandgap smaller than that of the first semiconductor material so as to absorb infrared light. Preferably, in some embodiments, the deep trench isolation portion 103 may further include a liner layer and a high dielectric constant material layer, wherein the liner layer, the high dielectric constant material layer, the second semiconductor material, the third semiconductor material and the insulating material are sequentially stacked. That is, the liner layer, the high dielectric constant material layer, the second semiconductor material, the third semiconductor material and the Insulation Materials. The liner layer may include oxide, such as silicon oxide, to repair the surface damage of the deep trench (usually caused by etching the deep trench) and facilitate the formation of subsequent layers. The high dielectric constant material layer may include HfO or AlO, etc., to improve the photocurrent of the photodiode.

In some embodiments, the second semiconductor material or the third semiconductor material in the deep trench isolation 103 may also extend onto the main surface of the substrate 101 , ie onto the PD 102 . Preferably, the bandgap of the semiconductor material on PD 102 is larger than the bandgap of the first semiconductor material. If the bandgap of the semiconductor material is smaller than the bandgap of the first semiconductor material, light that should be sensed by PD 102 (eg, visible light) may be absorbed, thereby affecting the performance of PD 102 .

In some embodiments, for example, in the case of some back-illuminated image sensors, the main surface of the substrate 101 is the backside of the substrate 101 , that is, the deep trench isolation portion 103 is formed from the backside of the substrate. Compared with the case of forming the deep trench isolation 103 from the front side of the substrate, this can avoid causing too much damage to the front side of the substrate to affect the performance of the PD or other transistors. Individual PDs can typically be isolated with shallow trench isolation (STI) sections on the front side of the substrate.

Herein, the "main surface" of a substrate means two main surfaces of the substrate (for example, a silicon wafer) perpendicular to the thickness direction. The "front side" of a substrate refers to that major surface on which transistors and metal interconnect layers are formed, while the "back side" of a substrate is the major surface opposite the front side.

FIG. 2 shows a flowchart of an image sensor manufacturing method 200 according to an exemplary embodiment of the present disclosure. The content described above in conjunction with FIG. 1 may also be applicable to corresponding features, which may not be described in detail below.

Specifically, as shown in FIG. 2, at step 210, a deep trench is formed by etching the substrate from one main surface of the substrate, wherein a photodiode has been formed in the substrate, so The photodiode is formed from a first semiconductor material, and the deep trench is located around the photodiode.

In some embodiments, the major surface of the substrate is the backside of the substrate.

At step 220, the deep trench is filled to form a deep trench isolation portion, the deep trench isolation portion includes at least an insulating material and a second semiconductor material, wherein the insulating material isolates each photodiode, the second The bandgap of the semiconductor material is different from the bandgap of the first semiconductor material.

In some embodiments, the step of forming the deep trench isolation includes: conformally depositing a layer of the second semiconductor material; depositing the insulating material on the second semiconductor material so as to fill the deep trench and removing the second semiconductor material and the insulating material on the major surface of the substrate.

In some embodiments, the step of forming the deep trench isolation includes: conformally depositing a layer of the second semiconductor material; depositing the insulating material on the second semiconductor material so as to fill the deep trench and removing said insulating material on said major surface of said substrate while leaving said second semiconductor material on said major surface, wherein said second semiconductor material has a bandgap greater than said first The band gap of a semiconductor material.

In some embodiments, the bandgap of the second semiconductor material is smaller than the bandgap of the first semiconductor material, so that the second semiconductor material can absorb infrared light. For example, the second semiconductor material includes SiGe or TiO ₂ .

In some embodiments, the band gap of the second semiconductor material is larger than that of the first semiconductor material, so that the second semiconductor material can absorb ultraviolet light. For example, the second semiconductor material includes a III-V compound semiconductor like GaN or GaAs.

In some embodiments, the deep trench isolation further includes a third semiconductor material, wherein one of the second semiconductor material and the third semiconductor material has a bandgap greater than the bandgap of the first semiconductor material One so as to absorb ultraviolet light, and the other has a band gap smaller than that of the first semiconductor material so as to absorb infrared light.

In some embodiments, the step of forming the deep trench isolation further includes: before depositing the insulating material, conformally depositing a layer of a third semiconductor material on the second semiconductor material, wherein the second semiconductor material material and the third semiconductor material have a band gap larger than the band gap of the first semiconductor material so as to absorb ultraviolet light, while the other has a band gap smaller than the band gap of the first semiconductor material so as to absorb infrared light. Preferably, said third semiconductor material on said main surface of said substrate is removed in case said third semiconductor material has a bandgap smaller than said first semiconductor material.

In some embodiments, the step of forming the deep trench isolation part further includes: before depositing the second semiconductor material, sequentially forming a liner layer and a high dielectric constant material layer on the entire wall of the deep trench.

In order to fully understand the present invention, a specific example of an image sensor manufacturing method according to an exemplary embodiment of the present disclosure will be described in detail below by taking FIGS. 3A-3G as an example. This example is particularly applicable to back-illuminated CMOS image sensors, which form deep trench isolation structures on the backside of the thinned substrate. Note that this example is not intended to limit the invention. For example, the present invention is not limited to the specific structures of the image sensors shown in FIGS. 3A-3G , but is applicable to all image sensors with the same requirements or design considerations. The content described above in conjunction with FIGS. 1-2 is also applicable to the corresponding features.

3A-3G respectively show cross-sectional schematic views of the device at each step of the method example.

In FIG. 3A, the photodiode PD 102 has been generally formed in the substrate 101 from the front side of the substrate 101 through ion implantation and other treatments, and various treatments on the front side of the substrate have been completed, and the back side of the substrate has been thinned. . Thus, PD 102 is composed of the first semiconductor material contained in substrate 101 . Then, the substrate 101 is etched from the back side of the substrate 101 , thereby forming a deep trench 106 around the PD 102 . The deep trenches can be etched by various conventional means. As mentioned above, the structures of the substrate 101 and the PD 102 are not subject to any limitation, but can be selected according to practical applications.

In FIG. 3B , a liner layer 107 is formed as a buffer layer on all exposed surfaces of the substrate 101 (including the entire wall of the deep trench 106 ) by thermal oxidation or deposition process, etc. Referring to FIG. The liner layer 107 may include silicon oxide, etc., and is used to repair the damage caused by the etching process in the previous step, and avoid the mismatch between the substrate and the subsequently deposited materials.

At FIG. 3C , a high dielectric constant (High-K) material layer 108 is conformally deposited on the liner layer 107 by chemical vapor deposition (CVD) or the like. The high dielectric constant material layer 108 may include HfO or AlO, etc., to improve the photocurrent of the photodiode.

At FIG. 3D , a layer of second semiconductor material 104 is conformally deposited on the high dielectric constant material layer 108 , the second semiconductor material 104 having a bandgap greater than that of the first semiconductor material so as to absorb ultraviolet light. The second semiconductor material 104 may include a group III-V compound semiconductor like GaN or GaAs, or the like.

At FIG. 3E , a layer of third semiconductor material 109 is conformally deposited on second semiconductor material 104 , wherein the third semiconductor material 109 has a bandgap smaller than that of the first semiconductor material so as to absorb infrared light. For example, the third semiconductor material 109 may include SiGe or TiO ₂ or the like.

Then, at FIG. 3F , an insulating material 105 (such as silicon oxide, silicon nitride, etc.) is deposited on the third semiconductor material 109 to fill up the deep trench 106 .

Then, at FIG. 3G, the insulating material 105 and the third semiconductor material 109 on the back side of the substrate 101 are removed by using, for example, chemical mechanical polishing (CMP) or etch back (etch back) processing, while remaining on the back side The second semiconductor material 104 , the high dielectric constant material layer 108 and the liner layer 107 . Remaining the second semiconductor material 104 on the back side can absorb more ultraviolet light, thereby further reducing dark current. However, removing the third semiconductor material 109 on the back side can avoid its absorption of visible light and avoid affecting the performance of the PD.

Alternatively, the second semiconductor material 104 , the high dielectric constant material layer 108 and/or the liner layer 107 located on the back side may be further removed as required.

As shown in FIG. 3G , the deep trench isolation part 103 is finally filled and formed in the deep trench 106 , which includes a liner layer 107 , a high dielectric constant material layer 108 , a second semiconductor material 104 , The third semiconductor material 109 and the insulating material 105 . Certainly, those skilled in the art understand that, for the present invention, the liner layer 107 and the high dielectric constant material layer 108 are not necessary, but can be formed as required. For the second semiconductor material 104 and the third semiconductor material 109 , one or both of them can be formed as required, or more layers of other semiconductor materials with different band gaps can be formed.

In the specification and claims, the words "front", "rear", "top", "bottom", "above", "under", etc., if present, are used for descriptive purposes and not necessarily to describe a constant relative position. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the disclosure described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein. Orientation operation.

As used herein, the word "exemplary" means "serving as an example, instance, or illustration" rather than as a "model" to be exactly reproduced. Any implementation described illustratively herein is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, the disclosure is not to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or detailed description.

As used herein, the word "substantially" is meant to include any minor variations due to defects in design or manufacturing, device or component tolerances, environmental influences, and/or other factors. The word "substantially" also allows for differences from a perfect or ideal situation due to parasitic effects, noise, and other practical considerations that may exist in an actual implementation.

In addition, "first", "second", and similar terms may also be used herein for reference purposes only, and thus are not intended to be limiting. For example, the words "first," "second," and other such numerical terms referring to structures or elements do not imply a sequence or order unless clearly indicated by the context.

It should also be understood that when the word "comprises/comprises" is used herein, it indicates the presence of indicated features, integers, steps, operations, units and/or components, but does not exclude the presence or addition of one or more other features, whole, steps, operations, units and/or components and/or combinations thereof.

In this disclosure, the term "provide" is used broadly to cover all ways of obtaining an object, thus "provide something" includes, but is not limited to, "purchase", "preparation/manufacture", "arrangement/setup", "installation/ Assembly", and/or "Order" objects, etc.

The above description may refer to elements or nodes or features being "connected" or "coupled" together. As used herein, unless expressly stated otherwise, "connected" means that one element/node/feature is directly connected (or electrically, mechanically, logically, or otherwise) to another element/node/feature. direct communication). Similarly, unless expressly stated otherwise, "coupled" means that one element/node/feature can be directly or indirectly connected to another element/node/feature mechanically, electrically, logically or otherwise to allow interactions even though the two features may not be directly connected. That is, "coupled" is intended to encompass both direct and indirect couplings of elements or other features, including connections utilizing one or more intervening elements.

Those skilled in the art will appreciate that the boundaries between the above-described operations are merely illustrative. Multiple operations may be combined into a single operation, a single operation may be distributed among additional operations, and operations may be performed with at least partial overlap in time. Also, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in other various embodiments. However, other modifications, changes and substitutions are also possible. Accordingly, the specification and drawings are to be regarded as illustrative rather than restrictive.

In addition, implementations of the present disclosure may also include the following examples:

1. An image sensor, characterized in that it comprises:

a substrate in which is formed a photodiode comprised of a first semiconductor material; and

A deep trench isolation extending from one major surface of the substrate into the substrate, the deep trench isolation being arranged around the photodiode and comprising at least an insulating material and a second semiconductor material, wherein The insulating material isolates each photodiode, and the bandgap of the second semiconductor material is different from the bandgap of the first semiconductor material.

2. The image sensor according to 1, wherein the bandgap of the second semiconductor material is smaller than that of the first semiconductor material, so that the second semiconductor material can absorb infrared light.

3. The image sensor according to 1, wherein the band gap of the second semiconductor material is larger than that of the first semiconductor material, so that the second semiconductor material can absorb ultraviolet light.

4. The image sensor according to 1, wherein the deep trench isolation part further comprises a third semiconductor material, wherein one of the second semiconductor material and the third semiconductor material has a bandgap larger than the The first semiconductor material has a band gap so that it can absorb ultraviolet light, and the other has a band gap smaller than that of the first semiconductor material so that it can absorb infrared light.

5. The image sensor according to 2 or 4, wherein the second semiconductor material includes SiGe or TiO2.

6. The image sensor according to 3 or 4, wherein the second semiconductor material includes III-V compound semiconductors.

7. The image sensor according to 3 or 4, wherein the second semiconductor material includes GaN or GaAs.

8. The image sensor according to 1, further comprising a second semiconductor material or a third semiconductor material on the main surface of the substrate, wherein the second semiconductor material and the third The band gaps of the semiconductor materials are larger than the band gap of the first semiconductor material.

9. The image sensor according to 4, wherein the deep trench isolation part further includes a liner layer and a high dielectric constant material layer, wherein the liner layer, the high dielectric constant material layer, The second semiconductor material, the third semiconductor material and the insulating material are stacked in sequence.

10. The image sensor according to 1, wherein the main surface of the substrate is a back surface of the substrate.

11. A method for manufacturing an image sensor, comprising:

A deep trench is formed by etching the substrate from one major surface of the substrate, wherein the substrate has formed therein a photodiode, the photodiode is composed of a first semiconductor material, the deep trench located around the photodiode;

filling the deep trenches to form deep trench isolations, the deep trench isolations comprising at least an insulating material and a second semiconductor material, wherein the insulating material isolates each photodiode, a bandgap of the second semiconductor material Different from the bandgap of the first semiconductor material.

12. The method according to 11, wherein the step of forming the deep trench isolation comprises:

conformally depositing a layer of said second semiconductor material;

depositing the insulating material on the second semiconductor material so as to fill the deep trench; and

The second semiconductor material and the insulating material on the major surface of the substrate are removed.

13. The method according to 11, wherein the step of forming the deep trench isolation comprises:

conformally depositing a layer of said second semiconductor material;

depositing the insulating material on the second semiconductor material so as to fill the deep trench; and

removing the insulating material on the major surface of the substrate while leaving the second semiconductor material on the major surface, wherein the second semiconductor material has a larger bandgap than the first semiconductor The band gap of the material.

14. The method according to any one of 11-12, characterized in that the band gap of the second semiconductor material is smaller than the band gap of the first semiconductor material, so that the second semiconductor material can absorb infrared light.

15. The method according to any one of 11-13, characterized in that the band gap of the second semiconductor material is larger than the band gap of the first semiconductor material, so that the second semiconductor material can absorb ultraviolet light.

16. The method of 11, wherein the deep trench isolation further comprises a third semiconductor material, wherein one of the second semiconductor material and the third semiconductor material has a bandgap greater than the The band gap of the first semiconductor material is such that it can absorb ultraviolet light, and the band gap of the other semiconductor material is smaller than that of the first semiconductor material so that it can absorb infrared light.

17. The method according to any one of 12-13, wherein the step of forming the deep trench isolation further comprises:

A layer of a third semiconductor material is conformally deposited on the second semiconductor material prior to depositing the insulating material, wherein one of the second semiconductor material and the third semiconductor material has a bandgap greater than the The band gap of the first semiconductor material is such that it can absorb ultraviolet light, and the band gap of the other semiconductor material is smaller than that of the first semiconductor material so that it can absorb infrared light.

18. The method according to 17, wherein the step of forming the deep trench isolation further comprises:

In case the bandgap of the third semiconductor material is smaller than the bandgap of the first semiconductor material, the third semiconductor material on the main surface of the substrate is removed.

19. The method according to 14, wherein the second semiconductor material comprises SiGe or TiO2.

20. The method according to 15, wherein the second semiconductor material comprises a III-V compound semiconductor.

21. The method according to 15, wherein the second semiconductor material comprises GaN or GaAs.

22. The method according to any one of 12-13, wherein the step of forming the deep trench isolation further comprises:

Before depositing the second semiconductor material, a liner layer and a high dielectric constant material layer are sequentially formed on the entire wall of the deep trench.

23. The method according to 11, wherein the major surface of the substrate is the backside of the substrate.

Although some specific embodiments of the present disclosure have been described in detail through examples, those skilled in the art should understand that the above examples are for illustration only, rather than limiting the scope of the present disclosure. The various embodiments disclosed herein can be combined arbitrarily without departing from the spirit and scope of the present disclosure. Those skilled in the art will also appreciate that various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims (10)

1. An image sensor, characterized in that, comprising: a substrate in which is formed a photodiode comprised of a first semiconductor material; and A deep trench isolation extending from one major surface of the substrate into the substrate, the deep trench isolation being arranged around the photodiode and comprising at least an insulating material and a second semiconductor material, wherein The insulating material isolates each photodiode, and the bandgap of the second semiconductor material is different from the bandgap of the first semiconductor material. 2. The image sensor according to claim 1, wherein the bandgap of the second semiconductor material is smaller than that of the first semiconductor material, so that the second semiconductor material can absorb infrared light. 3 . The image sensor according to claim 1 , wherein the bandgap of the second semiconductor material is larger than that of the first semiconductor material, so that the second semiconductor material can absorb ultraviolet light. 4. The image sensor according to claim 1, wherein the deep trench isolation portion further comprises a third semiconductor material, wherein a bandgap of one of the second semiconductor material and the third semiconductor material is One is larger than the band gap of the first semiconductor material so as to absorb ultraviolet light, and the other has a band gap smaller than the band gap of the first semiconductor material so as to absorb infrared light. 5. The image sensor according to claim 2 or 4, wherein the second semiconductor material comprises SiGe or _TiO2 . 6. The image sensor according to claim 3 or 4, wherein the second semiconductor material comprises a III-V compound semiconductor. 7. The image sensor according to claim 3 or 4, wherein the second semiconductor material comprises GaN or GaAs. 8. The image sensor according to claim 1, further comprising a second semiconductor material or a third semiconductor material on the main surface of the substrate, wherein the second semiconductor material and the The bandgaps of the third semiconductor materials are all larger than the bandgaps of the first semiconductor material. 9. The image sensor according to claim 4, wherein the deep trench isolation part further comprises a liner layer and a high dielectric constant material layer, wherein the liner layer, the high dielectric constant material layer, the second semiconductor material, the third semiconductor material and the insulating material are stacked in sequence. 10. The image sensor according to claim 1, wherein the main surface of the substrate is a back surface of the substrate.