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CN108109972B - Semiconductor packaging structure with pin side wall tin climbing function and manufacturing process thereof - Google Patents

Semiconductor packaging structure with pin side wall tin climbing function and manufacturing process thereof Download PDF

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CN108109972B
CN108109972B CN201711467437.6A CN201711467437A CN108109972B CN 108109972 B CN108109972 B CN 108109972B CN 201711467437 A CN201711467437 A CN 201711467437A CN 108109972 B CN108109972 B CN 108109972B
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pin
base island
metal
side wall
arc
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CN108109972A (en
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王亚琴
梁志忠
刘恺
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

本发明涉及一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,所述结构包括基岛和引脚,所述引脚包括平面部分和侧壁部分,所述侧壁部分位于平面部分外侧,所述平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,所述基岛正面设置有芯片,所述芯片通过金属焊线与引脚形成电性连接,所述基岛、引脚以及芯片外围区域包封有塑封料,所述平面部分、弧形部分和侧壁部分的外表面暴露于塑封料之外。本发明在焊接PCB时,焊锡可以沿竖直侧壁爬升到较高的高度,从而增加焊锡与引脚的结合面积,同时可以使引脚处的空气沿外凸弧形排出,从而提高产品的焊接性能、焊接的可靠性以及直观检验焊接状态。

Figure 201711467437

The present invention relates to a semiconductor packaging structure with the function of tin climbing on the sidewall of a lead and a manufacturing process thereof. The structure includes a base island and a lead, the lead includes a plane part and a sidewall part, and the sidewall part is located in On the outside of the plane part, the plane part and the side wall part are connected by a smooth transition through an arc-shaped part, the convex surface of the arc-shaped part faces the outer lower side, the front side of the base island is provided with a chip, and the chip is connected by a metal bonding wire The base island, the pin and the peripheral area of the chip are encapsulated with plastic encapsulation compound, and the outer surfaces of the flat portion, the arc portion and the side wall portion are exposed to the outside of the encapsulated compound. When soldering the PCB, the solder can climb to a higher height along the vertical sidewall, thereby increasing the bonding area between the solder and the pin, and at the same time, the air at the pin can be discharged along the convex arc, thereby improving the product quality. Welding performance, welding reliability and visual inspection of welding status.

Figure 201711467437

Description

具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺Semiconductor package structure with pin sidewall creeping tin function and its manufacturing process

技术领域technical field

本发明涉及一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,属于半导体封装技术领域。The invention relates to a semiconductor packaging structure with the function of tin climbing on the sidewall of a pin and a manufacturing process thereof, belonging to the technical field of semiconductor packaging.

背景技术Background technique

随着现代科技的发展,半导体封装得到了广泛应用。它在雷达、遥控遥测、航空航天等的大量应用对其可靠性提出了越来越高的要求。而因半导体焊接不良造成的失效也越来越引起了人们的重视,因为这种失效往往是致命的,不可逆的。因此,在半导体行业得到一个好的焊接可靠性是非常重要的,半导体焊接面的锡层可以使得焊接更加牢固,特别是汽车电子。With the development of modern technology, semiconductor packaging has been widely used. It is widely used in radar, remote control telemetry, aerospace, etc., which puts forward higher and higher requirements for its reliability. And the failure caused by poor semiconductor welding has attracted more and more attention, because this kind of failure is often fatal and irreversible. Therefore, it is very important to obtain a good soldering reliability in the semiconductor industry. The tin layer of the semiconductor soldering surface can make the soldering more solid, especially for automotive electronics.

众所周知,QFN(Quad Flat No-lead Package,四侧无引脚扁平封装)和DFN (DuadFlat No-lead Package,双侧无引脚扁平封装)为无引脚封装,其中央位置有一个大面积裸露的焊盘,具有导热作用,在大焊盘的封装外围有实现电气连接的导电焊盘。通常导热焊盘与导电焊盘一起贴装在电路板上,但在现有技术中存在了塑封体切割后金属引脚的侧面因无锡层界面,导致PCB板上的锡膏无法爬上塑封体侧面的金属区域。而造成金属引脚侧面虚焊或是冷焊的问题是无法在外观上清楚的检视出来的,尤其是应用在汽车电子中的一级安全与二级安全上,所以塑封体的侧面金属引脚的爬锡尤为重要。As we all know, QFN (Quad Flat No-lead Package) and DFN (Duad Flat No-lead Package) are leadless packages with a large exposed area in the center. The pads have thermal conductivity, and there are conductive pads for electrical connection on the periphery of the package of the large pads. Usually, the thermally conductive pads and the conductive pads are mounted on the circuit board together, but in the prior art, the side of the metal pins after the plastic package is cut has no tin layer interface, so that the solder paste on the PCB board cannot climb the plastic package. Metal areas on the sides. However, the problem of virtual welding or cold welding on the side of the metal pins cannot be clearly inspected in appearance, especially in the first-level and second-level safety applications in automotive electronics, so the side metal pins of the plastic body The climbing tin is particularly important.

为解决这个问题,业内常规做法对引线框引脚背面外端进行切割(参见图1A),形成阶梯状的台阶,后续再进行切割作业(参见图1B),这样就可以得到在引脚侧面具有台阶的封装结构(参见图1C),从而提高其焊接PCB时的可靠性。In order to solve this problem, it is a common practice in the industry to cut the outer end of the back of the lead frame lead (see Figure 1A) to form a stepped step, and then perform the subsequent cutting operation (see Figure 1B), so that the side of the lead can be obtained. Stepped package structure (see Figure 1C), thereby improving its reliability when soldering to the PCB.

但是此种引脚具有台阶的封装结构底部的裸露焊盘和导电焊盘与PCB上的热焊盘进行焊接时,如图1D中A处所示,引脚台阶处容易残留有空气无法排出,造成焊锡结合性不好。特别是在产品工作时,残留在台阶内处的空气会因为产品受热产生空气膨胀,而形成了PCB焊盘与塑封体引脚间的锡层开裂,导致集成电路的电性功能接触不良,严重时还会直接造成电性功能停止工作。However, when the exposed pads and conductive pads at the bottom of the package structure with stepped pins are welded to the thermal pads on the PCB, as shown at A in Figure 1D, air is likely to remain at the pin steps and cannot be discharged. Causes poor solder bonding. Especially when the product is working, the air remaining in the step will expand due to the heating of the product, which will cause the cracking of the tin layer between the PCB pad and the pins of the plastic package, resulting in poor electrical function of the integrated circuit. It will also directly cause the electrical function to stop working.

另外,此种引脚具有台阶的封装结构的制造过程中,需要先对引线框引脚背面外端进行切割,后续再对完成封装的引线框正面进行切割作业,其需要进行两次切割作业,其会导致切割效率降低,也容易加速切割刀具的耗损,增加了制造成本。In addition, in the manufacturing process of the package structure with stepped pins, it is necessary to cut the outer ends of the backside of the lead frame pins first, and then to cut the front side of the packaged lead frame, which requires two cutting operations. It will reduce the cutting efficiency, and also easily accelerate the wear and tear of the cutting tool, which increases the manufacturing cost.

业内还有另外的做法是对引线框引脚背面外端半蚀刻,形成水滴状的凹槽(参见图1E),由于蚀刻特性,通过此种方法形成的凹槽会是内凹的圆弧,此种结构的引脚凹槽处同样容易残留有空气无法排出(参见图1F),造成焊锡结合性不好。Another practice in the industry is to half-etch the outer ends of the backside of the lead frame pins to form drop-shaped grooves (see Figure 1E). Due to the etching characteristics, the grooves formed by this method will be concave arcs. The pin groove of this structure is also prone to residual air that cannot be discharged (see Figure 1F), resulting in poor solder bonding.

另外业内还有一种具有L形外引脚(见图1G)或J形外引脚(见图1H)封装结构,其利用传统的外引脚封装的引线框架进行装片、打线、包封作业,在冲切制程前其具有一定长度的外引脚(见图1I),在冲切制程时需要将成型模具伸入外引脚与塑封体之间,并将外引脚朝塑封体侧面进行弯折而制得L形外引脚或C形的外引脚,此种L形外引脚或C形外引脚封装,会因为其外引脚具有相当的高度,所以在该封装结构贴装在PCB板时,会使焊锡沿外引脚因毛细现象爬升到一定的高度,使其焊接PCB时具有较高的焊接强度。In addition, there is a package structure with an L-shaped outer lead (see Figure 1G) or a J-shaped outer lead (see Figure 1H) in the industry, which uses the lead frame of the traditional outer lead package for chip mounting, wire bonding, and encapsulation. Before the punching process, it has a certain length of outer pins (see Figure 1I). During the punching process, the molding die needs to be inserted between the outer pins and the plastic body, and the outer pins should face the side of the plastic body. Bending to make L-shaped outer pins or C-shaped outer pins, this kind of L-shaped outer pins or C-shaped outer pins package, because the outer pins have a considerable height, so in the package structure When mounted on the PCB board, the solder will climb to a certain height along the outer pins due to capillary phenomenon, so that it has a higher welding strength when welding the PCB.

然而此种通过切筋成型形成L形外引脚或C形外引脚的封装结构,在形成L形外引脚或C形外引脚时,亦然也存在以下缺陷:首先、在进行外引脚成型时外引脚朝塑封体侧面进行弯折,图1G和图1H中A处的内引脚会因金属的反弹作用力的影响下,致使金属引脚有由塑封体向下向外拨开的应力,而在此作用力向下的情况下,容易造成A处内引脚上表面与塑封料下表面之间产生分层现象。严重的情况下甚至会导致A处焊线与内引脚之间形成断路,从而导致产品的失效;其次,该种L形外引脚或C形外引脚封装结构在进行外引脚成型时,外引脚朝塑封体侧面进行弯折是将成型模具伸入外引脚与塑封体之间再进行折弯成型,由于金属引脚具有一定的弹性系数,会导致外引脚受到应力会回弹的关系,致使外引脚形成如图1J中的B处那样形成较大的喇叭形开口,而很难形成如图1G中垂直贴紧塑封体侧面的形状;最后,该种L形外引脚或C形外引脚封装结构具有较大的体积,由于是将外引脚折弯形成L形外引脚或C形外引脚封装结构,其相较于传统的内引脚封装来看,具有较宽的封装体宽度,不利于小型化封装体的发展趋势。However, this kind of package structure that forms L-shaped outer pins or C-shaped outer pins by cutting ribs also has the following defects when forming L-shaped outer pins or C-shaped outer pins. When the lead is formed, the outer lead is bent towards the side of the plastic body. The inner lead at A in Figure 1G and Figure 1H will be affected by the rebound force of the metal, causing the metal lead to move downward and outward from the plastic body. When the force is downward, it is easy to cause delamination between the upper surface of the inner pin at A and the lower surface of the plastic compound. In severe cases, it will even lead to an open circuit between the bonding wire at A and the inner pin, resulting in product failure. , Bending the outer pin towards the side of the plastic package is to extend the molding die between the outer pin and the plastic package and then bend it. Because the metal pin has a certain elastic coefficient, the outer pin will be stressed and will return. The relationship between the spring and the spring makes the outer pin form a larger trumpet-shaped opening as shown at B in Figure 1J, and it is difficult to form a shape that is vertically close to the side of the plastic body as shown in Figure 1G; finally, the L-shaped external lead The lead or C-shaped outer lead package structure has a larger volume, because the outer leads are bent to form an L-shaped outer lead or C-shaped outer lead package structure, which is compared with the traditional inner lead package. , has a wider package width, which is not conducive to the development trend of miniaturized packages.

发明内容SUMMARY OF THE INVENTION

本发明所要解决的技术问题是针对上述现有技术提供一种具有引脚侧壁爬锡功能的半导体封装结构,其引脚具有外凸的弧形部分以及与之相连与塑封料具有相同高度的侧壁部分,在焊接PCB时焊锡可以沿竖直侧壁部分爬升到较高的高度,从而增加焊锡与引脚的结合面积,同时爬锡状态直接从外观就能清晰地分辨出焊接的状态。另外在爬锡的同时引脚的外凸弧形结构可以使引脚处的空气沿外凸弧形排出,可以避免在焊锡中残留有气泡从而影响引脚与PCB的结合,从而提高产品的焊接性能、焊接的可靠性以及直观检验焊接状态;最后本发明在基岛背面设置一块加厚的铜片,进一步满足了功率半导体高散热的要求。The technical problem to be solved by the present invention is to provide a semiconductor package structure with the function of tin-climbing on the sidewall of the pins in view of the above-mentioned prior art. For the side wall part, when soldering the PCB, the solder can climb to a higher height along the vertical side wall part, thereby increasing the bonding area of the solder and the pins, and the soldering state can be clearly distinguished from the appearance of the solder climbing state. In addition, the convex arc structure of the pin can make the air at the pin discharge along the convex arc while climbing the tin, which can avoid the bubbles remaining in the solder, which will affect the combination of the pin and the PCB, thereby improving the welding of the product. performance, reliability of welding, and visual inspection of the welding state; finally, the present invention provides a thickened copper sheet on the back of the base island, which further satisfies the requirement of high heat dissipation of power semiconductors.

本发明一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其利用蚀刻工艺在载板上形成具有一定深度的凹槽,再通过在凹槽中电镀金属层,可形成具有竖直侧壁的引脚,由于其引脚的竖直侧壁是电镀形成,而不是把传统框架的外引脚进行切筋成型而成,所以侧壁的形成过程不会因为金属引脚的金属回弹应力导致引脚与塑封料之间的分层,而影响产品的可靠性。另外本发明不用进行切割所以只需要去除载板就可以实现原本阵列式的塑封体单体化,充分地节省了更多切割工序中的设备成本,生产成本,材料成本,人工成本以及质量成本;本发明通过两次电镀形成加厚的基岛,进一步满足了功率半导体高散热的要求。The present invention is a manufacturing process of a semiconductor package structure with the function of tin climbing on the sidewall of the pin, which utilizes an etching process to form a groove with a certain depth on a carrier plate, and then electroplating a metal layer in the groove to form a vertical groove. For the pins with straight side walls, since the vertical side walls of the pins are formed by electroplating, rather than cutting and forming the outer pins of the traditional frame, the formation process of the side walls will not be affected by the metal of the metal pins. Rebound stress causes delamination between the lead and the molding compound, which affects product reliability. In addition, the present invention does not need to perform cutting, so the original array-type plastic package can be singulated only by removing the carrier plate, which fully saves more equipment costs, production costs, material costs, labor costs and quality costs in the cutting process; The present invention forms the thickened base island by two electroplating, and further satisfies the requirement of high heat dissipation of the power semiconductor.

本发明一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其利用蚀刻工艺在载板上形成具有一定深度的凹槽,先在凹槽中基岛的位置设置一加厚铜片,再通过在凹槽中电镀金属层,可形成具有竖直侧壁的引脚,由于其引脚的竖直侧壁是电镀形成,而不是把传统框架的外引脚进行切筋成型而成,所以侧壁的形成过程不会因为金属引脚的金属回弹应力导致引脚与塑封料之间的分层,而影响产品的可靠性。另外本发明不用进行切割所以只需要去除载板就可以实现原本阵列式的塑封体单体化,充分地节省了更多切割工序中的设备成本,生产成本,材料成本,人工成本以及质量成本。The present invention is a manufacturing process of a semiconductor package structure with the function of climbing tin on the sidewalls of pins. It uses an etching process to form a groove with a certain depth on a carrier board, and firstly installs a thickened copper plate at the position of the base island in the groove. Then, by electroplating the metal layer in the groove, the pins with vertical sidewalls can be formed. Because the vertical sidewalls of the pins are formed by electroplating, instead of cutting ribs and forming the outer pins of the traditional frame. Therefore, the formation process of the sidewall will not affect the reliability of the product due to the metal springback stress of the metal lead causing the delamination between the lead and the plastic package. In addition, the present invention does not require cutting, so the original array-type plastic package can be singulated only by removing the carrier plate, which fully saves more equipment costs, production costs, material costs, labor costs and quality costs in the cutting process.

本发明解决上述问题所采用的技术方案为:一种具有引脚侧壁爬锡功能的半导体封装结构,它包括基岛和引脚,所述引脚设置于基岛周围,所述基岛正面设置有加厚层,所述基岛和加厚层形成加厚基岛,所述加厚基岛的高度高于引脚的高度,所述引脚包括平面部分和侧壁部分,所述侧壁部分位于平面部分外侧,所述平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,所述加厚基岛正面设置有芯片,所述芯片通过金属焊线与引脚形成电性连接,所述引脚、基岛以及芯片外围区域包封有塑封料,所述侧壁部分的高度与塑封料齐平,所述平面部分、弧形部分和侧壁部分的内表面包覆在塑封料之内,所述平面部分、弧形部分和侧壁部分的外表面均暴露于塑封料之外。The technical solution adopted by the present invention to solve the above problems is: a semiconductor package structure with the function of climbing tin on the sidewalls of pins, which includes a base island and pins, the pins are arranged around the base island, and the front side of the base island is A thickened layer is provided, the base island and the thickened layer form a thickened base island, the height of the thickened base island is higher than the height of the lead, the lead includes a plane part and a side wall part, the side The wall part is located outside the plane part, the plane part and the side wall part are connected by a smooth transition through an arc part, the convex surface of the arc part faces the outer lower side, the front side of the thickened base island is provided with a chip, the The chip is electrically connected to the pins through metal bonding wires, the pins, the base island and the peripheral area of the chip are encapsulated with a plastic sealing compound, the height of the side wall portion is flush with the plastic sealing compound, the flat portion, the arc-shaped The inner surfaces of the portion and the sidewall portion are encapsulated within the molding compound, and the outer surfaces of the flat portion, the arcuate portion and the sidewall portion are all exposed to the molding compound.

一种具有引脚侧壁爬锡功能的半导体封装结构,它包括铜片、引脚和基岛,所述铜片表面设置有基岛,所述引脚设置于铜片周围,所述引脚包括平面部分和侧壁部分,所述侧壁部分位于平面部分外侧,所述平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,所述基岛正面设置有芯片,所述芯片通过金属焊线与引脚形成电性连接,所述引脚、基岛以及芯片外围区域包封有塑封料,所述侧壁部分的高度与塑封料齐平,所述平面部分、弧形部分和侧壁部分的内表面包覆在塑封料之内,所述平面部分、弧形部分和侧壁部分的外表面均暴露于塑封料之外。A semiconductor package structure with a pin sidewall tin-climbing function, which includes a copper sheet, a pin and a base island, the surface of the copper sheet is provided with a base island, the pins are arranged around the copper sheet, and the pins It includes a plane portion and a sidewall portion, the sidewall portion is located outside the plane portion, the plane portion and the sidewall portion are connected by a smooth transition through an arc-shaped portion, the convex surface of the arc-shaped portion faces the outer lower side, and the The front side of the base island is provided with a chip, and the chip is electrically connected to the pins through metal bonding wires. The pins, the base island and the peripheral area of the chip are encapsulated with a plastic sealing compound, and the height of the side wall portion is the same as that of the plastic sealing compound. flat, the inner surfaces of the flat portion, the arc portion and the side wall portion are covered in the molding compound, and the outer surfaces of the flat portion, the arc portion and the side wall portion are all exposed outside the molding compound.

所述引脚和基岛为电镀形成的金属线路层。The pins and base islands are metal circuit layers formed by electroplating.

一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,所述工艺包括以下步骤:A manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function, the process comprises the following steps:

步骤一、取一片金属载板;Step 1. Take a piece of metal carrier plate;

步骤二、在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Paste or print a photoresist material that can be exposed and developed on the front and back of the metal carrier, and use exposure and developing equipment to expose, develop and remove part of the photoresist material on the surface of the metal carrier to expose the metal The surface of the carrier board needs to be etched pattern area;

步骤三、在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,底部和侧壁连接处蚀刻为弧形,蚀刻完成后去除金属载板表面的光阻膜;Step 3: Chemical etching is performed on the area where the exposure and development are completed on the front of the metal carrier, and the groove is formed by etching. photoresist film;

步骤四,在金属载板正面凹槽内电镀上金属线路层,形成基岛和引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平;Step 4: Electroplating a metal circuit layer in the front groove of the metal carrier to form a base island and a pin, the pin includes a flat part and a side wall part, the side wall part is located outside the flat part, and between the flat part and the side wall part Smooth transition connection through the arc-shaped part, the convex surface of the arc-shaped part faces the outer lower side, and the height of the side wall part is flush with the top surface of the groove;

步骤五,在金属载板正面凹槽内的基岛上再次电镀上金属线路层,形成加厚基岛;Step 5, electroplating the metal circuit layer on the base island in the front groove of the metal carrier plate again to form a thickened base island;

步骤六、在加厚基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片,在芯片正面与引脚正面之间进行键合金属线作业;Step 6: Coating bonding material or solder on the surface of the thickened base island, then implanting a chip on the bonding material or solder, and bonding metal wires between the front side of the chip and the front side of the pins;

步骤七、将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封;Step 7. Use plastic sealing compound to seal the metal carrier plate that has completed the chip loading and wire bonding operations in Step 6;

步骤八、去除金属载板,露出引脚和加厚基岛的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8: Remove the metal carrier plate to expose the outer surface of the pin and the thickened base island, and separate the original array-type plastic package to obtain a semiconductor package structure with the function of tin climbing on the side of the pin.

一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,所述工艺包括以下步骤:A manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function, the process comprises the following steps:

步骤一、取一片金属载板;Step 1. Take a piece of metal carrier plate;

步骤二、在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Paste or print a photoresist material that can be exposed and developed on the front and back of the metal carrier, and use exposure and developing equipment to expose, develop and remove part of the photoresist material on the surface of the metal carrier to expose the metal The surface of the carrier board needs to be etched pattern area;

步骤三、在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,底部和侧壁连接处蚀刻为弧形,蚀刻完成后去除金属载板表面的光阻膜;Step 3: Chemical etching is performed on the area where the exposure and development are completed on the front of the metal carrier, and the groove is formed by etching. photoresist film;

步骤四,在金属载板正面凹槽内后续电镀基岛的位置设置一铜片;Step 4, setting a copper sheet at the position of the subsequent electroplating base island in the front groove of the metal carrier;

步骤五,在金属载板正面凹槽内的铜片上电镀上金属线路层,形成基岛,在金属载板正面凹槽内铜片的周围部分电镀上金属线路层,形成引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平;Step 5: A metal circuit layer is electroplated on the copper sheet in the front groove of the metal carrier to form a base island, and a metal circuit layer is plated on the surrounding part of the copper sheet in the front groove of the metal carrier to form a pin, and the pin includes: The plane part and the side wall part, the side wall part is located outside the plane part, the plane part and the side wall part are connected by a smooth transition through the arc part, the convex surface of the arc part faces the outer lower side, the height of the side wall part is the same as the concave part. The top surface of the groove is flush;

步骤六、在基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片,在芯片正面与引脚正面之间进行键合金属焊线作业;Step 6: Coating bonding material or solder on the surface of the base island, then implanting the chip on the bonding material or solder, and bonding metal wire between the front side of the chip and the front side of the pin;

步骤七、将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封;Step 7. Use plastic sealing compound to seal the metal carrier plate that has completed the chip loading and wire bonding operations in Step 6;

步骤八、去除金属载板,露出引脚和铜片的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8: Remove the metal carrier plate to expose the outer surfaces of the pins and the copper sheet, and separate the original array-type plastic package to obtain a semiconductor package structure with a tin-climbing function on the side of the pins.

蚀刻药水采用氯化铜或者是氯化铁。The etching potion uses copper chloride or ferric chloride.

去除光阻膜采用化学药水软化并采用高压水冲洗的方法。The photoresist film is removed by softening with chemical solution and rinsing with high pressure water.

金属线路层材料是铜、铝或镍。The metal circuit layer material is copper, aluminum or nickel.

金属焊线的材料采用金、银、铜或铝;金属焊线的形状是丝状或带状。The material of the metal bonding wire is gold, silver, copper or aluminum; the shape of the metal bonding wire is wire or ribbon.

塑封料的包封方式采用模具灌胶方式、喷涂设备喷涂方式或刷胶方式,所述塑封料采用有填料物质或是无填料物质的环氧树脂。The encapsulation method of the plastic encapsulation material adopts the mold filling method, the spraying method of spraying equipment, or the gluing method, and the plastic encapsulating material adopts epoxy resin with filler substance or without filler substance.

与现有技术相比,本发明的优点在于:Compared with the prior art, the advantages of the present invention are:

1、本发明的一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,其在载板蚀刻形成的凹槽中电镀直接形成具有外凸的弧形部分以及与之相连与塑封料具有相同高度的侧壁部分的引脚,在焊接PCB时焊锡可以沿竖直侧壁爬升到较高的高度,从而增加焊锡与引脚的结合面积,其爬锡状态直接从外观就能清晰地看出,另外在爬锡的同时引脚的外凸弧形结构可以使引脚处的空气沿外凸弧形排出,从而可以避免在焊锡中残留有气泡从而影响引脚与PCB的结合,可以提高产品的焊接性能与焊接的可靠性;1. A semiconductor package structure with a pin sidewall tin-climbing function of the present invention and a manufacturing process thereof, which are electroplated in the groove formed by the etching of the carrier plate to directly form an arc-shaped portion with an external convexity, and are connected with it and plastic-sealed. When soldering the PCB, the solder can climb to a higher height along the vertical sidewall, thereby increasing the bonding area between the solder and the pin, and its climbing state can be clearly seen from the appearance. It can be seen from the ground that in addition, the convex arc structure of the pin can make the air at the pin discharge along the convex arc while climbing the tin, so as to avoid residual air bubbles in the solder, which will affect the combination of the pin and the PCB. It can improve the welding performance and reliability of the product;

2、本发明的一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,其引脚的竖直侧壁是电镀形成,而不是把传统框架的外引脚进行切筋成型而成,其侧壁的形成过程不会导致引脚与塑封料之间的分层,从而影响产品的可靠性;2. In the present invention, a semiconductor package structure with a tin-climbing function on the sidewalls of the pins and its manufacturing process, the vertical sidewalls of the pins are formed by electroplating, instead of the outer pins of the traditional frame being cut and formed. The formation process of its sidewalls will not cause delamination between the lead and the plastic package, thus affecting the reliability of the product;

3、本发明的一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,其通过两次电镀形成加厚的基岛或在基岛下方设置一加厚的铜片,进一步满足了功率半导体高散热的要求;3. A semiconductor package structure with a pin sidewall tin-climbing function of the present invention and a manufacturing process thereof, which form a thickened base island through two electroplatings or set a thickened copper sheet under the base island, further satisfying the meet the high heat dissipation requirements of power semiconductors;

4、本发明的一种具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺,其不用进行切割所以只需要去除载板就可以实现原本阵列式的塑封体单体化,所以其可以节省切割成本。4. A semiconductor package structure with a pin sidewall tin-climbing function of the present invention and its manufacturing process do not need to be cut, so the original array-type plastic package can be singulated only by removing the carrier, so it can be Save cutting costs.

附图说明Description of drawings

图1A-1B为现有的制造引脚具有台阶的封装结构的两次切割作业示意图。1A-1B are schematic diagrams of two cutting operations for manufacturing a package structure with stepped pins in the prior art.

图1C为现有的引脚具有台阶的封装结构的示意图。FIG. 1C is a schematic diagram of a conventional package structure with stepped pins.

图1D为现有的引脚具有台阶的封装结构与PCB板结合的示意图。FIG. 1D is a schematic diagram of a conventional package structure with stepped pins combined with a PCB board.

图1E为现有的引脚具有水滴状凹槽的封装结构的示意图。FIG. 1E is a schematic diagram of a conventional package structure in which a lead has a drop-shaped groove.

图1F为现有的引脚具有水滴状凹槽的封装结构与PCB板结合的示意图。FIG. 1F is a schematic diagram of a conventional package structure with water drop-shaped grooves combined with a PCB board.

图1G为现有的具有L形外引脚的封装结构的示意图。FIG. 1G is a schematic diagram of a conventional package structure with L-shaped outer leads.

图1H为现有的具有C形外引脚的封装结构的示意图。FIG. 1H is a schematic diagram of a conventional package structure with C-shaped outer leads.

图1I 为现有的具有L形外引脚或C形外引脚的封装结构在进行切筋成型前的结构示意图。FIG. 1I is a schematic structural diagram of an existing package structure with L-shaped outer leads or C-shaped outer leads before rib-cutting molding.

图1J为现有的具有L形外引脚的封装结构在切筋成型后的结构示意图。FIG. 1J is a schematic structural diagram of a conventional package structure with L-shaped outer leads after rib-cutting is formed.

图2为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例1的示意图。FIG. 2 is a schematic diagram of Embodiment 1 of a semiconductor package structure with a pin sidewall creeping function of the present invention.

图3为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例1的立体示意图。FIG. 3 is a schematic perspective view of Embodiment 1 of a semiconductor package structure with a lead sidewall creeping function of the present invention.

图4为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例1与PCB板结合的示意图。FIG. 4 is a schematic diagram of the combination of Embodiment 1 of a semiconductor package structure with a pin sidewall tin-climbing function of the present invention and a PCB board.

图5~图15为本发明一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺的流程示意图。5 to 15 are schematic flowcharts of a manufacturing process of a semiconductor package structure with lead sidewall creeping function of the present invention.

图16为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例2的示意图。FIG. 16 is a schematic diagram of Embodiment 2 of a semiconductor package structure with a lead sidewall creeping function of the present invention.

图17为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例2的立体示意图。FIG. 17 is a schematic perspective view of Embodiment 2 of a semiconductor package structure with a lead sidewall creeping function of the present invention.

图18为本发明一种具有引脚侧壁爬锡功能的半导体封装结构实施例2与PCB板结合的示意图。FIG. 18 is a schematic diagram of the combination of Embodiment 2 of a semiconductor package structure with a pin sidewall tin-climbing function of the present invention and a PCB board.

图19~图29为本发明一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺的流程示意图。19 to 29 are schematic flowcharts of a manufacturing process of a semiconductor package structure with lead sidewall creeping function of the present invention.

其中:in:

基岛1Key Island 1

引脚2pin 2

平面部分2.1Flat part 2.1

弧形部分2.2Arc section 2.2

侧壁部分2.3Side wall section 2.3

加厚层3Thickening layer 3

粘结物质或焊料4Bonding Substance or Solder 4

芯片5chip 5

金属焊线6Metal Bonding Wire 6

塑封料7Molding compound 7

铜片8。Copper sheet 8.

具体实施方式Detailed ways

以下结合附图实施例对本发明作进一步详细描述。The present invention will be further described in detail below with reference to the embodiments of the accompanying drawings.

实施例1:两次电镀形成加厚基岛Example 1: Two times of electroplating to form thickened base islands

如图2、图3所示,本实施例中的一种具有引脚侧壁爬锡功能的半导体封装结构,它包括基岛1和引脚2,所述引脚2和基岛3为电镀形成的金属线路层,所述引脚2设置于基岛3周围,所述基岛1正面设置有加厚层3,所述基岛1和加厚层3形成加厚基岛,所述加厚基岛的高度高于引脚2的高度,所述引脚2包括平面部分2.1和侧壁部分2.3,所述侧壁部分2.3位于平面部分2.1外侧,所述平面部分2.1和侧壁部分2.3之间通过弧形部分2.2平滑过渡连接,所述弧形部分2.2的凸面朝向外下侧,所述加厚基岛正面通过粘结物质或焊料4设置有芯片5,所述芯片5通过金属焊线6与引脚2形成电性连接,所述引脚2、基岛3以及芯片5外围区域包封有塑封料7,所述侧壁部分2.3的高度与塑封料7齐平,所述平面部分2.1、弧形部分2.2和侧壁部分2.3的内表面包覆在塑封料7之内,所述平面部分2.1、弧形部分2.2和侧壁部分2.3的外表面均暴露于塑封料7之外;As shown in FIG. 2 and FIG. 3 , a semiconductor package structure with a pin sidewall tin-climbing function in this embodiment includes a base island 1 and a pin 2, and the pins 2 and the base island 3 are electroplated The formed metal circuit layer, the pins 2 are arranged around the base island 3, the front side of the base island 1 is provided with a thickened layer 3, the base island 1 and the thickened layer 3 form a thickened base island, and the thickened layer 3 is formed. The height of the thick base island is higher than the height of the lead 2, the lead 2 includes a flat part 2.1 and a side wall part 2.3, the side wall part 2.3 is located outside the flat part 2.1, the flat part 2.1 and the side wall part 2.3 The arc-shaped part 2.2 is used for smooth transition connection, the convex surface of the arc-shaped part 2.2 faces the outer and lower side, and the front side of the thickened base island is provided with a chip 5 through a bonding substance or solder 4, and the chip 5 is welded by metal. The wire 6 is electrically connected to the pin 2. The pin 2, the base island 3 and the peripheral area of the chip 5 are encapsulated with a plastic compound 7. The height of the side wall portion 2.3 is flush with the plastic compound 7, and the plane The inner surfaces of the portion 2.1, the arcuate portion 2.2 and the sidewall portion 2.3 are encapsulated within the molding compound 7, and the outer surfaces of the flat portion 2.1, the arcuate portion 2.2 and the sidewall portion 2.3 are all exposed to the molding compound 7 ;

图4为本发明一种具有引脚侧壁爬锡功能的半导体封装结构与PCB板结合的示意图,本发明在载板蚀刻形成的凹槽中电镀直接形成具有外凸的弧形以及与之相连与塑封料具有相同高度侧壁的引脚,在焊接PCB时焊锡可以沿竖直侧壁爬升到较高的高度,从而增加焊锡与引脚的结合面积,其爬锡状态直接从外观就能清晰地看出,另外在爬锡的同时引脚的外凸弧形结构可以使引脚处的空气沿外凸弧形排出,从而可以避免在焊锡中残留有气泡从而影响引脚与PCB的结合,可以提高产品的焊接性能与焊接的可靠性。4 is a schematic diagram of the combination of a semiconductor package structure with a pin sidewall tin-climbing function and a PCB board according to the present invention. In the present invention, a convex arc is directly formed in the groove formed by the etching of the carrier board and is connected to it. For pins with the same height as the plastic compound, the solder can climb to a higher height along the vertical sidewalls when soldering the PCB, thereby increasing the bonding area between the solder and the pins, and its climbing state can be clearly seen from the appearance. It can be seen from the ground that in addition, the convex arc structure of the pin can make the air at the pin discharge along the convex arc while climbing the tin, so as to avoid residual air bubbles in the solder, which will affect the combination of the pin and the PCB. It can improve the welding performance and reliability of the product.

一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,所述工艺包括以下步骤:A manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function, the process comprises the following steps:

步骤一、参见图5,取一片厚度合适的金属载板,此板材使用的目的是为线路制作及线路层结构提供支撑,此板材的材质主要以金属材料为主,而金属材料的材质可以是铜材,铁材,不锈钢材或其它具有导电功能的金属物质;Step 1. Referring to Figure 5, take a metal carrier plate with a suitable thickness. The purpose of this plate is to provide support for circuit production and circuit layer structure. The material of this plate is mainly metal materials, and the material of metal materials can be Copper, iron, stainless steel or other metal substances with conductive function;

步骤二、参见图6,在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,以保护后续蚀刻金属层工艺作业。光阻材料可以是光阻膜,也可以是光刻胶。参见图7,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Referring to FIG. 6, a photoresist material that can be exposed and developed is pasted or printed on the front and back of the metal carrier to protect the subsequent metal layer etching process. The photoresist material can be a photoresist film or a photoresist. Referring to FIG. 7, the photoresist material on the surface of the metal carrier is exposed, developed and removed by using an exposure and developing device, so as to expose the area of the metal carrier surface that needs to be etched;

步骤三、参见图8,在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,由于蚀刻特性,底部和侧壁连接处会蚀刻为弧形。蚀刻药水可以采用氯化铜或者是氯化铁或者其它可以进行化学蚀刻的药水。参见图9,蚀刻完成后去除金属载板表面的光阻膜,去除光阻膜的方法可以采用化学药水软化并采用高压水冲洗的方法去除光阻膜;Step 3. Referring to Figure 8, chemical etching is performed on the area where the exposure and development are completed on the front side of the metal carrier, and the etching forms grooves. The bottom and sidewalls of the grooves are flat. Due to the etching characteristics, the connection between the bottom and the sidewalls will be etched into an arc shape. . The etching potion can be copper chloride or ferric chloride or other potions that can be chemically etched. Referring to FIG. 9, after the etching is completed, the photoresist film on the surface of the metal carrier is removed, and the method for removing the photoresist film can be softened by chemical solution and removed by high-pressure water rinsing;

步骤四,参见图10,在金属载板正面凹槽内电镀上金属线路层,形成基岛和引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平,金属线路层材料通常是铜、铝、镍等,也可以是其它导电金属物质;Step 4, referring to Figure 10, electroplating a metal circuit layer in the groove on the front side of the metal carrier to form a base island and a pin, the pin includes a flat part and a side wall part, the side wall part is located outside the flat part, the flat part and the side The wall parts are connected by a smooth transition through an arc-shaped part, the convex surface of the arc-shaped part faces the outer lower side, the height of the side wall part is flush with the top surface of the groove, and the material of the metal circuit layer is usually copper, aluminum, nickel, etc., It can also be other conductive metal substances;

步骤五,参见图11,在金属载板正面凹槽内的基岛上再次电镀上金属线路层,形成加厚基岛,金属线路层材料通常是铜、铝、镍等,也可以是其它导电金属物质;Step 5, referring to Figure 11, the metal circuit layer is electroplated on the base island in the groove on the front side of the metal carrier plate again to form a thickened base island. The material of the metal circuit layer is usually copper, aluminum, nickel, etc., or other conductive materials. metal substance;

步骤六、参见图12,在加厚基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片。在芯片正面与引脚正面之间进行键合金属焊线作业,所述金属焊线的材料采用金、银、铜、铝或是合金的材料,金属焊线的形状可以是丝状也可以是带状;Step 6. Referring to Fig. 12, the surface of the thickened base island is coated with a bonding substance or solder, and then a chip is implanted on the bonding substance or solder. The metal bonding wire is bonded between the front side of the chip and the front side of the pin. The material of the metal bonding wire is gold, silver, copper, aluminum or alloy material, and the shape of the metal bonding wire can be filament or ribbon;

步骤七、参见图13,将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封,塑封料的包封方式可以采用模具灌胶方式、喷涂设备喷涂方式或刷胶方式,所述塑封料可以采用有填料物质或是无填料物质的环氧树脂;Step 7. Referring to Figure 13, the metal carrier plate that has been loaded and wired in Step 6 is plastic-sealed with plastic sealing compound. The packaging method of the plastic sealing compound can be the mold filling method, the spraying equipment spraying method or the glue brushing method. The molding compound can be epoxy resin with filler material or without filler material;

步骤八、参见图14、图15,去除金属载板,露出引脚和加厚基岛的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8. Referring to Figure 14 and Figure 15, remove the metal carrier plate to expose the outer surface of the pins and the thickened base island, and separate the original array-type plastic package to obtain a tin-climbing tin on the side of the pins. Functional semiconductor package structure.

本发明提供一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,利用蚀刻工艺在载板上形成具有一定深度的凹槽,再通过在凹槽中电镀金属层,可形成具有竖直侧壁的引脚,由于其引脚的竖直侧壁是电镀形成,而不是把传统框架的外引脚进行切筋成型而成,其侧壁的形成过程不会导致引脚与塑封料之间的分层,从而影响产品的可靠性。另外本发明不用进行切割所以只需要去除载板就可以实现原本阵列式的塑封体单体化,所以其可以节省切割成本。The invention provides a manufacturing process of a semiconductor package structure with a function of tin climbing on the sidewalls of pins. An etching process is used to form a groove with a certain depth on a carrier board, and then a metal layer is electroplated in the groove to form a vertical groove. For the pins with straight sidewalls, since the vertical sidewalls of the pins are formed by electroplating, rather than the outer pins of the traditional frame being formed by cutting ribs, the formation process of the sidewalls will not cause the pins and the molding compound to be formed. stratification between, thereby affecting the reliability of the product. In addition, the present invention does not require cutting, so the original array-type plastic package can be singulated only by removing the carrier plate, so the cutting cost can be saved.

实施例2:芯片下设置铜片Example 2: Setting copper sheets under the chip

如图16、图17所示,本实施例中的一种具有引脚侧壁爬锡功能的半导体封装结构,它包括铜片8、引脚2、基岛1,所述铜片8表面设置有基岛1,所述引脚2和基岛1为电镀形成的金属线路层,所述引脚2设置于铜片8周围,所述引脚2包括平面部分2.1和侧壁部分2.3,所述侧壁部分2.3位于平面部分2.1外侧,所述平面部分2.1和侧壁部分2.3之间通过弧形部分2.2平滑过渡连接,所述弧形部分2.2的凸面朝向外下侧,所述基岛1正面通过粘结物质或焊料4设置有芯片5,所述芯片5通过金属焊线6与引脚2形成电性连接,所述引脚2、基岛1以及芯片5外围区域包封有塑封料7,所述侧壁部分2.3的高度与塑封料7齐平,所述平面部分2.1、弧形部分2.2和侧壁部分2.3的内表面包覆在塑封料7之内,所述平面部分2.1、弧形部分2.2和侧壁部分2.3的外表面均暴露于塑封料7之外;As shown in FIG. 16 and FIG. 17 , in this embodiment, a semiconductor package structure with the function of tin climbing on the sidewalls of the pins includes copper sheets 8 , pins 2 , and a base island 1 . The surface of the copper sheets 8 is provided with There is a base island 1, the pin 2 and the base island 1 are metal circuit layers formed by electroplating, the pin 2 is arranged around the copper sheet 8, and the pin 2 includes a plane portion 2.1 and a side wall portion 2.3, so The side wall portion 2.3 is located outside the plane portion 2.1, the plane portion 2.1 and the side wall portion 2.3 are connected by a smooth transition through an arc-shaped portion 2.2, the convex surface of the arc-shaped portion 2.2 faces the outer lower side, and the base island 1 The front side is provided with a chip 5 through a bonding substance or solder 4, the chip 5 is electrically connected to the pin 2 through a metal wire 6, and the pin 2, the base island 1 and the peripheral area of the chip 5 are encapsulated with a plastic sealing compound 7. The height of the side wall portion 2.3 is flush with the molding compound 7, the inner surfaces of the flat portion 2.1, the arc portion 2.2 and the side wall portion 2.3 are wrapped in the molding compound 7, and the flat portion 2.1, The outer surfaces of the arc portion 2.2 and the side wall portion 2.3 are both exposed to the outside of the molding compound 7;

图18为本发明一种具有引脚侧壁爬锡功能的半导体封装结构与PCB板结合的示意图,本发明在载板蚀刻形成的凹槽中电镀直接形成具有外凸的弧形以及与之相连与塑封料具有相同高度侧壁的引脚,在焊接PCB时焊锡可以沿竖直侧壁爬升到较高的高度,从而增加焊锡与引脚的结合面积,其爬锡状态直接从外观就能清晰地看出,另外在爬锡的同时引脚的外凸弧形结构可以使引脚处的空气沿外凸弧形排出,从而可以避免在焊锡中残留有气泡从而影响引脚与PCB的结合,可以提高产品的焊接性能与焊接的可靠性。18 is a schematic diagram of the combination of a semiconductor package structure with a pin sidewall tin-climbing function of the present invention and a PCB board. In the present invention, an arc with a convex shape is directly formed by electroplating in the groove formed by the etching of the carrier board and is connected to it. For pins with the same height as the plastic compound, the solder can climb to a higher height along the vertical sidewalls when soldering the PCB, thereby increasing the bonding area between the solder and the pins, and its climbing state can be clearly seen from the appearance. It can be seen from the ground that in addition, the convex arc structure of the pin can make the air at the pin discharge along the convex arc while climbing the tin, so as to avoid residual air bubbles in the solder, which will affect the combination of the pin and the PCB. It can improve the welding performance and reliability of the product.

一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,所述工艺包括以下步骤:A manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function, the process comprises the following steps:

步骤一、参见图19,取一片厚度合适的金属载板,此板材使用的目的是为线路制作及线路层结构提供支撑,此板材的材质主要以金属材料为主,而金属材料的材质可以是铜材,铁材,不锈钢材或其它具有导电功能的金属物质;Step 1. Referring to Figure 19, take a metal carrier plate of suitable thickness. The purpose of this plate is to provide support for circuit production and circuit layer structure. The material of this plate is mainly metal materials, and the material of metal materials can be Copper, iron, stainless steel or other metal substances with conductive function;

步骤二、参见图20,在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,以保护后续蚀刻金属层工艺作业。光阻材料可以是光阻膜,也可以是光刻胶。参见图21,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Referring to FIG. 20 , paste or print a photoresist material that can be exposed and developed on the front and back of the metal carrier to protect the subsequent metal layer etching process. The photoresist material can be a photoresist film or a photoresist. Referring to FIG. 21 , the photoresist material on the surface of the metal carrier is exposed, developed and removed by using an exposure and developing device, so as to expose the pattern area on the surface of the metal carrier that needs to be etched;

步骤三、参见图22,在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,由于蚀刻特性,底部和侧壁连接处会蚀刻为弧形。蚀刻药水可以采用氯化铜或者是氯化铁或者其它可以进行化学蚀刻的药水。参见图23,蚀刻完成后去除金属载板表面的光阻膜,去除光阻膜的方法可以采用化学药水软化并采用高压水冲洗的方法去除光阻膜;Step 3. Referring to Figure 22, chemical etching is performed in the area where the exposure and development are completed on the front of the metal carrier, and the etching forms grooves. The bottom and sidewalls of the grooves are flat. Due to the etching characteristics, the connection between the bottom and the sidewalls will be etched into an arc shape. . The etching potion can be copper chloride or ferric chloride or other potions that can be chemically etched. Referring to Figure 23, after the etching is completed, the photoresist film on the surface of the metal carrier is removed, and the method of removing the photoresist film can be softened by chemical solution and rinsed with high pressure water to remove the photoresist film;

步骤四,参见图24,在金属载板正面凹槽内后续电镀基岛的位置设置一铜片;Step 4, referring to FIG. 24, set a copper sheet at the position of the subsequent electroplating base island in the groove on the front side of the metal carrier;

步骤五,参见图25,在金属载板正面凹槽内的铜片上电镀上金属线路层,形成基岛,在金属载板正面凹槽内铜片的周围部分电镀上金属线路层,形成引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平,金属线路层材料通常是铜、铝、镍等,也可以是其它导电金属物质;Step 5: Referring to Figure 25, a metal circuit layer is plated on the copper sheet in the front groove of the metal carrier to form a base island, and a metal circuit layer is plated on the surrounding part of the copper sheet in the front groove of the metal carrier to form a pin , the pin includes a plane part and a side wall part, the side wall part is located outside the plane part, the plane part and the side wall part are connected by a smooth transition through an arc part, the convex surface of the arc part faces the outer lower side, and the side wall part The height of the groove is flush with the top surface of the groove, and the material of the metal circuit layer is usually copper, aluminum, nickel, etc., or other conductive metal substances;

步骤六、参见图26,在基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片。在芯片正面与引脚正面之间进行键合金属焊线作业,所述金属焊线的材料采用金、银、铜、铝或是合金的材料,金属焊线的形状可以是丝状也可以是带状;Step 6. Referring to Fig. 26, the surface of the base island is coated with a bonding substance or solder, and then a chip is implanted on the bonding substance or solder. The metal bonding wire is bonded between the front side of the chip and the front side of the pin. The material of the metal bonding wire is gold, silver, copper, aluminum or alloy material, and the shape of the metal bonding wire can be filament or ribbon;

步骤七、参见图27,将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封,塑封料的包封方式可以采用模具灌胶方式、喷涂设备喷涂方式或刷胶方式,所述塑封料可以采用有填料物质或是无填料物质的环氧树脂;Step 7. Referring to Figure 27, the metal carrier plate that has been loaded and wired in Step 6 is plastic-sealed with plastic sealing material. The packaging method of the plastic sealing material can be the mold filling method, the spraying equipment spraying method or the glue brushing method. The molding compound can be epoxy resin with filler material or without filler material;

步骤八、参见图28、图29,去除金属载板,露出引脚和铜片的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8. Referring to Figure 28 and Figure 29, remove the metal carrier plate to expose the outer surfaces of the pins and copper sheets, and separate the original array-type plastic package to obtain a tin-climbing function on the side of the pins. Semiconductor packaging structure.

本发明提供一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,利用蚀刻工艺在载板上形成具有一定深度的凹槽,先在凹槽中基岛的位置设置一加厚铜片,再通过在凹槽中电镀金属层,可形成具有竖直侧壁的引脚,由于其引脚的竖直侧壁是电镀形成,而不是把传统框架的外引脚进行切筋成型而成,其侧壁的形成过程不会导致引脚与塑封料之间的分层,从而影响产品的可靠性。另外本发明不用进行切割所以只需要去除载板就可以实现原本阵列式的塑封体单体化,所以其可以节省切割成本。The invention provides a manufacturing process of a semiconductor package structure with the function of climbing tin on the sidewalls of pins. An etching process is used to form a groove with a certain depth on a carrier board, and a thickened copper plate is first arranged at the position of the base island in the groove. Then, by electroplating the metal layer in the groove, the pins with vertical sidewalls can be formed. Because the vertical sidewalls of the pins are formed by electroplating, instead of cutting ribs and forming the outer pins of the traditional frame. The formation process of its sidewalls will not cause delamination between the lead and the molding compound, thereby affecting the reliability of the product. In addition, the present invention does not require cutting, so the original array-type plastic package can be singulated only by removing the carrier plate, so the cutting cost can be saved.

除上述实施例外,本发明还包括有其他实施方式,凡采用等同变换或者等效替换方式形成的技术方案,均应落入本发明权利要求的保护范围之内。In addition to the above-mentioned embodiments, the present invention also includes other embodiments, and all technical solutions formed by equivalent transformation or equivalent replacement shall fall within the protection scope of the claims of the present invention.

Claims (10)

1.一种具有引脚侧壁爬锡功能的半导体封装结构,其特征在于:它包括基岛(1)和引脚(2),所述基岛(1)和引脚(2)为电镀形成的金属线路层,所述引脚(2)设置于基岛(1)周围,所述基岛(1)正面设置有加厚层(3),所述基岛(1)和加厚层(3)形成加厚基岛,所述加厚基岛的高度高于引脚(2)的高度,所述引脚(2)包括平面部分(2.1)和侧壁部分(2.3),所述侧壁部分(2.3)位于平面部分(2.1)外侧,所述平面部分(2.1)和侧壁部分(2.3)之间通过弧形部分(2.2)平滑过渡连接,所述弧形部分(2.2)的凸面朝向外下侧,所述加厚基岛正面设置有芯片(5),所述芯片(5)通过金属焊线(6)与引脚(2)形成电性连接,所述引脚(2)、基岛(1)以及芯片(5)外围区域包封有塑封料(7),所述侧壁部分(2.3)的高度与塑封料(7)齐平,所述平面部分(2.1)、弧形部分(2.2)和侧壁部分(2.3)的内表面包覆在塑封料(7)之内,所述平面部分(2.1)、弧形部分(2.2)和侧壁部分(2.3)的外表面均暴露于塑封料(7)之外。1. A semiconductor package structure with a pin sidewall climbing tin function, characterized in that it comprises a base island (1) and a pin (2), and the base island (1) and the pin (2) are electroplated The formed metal circuit layer, the pins (2) are arranged around the base island (1), the front side of the base island (1) is provided with a thickened layer (3), the base island (1) and the thickened layer (3) forming a thickened base island, the height of the thickened base island is higher than the height of the lead (2), the lead (2) includes a plane part (2.1) and a side wall part (2.3), the said The side wall part (2.3) is located outside the plane part (2.1), and the plane part (2.1) and the side wall part (2.3) are connected by a smooth transition through the arc part (2.2), the arc part (2.2) The convex surface faces the outer and lower side, the front side of the thickened base island is provided with a chip (5), the chip (5) is electrically connected to the pin (2) through a metal bonding wire (6), and the pin (2) ), the base island (1) and the peripheral area of the chip (5) are encapsulated with a plastic compound (7), the height of the side wall portion (2.3) is flush with the plastic compound (7), the plane portion (2.1), The inner surfaces of the arc portion (2.2) and the side wall portion (2.3) are encapsulated within the plastic compound (7), and the outer surfaces of the flat portion (2.1), the arc portion (2.2) and the side wall portion (2.3) The surfaces are exposed to the outside of the molding compound (7). 2.一种具有引脚侧壁爬锡功能的半导体封装结构,其特征在于:它包括铜片(8)、引脚(2)和基岛(1),所述基岛(1)和引脚(2)为电镀形成的金属线路层,所述铜片(8 )表面设置有基岛(1),所述引脚(2)设置于铜片(8)周围,所述引脚(2)包括平面部分(2.1)和侧壁部分(2.3),所述侧壁部分(2.3)位于平面部分(2.1)外侧,所述平面部分(2.1)和侧壁部分(2.3)之间通过弧形部分(2.2)平滑过渡连接,所述弧形部分(2.2)的凸面朝向外下侧,所述基岛(1)正面设置有芯片(5),所述芯片(5)通过金属焊线(6)与引脚(2)形成电性连接,所述引脚(2)、基岛(3)以及芯片(5)外围区域包封有塑封料(7),所述侧壁部分(2.3)的高度与塑封料(7)齐平,所述平面部分(2.1)、弧形部分(2.2)和侧壁部分(2.3)的内表面包覆在塑封料(7)之内,所述平面部分(2.1)、弧形部分(2.2)和侧壁部分(2.3)的外表面均暴露于塑封料(7)之外。2. A semiconductor package structure with a pin sidewall climbing tin function, characterized in that it comprises a copper sheet (8), a pin (2) and a base island (1), the base island (1) and the lead The foot (2) is a metal circuit layer formed by electroplating, the surface of the copper sheet (8) is provided with a base island (1), the pin (2) is arranged around the copper sheet (8), and the pin (2) ) comprises a plane part (2.1) and a side wall part (2.3), the side wall part (2.3) is located outside the plane part (2.1), and an arc is formed between the plane part (2.1) and the side wall part (2.3) The part (2.2) is connected by a smooth transition, the convex surface of the arc-shaped part (2.2) faces the outer lower side, the front surface of the base island (1) is provided with a chip (5), and the chip (5) passes through the metal bonding wire (6) ) is electrically connected to the pin (2), the pin (2), the base island (3) and the peripheral area of the chip (5) are encapsulated with a plastic compound (7). The height is flush with the molding compound (7), the inner surfaces of the flat portion (2.1), the arc portion (2.2) and the side wall portion (2.3) are wrapped in the molding compound (7), and the flat portion ( 2.1), the outer surfaces of the arcuate portion (2.2) and the side wall portion (2.3) are all exposed to the molding compound (7). 3.根据权利要求1或2所述的一种具有引脚侧壁爬锡功能的半导体封装结构,其特征在于:所述引脚(2)和基岛(1)为电镀形成的金属线路层。3. A semiconductor package structure with a pin sidewall creeping tin function according to claim 1 or 2, wherein the pin (2) and the base island (1) are metal circuit layers formed by electroplating . 4.一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于所述工艺包括以下步骤:4. A manufacturing process of a semiconductor package structure with pin sidewall creeping tin function, characterized in that the process comprises the following steps: 步骤一、取一片金属载板;Step 1. Take a piece of metal carrier plate; 步骤二、在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Paste or print a photoresist material that can be exposed and developed on the front and back of the metal carrier, and use exposure and developing equipment to expose, develop and remove part of the photoresist material on the surface of the metal carrier to expose the metal The surface of the carrier board needs to be etched pattern area; 步骤三、在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,底部和侧壁连接处蚀刻为弧形,蚀刻完成后去除金属载板表面的光阻膜;Step 3: Chemical etching is performed on the area where the exposure and development are completed on the front of the metal carrier, and the groove is formed by etching. photoresist film; 步骤四,在金属载板正面凹槽内电镀上金属线路层,形成基岛和引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平;Step 4: Electroplating a metal circuit layer in the front groove of the metal carrier to form a base island and a pin, the pin includes a flat part and a side wall part, the side wall part is located outside the flat part, and between the flat part and the side wall part Smooth transition connection through the arc-shaped part, the convex surface of the arc-shaped part faces the outer lower side, and the height of the side wall part is flush with the top surface of the groove; 步骤五,在金属载板正面凹槽内的基岛上再次电镀上金属线路层,形成加厚基岛;Step 5, electroplating the metal circuit layer on the base island in the front groove of the metal carrier plate again to form a thickened base island; 步骤六、在加厚基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片,在芯片正面与引脚正面之间进行键合金属焊线作业;Step 6: Coating bonding material or solder on the surface of the thickened base island, then implanting a chip on the bonding material or solder, and bonding metal wire between the front side of the chip and the front side of the pin; 步骤七、将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封;Step 7. Use plastic sealing compound to seal the metal carrier plate that has completed the chip loading and wire bonding operations in Step 6; 步骤八、去除金属载板,露出引脚和加厚基岛的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8: Remove the metal carrier plate to expose the outer surface of the pin and the thickened base island, and separate the original array-type plastic package to obtain a semiconductor package structure with the function of tin climbing on the side of the pin. 5.一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于所述工艺包括以下步骤:5. A manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function, characterized in that the process comprises the following steps: 步骤一、取一片金属载板;Step 1. Take a piece of metal carrier plate; 步骤二、在金属载板正面及背面贴覆或印刷可进行曝光显影的光阻材料,利用曝光显影设备对金属载板表面的光阻材料进行曝光、显影与去除部分光阻材料,以露出金属载板表面需要进行蚀刻图形区域;Step 2: Paste or print a photoresist material that can be exposed and developed on the front and back of the metal carrier, and use exposure and developing equipment to expose, develop and remove part of the photoresist material on the surface of the metal carrier to expose the metal The surface of the carrier board needs to be etched pattern area; 步骤三、在金属载板正面完成曝光显影的区域进行化学蚀刻,蚀刻形成凹槽,凹槽底部和侧壁为平面,底部和侧壁连接处蚀刻为弧形,蚀刻完成后去除金属载板表面的光阻膜;Step 3: Chemical etching is performed on the area where the exposure and development are completed on the front of the metal carrier, and the groove is formed by etching. photoresist film; 步骤四,在金属载板正面凹槽内后续电镀基岛的位置设置一铜片;Step 4, setting a copper sheet at the position of the subsequent electroplating base island in the front groove of the metal carrier; 步骤五,在金属载板正面凹槽内的铜片上电镀上金属线路层,形成基岛,在金属载板正面凹槽内铜片的周围部分电镀上金属线路层,形成引脚,引脚包括平面部分和侧壁部分,侧壁部分位于平面部分外侧,平面部分和侧壁部分之间通过弧形部分平滑过渡连接,所述弧形部分的凸面朝向外下侧,侧壁部分的高度与凹槽顶面齐平;Step 5: A metal circuit layer is electroplated on the copper sheet in the front groove of the metal carrier to form a base island, and a metal circuit layer is plated on the surrounding part of the copper sheet in the front groove of the metal carrier to form a pin, and the pin includes: The plane part and the side wall part, the side wall part is located outside the plane part, the plane part and the side wall part are connected by a smooth transition through the arc part, the convex surface of the arc part faces the outer lower side, the height of the side wall part is the same as the concave part. The top surface of the groove is flush; 步骤六、在基岛表面涂覆粘结物质或焊料,然后在粘结物质或焊料上植入芯片,在芯片正面与引脚正面之间进行键合金属焊线作业;Step 6: Coating bonding material or solder on the surface of the base island, then implanting the chip on the bonding material or solder, and bonding metal wire between the front side of the chip and the front side of the pin; 步骤七、将步骤六完成装片与打线作业的金属载板采用塑封料进行塑封;Step 7. Use plastic sealing compound to seal the metal carrier plate that has completed the chip loading and wire bonding operations in Step 6; 步骤八、去除金属载板,露出引脚和铜片的外表面,并可以使原本阵列式的塑封体独立开来,制得一种具有引脚侧面爬锡功能的半导体封装结构。Step 8: Remove the metal carrier plate to expose the outer surfaces of the pins and the copper sheet, and separate the original array-type plastic package to obtain a semiconductor package structure with a tin-climbing function on the side of the pins. 6.根据权利要求4或5所述的一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于:蚀刻采用的药水是氯化铜或者氯化铁。6 . The manufacturing process of a semiconductor package structure with a pin sidewall climbing tin function according to claim 4 or 5 , wherein the potion used for etching is copper chloride or ferric chloride. 7 . 7.根据权利要求4或5所述的一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于:去除光阻膜采用化学药水软化并采用高压水冲洗的方法。7 . The manufacturing process of a semiconductor package structure with tin-climbing function on pin sidewalls according to claim 4 or 5 , wherein the photoresist film is removed by a method of softening with chemical solution and rinsing with high pressure water. 8 . 8.根据权利要求4或5所述的一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于:金属线路层材料是铜、铝或镍。8 . The manufacturing process of a semiconductor package structure with a pin sidewall creeping tin function according to claim 4 or 5 , wherein the metal circuit layer material is copper, aluminum or nickel. 9 . 9.根据权利要求4或5所述的一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于:金属焊线的材料采用金、银、铜或铝;金属焊线的形状是丝状或带状。9. The manufacturing process of a semiconductor packaging structure with a pin sidewall creeping tin function according to claim 4 or 5, wherein the material of the metal bonding wire is gold, silver, copper or aluminum; the metal bonding wire is made of gold, silver, copper or aluminum; The shape is filamentous or ribbon-like. 10.根据权利要求4或5所述的一种具有引脚侧壁爬锡功能的半导体封装结构的制造工艺,其特征在于:塑封料的包封方式采用模具灌胶方式、喷涂设备喷涂方式或刷胶方式,所述塑封料采用有填料物质或是无填料物质的环氧树脂。10. The manufacturing process of a semiconductor encapsulation structure with pin sidewall creeping tin function according to claim 4 or 5, wherein the encapsulation method of the plastic encapsulating material adopts a mold potting method, a spraying equipment spraying method or a In the method of brushing, the molding compound adopts epoxy resin with filler material or without filler material.
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