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CN107527876A - Package structure - Google Patents

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Publication number
CN107527876A
CN107527876A CN201611224879.3A CN201611224879A CN107527876A CN 107527876 A CN107527876 A CN 107527876A CN 201611224879 A CN201611224879 A CN 201611224879A CN 107527876 A CN107527876 A CN 107527876A
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CN
China
Prior art keywords
lead frame
substrate
base
structure according
stepped
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Pending
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CN201611224879.3A
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Chinese (zh)
Inventor
刘文俊
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Ibis Innotech Inc
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Ibis Innotech Inc
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Filing date
Publication date
Priority claimed from TW105118929A external-priority patent/TWI606560B/en
Priority claimed from US15/232,808 external-priority patent/US9801282B2/en
Application filed by Ibis Innotech Inc filed Critical Ibis Innotech Inc
Publication of CN107527876A publication Critical patent/CN107527876A/en
Pending legal-status Critical Current

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    • H10W74/10
    • H10W20/20

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  • Pressure Sensors (AREA)

Abstract

The invention provides a packaging structure which comprises a substrate, a sensing chip, a base, a lead frame, a plurality of through holes and a patterned circuit layer. The substrate comprises a component arrangement area and a plurality of electrode contacts. The sensing chip is arranged in the component arrangement area and is electrically connected with the electrode contact through the patterned circuit layer. The base covers the substrate through the joint mask and comprises an accommodating groove, a step part, an extending inclined plane and a plurality of electrodes. The step part protrudes out of the bottom surface of the accommodating groove. The extending inclined plane extends from the top surface of the step part to the joint surface. The electrodes are arranged on the joint surface and are respectively electrically connected with the electrode contacts. The sensing chip is positioned in the accommodating groove. The lead frame is respectively arranged on the base and the substrate. The via hole penetrates through the step part and is electrically connected to the lead frame. The patterned circuit layer is arranged on the extending inclined plane to electrically connect the via hole and the electrode. The packaging structure has simple processing steps and thinner whole thickness.

Description

封装结构Package structure

技术领域technical field

本发明涉及一种封装结构,且特别涉及一种传感芯片的封装结构。The invention relates to a packaging structure, and in particular to a packaging structure of a sensor chip.

背景技术Background technique

随着科技的进步,电子产品无不朝向轻量化与微型化的趋势发展。以麦克风为例,微机电系统传感芯片(MEMS sensors)已广泛地被使用于此领域中。传统的麦克风包括微机电系统传感芯片、用以驱动微机电系统传感芯片的驱动芯片以及用以承载微机电系统传感芯片以及驱动芯片的电路板。电路板除了导电层与介电层之外,还具有一些导电贯孔(conductive through via),且麦克风内的驱动芯片通常会与这些导电贯孔电性连接。With the advancement of technology, all electronic products are developing towards the trend of light weight and miniaturization. Taking a microphone as an example, MEMS sensors have been widely used in this field. A traditional microphone includes a MEMS sensor chip, a driver chip for driving the MEMS sensor chip, and a circuit board for carrying the MEMS sensor chip and the driver chip. In addition to the conductive layer and the dielectric layer, the circuit board also has some conductive through vias, and the driver chip in the microphone is usually electrically connected to these conductive through vias.

在现有技术中,制造者会先分别制作感测组件及用以承载电子组件的线路板。之后,再将感测组件封装在线路板上,以形成感测组件封装结构。此作法不但费工费时,且感测组件封装结构的整体厚度不易降低。因此,如何改善现有的感测组件封装,实为研发者所欲达成的目标之一。In the prior art, the manufacturer first separately manufactures the sensing component and the circuit board for carrying the electronic component. Afterwards, the sensing component is packaged on the circuit board to form a sensing component packaging structure. This method is labor-intensive and time-consuming, and the overall thickness of the sensing element packaging structure is not easy to reduce. Therefore, how to improve the packaging of the existing sensing components is one of the goals that developers want to achieve.

发明内容Contents of the invention

本发明提供一种封装结构,其制程步骤简单且整体厚度较薄。The invention provides a packaging structure with simple manufacturing steps and thin overall thickness.

本发明的一种封装结构包括基板、传感芯片、基座、第一导线架、多个第一导通孔、第一图案化线路层、第二导线架、多个第二导通孔及第二图案化线路层。基板包括组件设置区以及多个电极接点。电极接点设置于组件设置区的一侧。传感芯片设置于组件设置区并与驱动芯片及电极接点电性连接。基座以接合面罩覆于基板上并包括容置凹槽、延伸斜面以及多个电极。延伸斜面连接于容置凹槽的底面与接合面之间。电极设置于接合面并分别与电极接点电性连接。传感芯片位于容置凹槽的对应区域内。第一导线架设置于基座。第一导通孔贯穿基座并电性连接至第一导线架。第一图案化线路层设置于延伸斜面、容置凹槽的底面以及接合面上以电性连接第一导通孔与电极。第二导线架设置于基板。第二导通孔贯穿基板并电性连接至第二导线架。第二图案化线路层设置于基板并电性连接至第二导通孔及电极接点。A packaging structure of the present invention includes a substrate, a sensor chip, a base, a first lead frame, a plurality of first via holes, a first patterned circuit layer, a second lead frame, a plurality of second via holes and The second patterned circuit layer. The substrate includes a component setting area and a plurality of electrode contacts. The electrode contacts are arranged on one side of the component setting area. The sensing chip is arranged in the component setting area and is electrically connected with the driving chip and the electrode contacts. The base is covered on the substrate with a bonding mask and includes a receiving groove, an extending slope and a plurality of electrodes. The extending slope is connected between the bottom surface of the accommodating groove and the joint surface. The electrodes are arranged on the joint surface and electrically connected with the electrode contacts respectively. The sensing chip is located in the corresponding area of the accommodating groove. The first lead frame is disposed on the base. The first via hole passes through the base and is electrically connected to the first lead frame. The first patterned circuit layer is disposed on the extending slope, the bottom surface of the accommodating groove and the joint surface to electrically connect the first via hole and the electrode. The second lead frame is disposed on the substrate. The second via hole penetrates the substrate and is electrically connected to the second lead frame. The second patterned circuit layer is disposed on the substrate and electrically connected to the second via hole and the electrode contact.

在本发明的一实施例中,上述的基座包括阶梯部,突出于容置凹槽的底面,延伸斜面由阶梯部的顶面延伸至接合面,且第一导通孔贯穿阶梯部以电性连接第一导线架。In an embodiment of the present invention, the above-mentioned base includes a stepped portion protruding from the bottom surface of the accommodating groove, the extending inclined surface extends from the top surface of the stepped portion to the bonding surface, and the first via hole penetrates the stepped portion for electrical connection. Sexually connect the first lead frame.

在本发明的一实施例中,上述的基座与基板的材料包括可选择性电镀介电材,其中包括非导电的金属复合物。In an embodiment of the present invention, the above-mentioned base and substrate materials include selectively plateable dielectric materials, including non-conductive metal composites.

在本发明的一实施例中,上述的可选择性电镀介电材包括环氧树脂、聚脂、丙烯酸酯、氟素聚合物、聚亚苯基氧化物、聚酰亚胺、酚醛树脂、聚砜、硅素聚合物、BT树脂(Bismaleimide-Triazine modified epoxy resin)、氰酸聚酯、聚乙烯、聚碳酸酯树脂、丙烯腈-丁二烯-苯乙烯共聚物、聚对苯二甲酸乙二酯(PET)、聚对苯二甲酸丁二酯(PBT)、液晶高分子(liquid crystal polyester,LCP)、聚酰胺(PA)、尼龙6、共聚聚甲醛(POM)、聚苯硫醚(PPS)或环状烯烃共聚物(COC)。In one embodiment of the present invention, the above-mentioned selective plating dielectric material includes epoxy resin, polyester, acrylate, fluoropolymer, polyphenylene oxide, polyimide, phenolic resin, poly Sulfone, silica polymer, BT resin (Bismaleimide-Triazine modified epoxy resin), cyanate polyester, polyethylene, polycarbonate resin, acrylonitrile-butadiene-styrene copolymer, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), liquid crystal polymer (liquid crystal polyester, LCP), polyamide (PA), nylon 6, polyoxymethylene copolymer (POM), polyphenylene sulfide (PPS) Or cyclic olefin copolymer (COC).

在本发明的一实施例中,上述的非导电的金属复合物中的金属包括锌、铜、银、金、镍、钯、铂、钴、铑、铱、铟、铁、锰、铝、铬、钨、钒、钽、钛或其任意组合。In one embodiment of the present invention, the metals in the above-mentioned non-conductive metal compound include zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, iridium, indium, iron, manganese, aluminum, chromium , tungsten, vanadium, tantalum, titanium or any combination thereof.

在本发明的一实施例中,上述的封装结构还包括驱动芯片,设置于基板上,驱动芯片电性连接至传感芯片以及电极接点。In an embodiment of the present invention, the above package structure further includes a driving chip disposed on the substrate, and the driving chip is electrically connected to the sensing chip and the electrode contacts.

在本发明的一实施例中,上述的传感芯片包括微机电系统(microelectromechanical systems,MEMS)传感芯片,驱动芯片包括专用集成电路(application specific integrated circuit,ASIC)。In an embodiment of the present invention, the aforementioned sensor chip includes a microelectromechanical systems (MEMS) sensor chip, and the driver chip includes an application specific integrated circuit (ASIC).

在本发明的一实施例中,上述的基板还包括多个电极开口,电极接点分别内嵌于电极开口,且电极接点的上表面低于基板的接合表面。In an embodiment of the present invention, the above-mentioned substrate further includes a plurality of electrode openings, the electrode contacts are respectively embedded in the electrode openings, and the upper surfaces of the electrode contacts are lower than the bonding surface of the substrate.

在本发明的一实施例中,上述的电极突出于接合面,以与电极开口嵌合并与电极接点接触。In an embodiment of the present invention, the above-mentioned electrodes protrude from the joint surface so as to fit into the electrode openings and contact the electrode contacts.

在本发明的一实施例中,上述的第二导线架包括多个电性连接传感芯片的外部接垫。In an embodiment of the present invention, the above-mentioned second lead frame includes a plurality of external pads electrically connected to the sensor chip.

在本发明的一实施例中,上述的第一导线架包括多个电性连接传感芯片的外部接垫,基座相对于接合面的背面暴露外部接垫。In an embodiment of the present invention, the above-mentioned first lead frame includes a plurality of external pads electrically connected to the sensor chip, and the back surface of the base relative to the bonding surface exposes the external pads.

在本发明的一实施例中,上述的第二导线架覆盖基板背离基座的背面。In an embodiment of the present invention, the above-mentioned second lead frame covers the back surface of the substrate away from the base.

在本发明的一实施例中,上述的封装结构还包括贯孔,贯穿基板及第二导线架,以暴露部分传感芯片。In an embodiment of the present invention, the above package structure further includes a through hole penetrating through the substrate and the second lead frame to expose part of the sensing chip.

在本发明的一实施例中,上述的第二导线架还包括止挡环,环绕贯孔且与贯孔的外周缘维持间距。In an embodiment of the present invention, the above-mentioned second lead frame further includes a stop ring surrounding the through hole and maintaining a distance from the outer peripheral edge of the through hole.

在本发明的一实施例中,上述的封装结构还包括基板接地/屏蔽层及基座接地/屏蔽层,基板接地/屏蔽层覆盖基板的周围侧面并连接第二导线架,基座接地/屏蔽层覆盖基座的周围侧面和/或容置凹槽的内表面,并连接第一导线架。In an embodiment of the present invention, the above package structure further includes a substrate grounding/shielding layer and a base grounding/shielding layer, the substrate grounding/shielding layer covers the peripheral side of the substrate and is connected to the second lead frame, and the base grounding/shielding layer The layer covers the surrounding sides of the base and/or the inner surface of the accommodating groove, and is connected to the first lead frame.

在本发明的一实施例中,上述的第二导线架还包括多个阶梯状通孔,贯穿至该第二导线架,且基板还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各阶梯状通孔包括顶盖部以及连接顶盖部的连接部,顶盖部的最小直径大于连接部的最大直径。In an embodiment of the present invention, the above-mentioned second lead frame further includes a plurality of stepped through holes penetrating to the second lead frame, and the substrate further includes a plurality of stepped protrusions to correspond to the corresponding stepped through holes Fitting, wherein each stepped through hole includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part.

在本发明的一实施例中,上述的第二导线架包括多个电性连接传感芯片的外部接垫。In an embodiment of the present invention, the above-mentioned second lead frame includes a plurality of external pads electrically connected to the sensor chip.

在本发明的一实施例中,上述的第一导线架设置于相对于接合面的背面,并完全覆盖第一导线架的背面。In an embodiment of the present invention, the above-mentioned first lead frame is disposed on the back side relative to the bonding surface, and completely covers the back side of the first lead frame.

在本发明的一实施例中,上述的封装结构,第一导线架还包括多个阶梯状通孔,贯穿至第一导线架,且基座还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各阶梯状通孔包括顶盖部以及连接顶盖部的连接部,顶盖部的最小直径大于连接部的最大直径。In an embodiment of the present invention, in the above-mentioned package structure, the first lead frame further includes a plurality of stepped through holes penetrating to the first lead frame, and the base further includes a plurality of stepped protrusions to correspond to the corresponding steps. The stepped through holes are embedded, wherein each stepped through hole includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part.

在本发明的一实施例中,上述的封装结构还包括黏着胶材,该黏着胶材可为非导电胶或导电胶,设置于接合面与基板之间,以贴合基座与基板。In an embodiment of the present invention, the above-mentioned package structure further includes an adhesive material, which may be non-conductive adhesive or conductive adhesive, and is disposed between the bonding surface and the substrate to bond the base and the substrate.

在本发明的一实施例中,上述的第一图案化线路层的底面低于延伸斜面以及基座的顶面,且第二图案化线路层的底面低于基板的顶面。In an embodiment of the present invention, the bottom surface of the above-mentioned first patterned circuit layer is lower than the extending slope and the top surface of the base, and the bottom surface of the second patterned circuit layer is lower than the top surface of the substrate.

基于上述,本发明的封装结构利用阶梯部的设计将线路有效地连接至基座的接合面及相对接合面的背面,提升线路的设计弹性,并且,阶梯部可用以容置封装结构的驱动芯片,提升封装结构的空间利用率。再者,本发明的基座和/或基板的材料包括可选择性电镀介电材,以利用其可选择性电镀的特性直接于其表面上直接化镀及电镀而形成图案化线路层、第一导通孔或是接垫等导电结构。并且,据此形成的图案化线路层可符合微细线路的标准,还提供了封装结构上的连接线路的设计弹性。并且,可选择性电镀介电材可通过模塑(molding)的方式定型,因此对其厚度及外型上具有较大的设计弹性,进而可轻易将基座/基板的厚度控制在100微米以下,因此,本发明的封装结构不仅可提升其设计弹性,更可轻易符合细线路的标准,且可有效减化制程步骤及降低封装结构的整体厚度。Based on the above, the packaging structure of the present invention utilizes the design of the stepped part to effectively connect the circuit to the joint surface of the base and the back surface of the opposite joint surface, thereby improving the design flexibility of the circuit, and the stepped part can be used to accommodate the driver chip of the package structure , improving the space utilization of the packaging structure. Moreover, the material of the base and/or substrate of the present invention includes a selective electroplating dielectric material, so as to directly form a patterned circuit layer by direct electroplating and electroplating on its surface by utilizing its selective electroplating characteristics. A conductive structure such as a via hole or a pad. Moreover, the patterned circuit layer formed according to this method can meet the standard of fine circuits, and also provides flexibility in the design of the connection circuit on the packaging structure. Moreover, the optional electroplating dielectric material can be shaped by molding, so it has greater design flexibility in its thickness and shape, and the thickness of the base/substrate can be easily controlled below 100 microns Therefore, the packaging structure of the present invention can not only improve its design flexibility, but also easily meet the standard of thin lines, and can effectively reduce the process steps and reduce the overall thickness of the packaging structure.

为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合所示附图作详细说明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

附图说明Description of drawings

图1A是依照本发明的一实施例的一种封装结构的剖面示意图;1A is a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention;

图1B是依照本发明的另一实施例的一种封装结构的剖面示意图;1B is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

图2是依照本发明的一实施例的基座与基板的上视示意图;2 is a schematic top view of a base and a substrate according to an embodiment of the present invention;

图3是依照本发明的一实施例的基座的示意图;3 is a schematic diagram of a base according to an embodiment of the present invention;

图4是依照本发明的一实施例的基座的剖面示意图;4 is a schematic cross-sectional view of a base according to an embodiment of the present invention;

图5是依照本发明的一实施例的基板的剖面示意图;5 is a schematic cross-sectional view of a substrate according to an embodiment of the present invention;

图6是依照本发明的一实施例的基板的示意图;6 is a schematic diagram of a substrate according to an embodiment of the present invention;

图7是依照本发明的一实施例的一种封装结构的底部透视示意图;7 is a schematic bottom perspective view of a packaging structure according to an embodiment of the present invention;

图8是依照本发明的一实施例的一种封装结构的剖面示意图;8 is a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention;

图9是依照本发明的一实施例的一种导线架的上视示意图;FIG. 9 is a schematic top view of a lead frame according to an embodiment of the present invention;

图10是图9的导线架的剖面示意图;Fig. 10 is a schematic cross-sectional view of the lead frame of Fig. 9;

图11是图9的导线架的另一剖面示意图;Fig. 11 is another schematic cross-sectional view of the lead frame of Fig. 9;

图12是图11的导线架与基板结合的剖面示意图;12 is a schematic cross-sectional view of the combination of the lead frame and the substrate of FIG. 11;

图13是图12的导线架与基板结合的上视示意图。FIG. 13 is a schematic top view of the combination of the lead frame and the substrate of FIG. 12 .

附图标记说明:Explanation of reference signs:

100、100a:封装结构100, 100a: package structure

110:基板110: Substrate

112:电极接点112: electrode contact

114:电极开口114: Electrode opening

120:传感芯片120: sensor chip

130:基座130: Base

132:接合面132: joint surface

134:容置凹槽134: accommodating groove

136:阶梯部136: Ladder Department

138:延伸斜面138: Extend Bevel

139:电极139: electrode

140:第一导线架140: first lead frame

144、182:外部接垫144, 182: External pads

142、184:阶梯状通孔142, 184: stepped through holes

142a、184a:顶盖部142a, 184a: top cover part

142b、184b:连接部142b, 184b: connection part

150:第一导通孔150: first via hole

160:第一图案化线路层160: the first patterned circuit layer

170:驱动芯片170: Driver chip

180:第二导线架180: second lead frame

186:止挡环186: stop ring

190:基板接地/屏蔽层190: Substrate ground/shield

192:基座接地/屏蔽层192: Base ground/shield

200:主板200: Motherboard

G1:间距G1: Spacing

GL:黏着胶材GL: adhesive glue

H1:贯孔H1: through hole

具体实施方式detailed description

图1A是依照本发明的一实施例的一种封装结构的剖面示意图。图1B是依照本发明的另一实施例的一种封装结构的剖面示意图。图2是依照本发明的一实施例的基座与基板的上视示意图。请同时参照图1A、图1B至图2,在本实施例中,封装结构100包括基板110、传感芯片120、基座130、第一导线架140、多个第一导通孔150、第一图案化线路层160、第二导线架180、多个第二导通孔189以及第二图案化线路层188。基板110包括组件设置区以及多个电极接点112。电极接点112如图2所示的设置于组件设置区的一侧。传感芯片120设置于组件设置区并与驱动芯片170及电极接点112电性连接。第二导通孔189贯穿基板110并电性连接至第二导线架180,且第二图案化线路层188如图2所示的设置于基板110并电性连接至第二导通孔189及电极接点112。基座130如图1A及图1B所示的以接合面132罩覆于基板110上,其中,基座130包括容置凹槽134、延伸斜面138以及多个电极139。延伸斜面138如图1A所示的由容置凹槽134的底面延伸至基座130的接合面132。第一导线架140设置于基座130。第一导通孔150贯穿基座且电性连接至第一导线架140。FIG. 1A is a schematic cross-sectional view of a package structure according to an embodiment of the present invention. FIG. 1B is a schematic cross-sectional view of a package structure according to another embodiment of the present invention. FIG. 2 is a schematic top view of a base and a substrate according to an embodiment of the invention. Please refer to FIG. 1A, FIG. 1B to FIG. 2 at the same time. In this embodiment, the packaging structure 100 includes a substrate 110, a sensor chip 120, a base 130, a first lead frame 140, a plurality of first via holes 150, a first A patterned circuit layer 160 , a second lead frame 180 , a plurality of second via holes 189 and a second patterned circuit layer 188 . The substrate 110 includes a device arrangement area and a plurality of electrode contacts 112 . The electrode contacts 112 are arranged on one side of the component installation area as shown in FIG. 2 . The sensing chip 120 is disposed in the device arrangement area and is electrically connected to the driving chip 170 and the electrode contacts 112 . The second via hole 189 penetrates the substrate 110 and is electrically connected to the second lead frame 180, and the second patterned circuit layer 188 is disposed on the substrate 110 as shown in FIG. Electrode contacts 112 . As shown in FIGS. 1A and 1B , the base 130 covers the substrate 110 with the bonding surface 132 , wherein the base 130 includes a receiving groove 134 , an extending slope 138 and a plurality of electrodes 139 . The extending slope 138 extends from the bottom surface of the receiving groove 134 to the joint surface 132 of the base 130 as shown in FIG. 1A . The first lead frame 140 is disposed on the base 130 . The first via hole 150 passes through the base and is electrically connected to the first lead frame 140 .

在本实施例中,基座130还可如图1B所示的包括阶梯部136,且阶梯部136突出于容置凹槽134的底面。并且,延伸斜面138如图1B所示的由阶梯部136的顶面延伸至基座130的接合面132。如此配置,第一导通孔150可贯穿阶梯部136以电性连接至第一导线架140。须说明的是,本实施例的阶梯部136可选择性配置,本发明并不以此为限。In this embodiment, the base 130 may further include a stepped portion 136 as shown in FIG. 1B , and the stepped portion 136 protrudes from the bottom surface of the receiving groove 134 . Moreover, the extending inclined surface 138 extends from the top surface of the stepped portion 136 to the joint surface 132 of the base 130 as shown in FIG. 1B . With such a configuration, the first via hole 150 can pass through the stepped portion 136 to be electrically connected to the first lead frame 140 . It should be noted that the stepped portion 136 of this embodiment can be optionally configured, and the present invention is not limited thereto.

在本实施例中,电极139设置于接合面132并分别与基板110的电极接点112电性连接。在本实施例中,基板110可包括多个电极开口114,电极接点112分别内嵌于电极开口114,且电极接点112的上表面低于基板110的接合表面。相应地,基座130的电极139突出于接合面132,以与电极开口114嵌合,并与电极接点112接触,以形成电性连接。在本实施例中,传感芯片120可如图1所示的设置于基板110上并位于容置凹槽134的对应区域内。第一导线架140则设置于基座130,而第一导通孔150则贯穿阶梯部136以电性连接至第一导线架140。如此,第一图案化线路层160设置于延伸斜面138上以电性连接第一导通孔150与电极139。In this embodiment, the electrodes 139 are disposed on the bonding surface 132 and electrically connected to the electrode contacts 112 of the substrate 110 respectively. In this embodiment, the substrate 110 may include a plurality of electrode openings 114 , the electrode contacts 112 are respectively embedded in the electrode openings 114 , and the upper surfaces of the electrode contacts 112 are lower than the bonding surface of the substrate 110 . Correspondingly, the electrodes 139 of the base 130 protrude from the joint surface 132 to fit into the electrode openings 114 and contact the electrode contacts 112 to form an electrical connection. In this embodiment, the sensor chip 120 may be disposed on the substrate 110 as shown in FIG. 1 and located in a corresponding area of the receiving groove 134 . The first lead frame 140 is disposed on the base 130 , and the first via hole 150 passes through the stepped portion 136 to be electrically connected to the first lead frame 140 . In this way, the first patterned circuit layer 160 is disposed on the extending slope 138 to electrically connect the first via hole 150 and the electrode 139 .

图3是依照本发明的一实施例的基座的示意图。图4是依照本发明的一实施例的基座的剖面示意图。请同时参照图3及图4,在本实施例中,基座130和/或基板110的材料包括可选择性电镀介电材,其包括非导电的金属复合物。如此,本实施例的封装结构100可利用可选择性电镀介电材的可选择性电镀的特性,直接于其表面上形成如图1A、图1B及图2所示的第一图案化线路层160,使第一图案化线路层160直接设置于基座130的延伸斜面138、容置凹槽134的底面以及接合面132上,并电性连接对应的电极139及第一导通孔150。在本实施例中,封装结构100还可包括黏着胶材GL,其可为非导电胶或导电胶,设置于接合面132与基板110之间,以贴合基座130与基板110。FIG. 3 is a schematic diagram of a base according to an embodiment of the invention. FIG. 4 is a schematic cross-sectional view of a base according to an embodiment of the invention. Please refer to FIG. 3 and FIG. 4 at the same time. In this embodiment, the material of the base 130 and/or the substrate 110 includes a selective plating dielectric material, which includes a non-conductive metal composite. In this way, the packaging structure 100 of this embodiment can utilize the selective plating characteristics of the selective plating dielectric material to directly form the first patterned circuit layer as shown in FIG. 1A , FIG. 1B and FIG. 2 on its surface. 160 , the first patterned circuit layer 160 is directly disposed on the extending inclined surface 138 of the base 130 , the bottom surface of the accommodating groove 134 and the bonding surface 132 , and is electrically connected to the corresponding electrode 139 and the first via hole 150 . In the present embodiment, the package structure 100 may further include an adhesive material GL, which may be non-conductive glue or conductive glue, disposed between the bonding surface 132 and the substrate 110 to bond the base 130 and the substrate 110 .

具体而言,可选择性电镀介电材可包括环氧树脂、聚脂、丙烯酸酯、氟素聚合物、聚亚苯基氧化物、聚酰亚胺、酚醛树脂、聚砜、硅素聚合物、BT树脂(Bismaleimide-Triazinemodified epoxy resin)、氰酸聚酯、聚乙烯、聚碳酸酯树脂、丙烯腈-丁二烯-苯乙烯共聚物、聚对苯二甲酸乙二酯(PET)、聚对苯二甲酸丁二酯(PBT)、液晶高分子(liquid crystalpolyester,LCP)、聚酰胺(PA)、尼龙6、共聚聚甲醛(POM)、聚苯硫醚(PPS)或环状烯烃共聚物(COC)等。非导电的金属复合物中的金属则可包括锌、铜、银、金、镍、钯、铂、钴、铑、铱、铟、铁、锰、铝、铬、钨、钒、钽、钛或其任意组合。Specifically, the selective plating dielectric material may include epoxy resin, polyester, acrylate, fluoropolymer, polyphenylene oxide, polyimide, phenolic resin, polysulfone, silica polymer, BT resin (Bismaleimide-Triazinemodified epoxy resin), cyanate polyester, polyethylene, polycarbonate resin, acrylonitrile-butadiene-styrene copolymer, polyethylene terephthalate (PET), polyethylene terephthalate Butylenedicarboxylate (PBT), liquid crystal polymer (liquid crystalpolyester, LCP), polyamide (PA), nylon 6, polyoxymethylene copolymer (POM), polyphenylene sulfide (PPS) or cyclic olefin copolymer (COC )Wait. Metals in non-conductive metal complexes may include zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, iridium, indium, iron, manganese, aluminum, chromium, tungsten, vanadium, tantalum, titanium or any combination thereof.

详细来说,于基座130的延伸斜面138选择性地电镀而形成第一图案化线路层160的步骤可包括:在基座130的延伸斜面138上以雷射沿着欲形成第一图案化线路层160的路径刻出对应第一图案化线路层160的线路沟槽,使此线路沟槽上的非导电的金属复合物破坏而释放对还原金属化具有高活性的重金属晶核,接着,再对雷射后的可选择性电镀介电材进行选择性电镀,以在线路沟槽上直接化镀及电镀而形成第一图案化线路层160。因此,依上述制程所形成的第一图案化线路层160内嵌于基座130的延伸斜面138,且基座130的延伸斜面138暴露第一图案化线路层160的上表面。并且,由于本实施例是利用雷射直接在基座130的延伸斜面138上刻出对应第一图案化线路层160的线路沟槽,再于线路沟槽上直接化镀及电镀而形成第一图案化线路层160,因此,第一图案化线路层160的上表面可低于基座130的延伸斜面138,或是与基座130的延伸斜面138共平面。在本实施例中,第一图案化线路层160的底面低于延伸斜面138以及基座130的顶面。相似地,第二图案化线路层188的底面低于基板110的顶面。并且,依此方式直接于基座130的表面上所形成的各种图案化线路层的上表面皆可低于基座130的表面,或是与基座130的表面共平面。当然,本实施例仅用以举例说明而并非以此为限。In detail, the step of forming the first patterned circuit layer 160 by electroplating selectively on the extended inclined surface 138 of the base 130 may include: using laser on the extended inclined surface 138 of the base 130 to form the first patterned circuit layer. The path of the wiring layer 160 is carved out corresponding to the wiring groove of the first patterned wiring layer 160, so that the non-conductive metal compound on the wiring groove is destroyed and the heavy metal crystal nucleus having high activity for reduction metallization is released, and then, Selective plating is then performed on the selective plating dielectric material after laser, so as to form the first patterned circuit layer 160 directly on the circuit trench by chemical plating and electroplating. Therefore, the first patterned circuit layer 160 formed according to the above process is embedded in the extended slope 138 of the base 130 , and the extended slope 138 of the base 130 exposes the upper surface of the first patterned circuit layer 160 . Moreover, since this embodiment utilizes laser to directly engrave circuit grooves corresponding to the first patterned circuit layer 160 on the extended inclined surface 138 of the base 130, and then directly electroplating and electroplating on the circuit grooves to form the first The patterned wiring layer 160 , therefore, the upper surface of the first patterned wiring layer 160 may be lower than the extending inclined surface 138 of the base 130 , or be coplanar with the extending inclined surface 138 of the base 130 . In this embodiment, the bottom surface of the first patterned circuit layer 160 is lower than the extending slope 138 and the top surface of the base 130 . Similarly, the bottom surface of the second patterned circuit layer 188 is lower than the top surface of the substrate 110 . Moreover, the top surfaces of various patterned circuit layers formed directly on the surface of the base 130 in this way can be lower than the surface of the base 130 or be coplanar with the surface of the base 130 . Certainly, this embodiment is only used for illustration and is not limited thereto.

并且,本实施例可利用模具成形的方式来模塑形成封装结构100中的基座130和/或基板110,因此,基座130和/或基板110的厚度及形状可依产品需求而自由调整,因此,本实施例的封装结构100不仅可简化制程,提升设计的弹性,并且,封装结构100的最大厚度更可有效降低。Moreover, in this embodiment, the base 130 and/or the substrate 110 in the package structure 100 can be molded by mold forming, so the thickness and shape of the base 130 and/or the substrate 110 can be freely adjusted according to product requirements. Therefore, the packaging structure 100 of this embodiment not only simplifies the manufacturing process, improves the flexibility of the design, but also effectively reduces the maximum thickness of the packaging structure 100 .

图5是依照本发明的一实施例的基板的剖面示意图。图6是依照本发明的一实施例的基板的示意图。请同时参照图1A、图1B、图5及图6,详细而言,本实施例的封装结构100还可包括驱动芯片170,其设置于基板110上并对应阶梯部136,驱动芯片170可例如通过多条导线电性连接至传感芯片120以及电极接点112。具体而言,在本实施例中,封装结构100可为MEMS麦克风封装结构,如此,传感芯片120则可为微机电系统(microelectromechanicalsystems,MEMS)传感芯片,而驱动芯片170则可为用以驱动MEMS传感芯片的专用集成电路(application specific integrated circuit,ASIC)。封装结构100还可包括贯孔H1,其贯穿基板110,以暴露部分传感芯片120。在本实施例中,贯孔H1可为MEMS麦克风封装结构的音孔。当然,本实施例仅用以举例说明,本发明并不限制封装结构100的应用范围。FIG. 5 is a schematic cross-sectional view of a substrate according to an embodiment of the invention. FIG. 6 is a schematic diagram of a substrate according to an embodiment of the invention. Please refer to FIG. 1A, FIG. 1B, FIG. 5 and FIG. 6 at the same time. In detail, the package structure 100 of this embodiment may also include a driver chip 170, which is disposed on the substrate 110 and corresponds to the stepped portion 136. The driver chip 170 may be, for example, It is electrically connected to the sensor chip 120 and the electrode contacts 112 through a plurality of wires. Specifically, in this embodiment, the package structure 100 can be a MEMS microphone package structure, so the sensor chip 120 can be a microelectromechanical system (microelectromechanicalsystems, MEMS) sensor chip, and the drive chip 170 can be used for An application specific integrated circuit (ASIC) that drives a MEMS sensor chip. The package structure 100 may further include a through hole H1 penetrating through the substrate 110 to expose part of the sensing chip 120 . In this embodiment, the through hole H1 may be a sound hole of the package structure of the MEMS microphone. Of course, this embodiment is only used for illustration, and the present invention does not limit the scope of application of the package structure 100 .

图7是依照本发明的一实施例的一种封装结构的底部透视示意图。请参照图1A、图1B及图7,在本实施例中,第一导线架140可包括多个电性连接传感芯片120的外部接垫144,基座130相对于接合面132的背面133暴露外部接垫144。如此,如图1A及图1B所示的封装结构100便可通过基座130上的外部接垫144而电性连接至外部电子组件,例如:主板。FIG. 7 is a schematic bottom perspective view of a packaging structure according to an embodiment of the present invention. Please refer to FIG. 1A, FIG. 1B and FIG. 7. In this embodiment, the first lead frame 140 may include a plurality of external pads 144 electrically connected to the sensor chip 120, and the back surface 133 of the base 130 is opposite to the bonding surface 132. External pads 144 are exposed. In this way, the package structure 100 shown in FIGS. 1A and 1B can be electrically connected to external electronic components, such as a motherboard, through the external pads 144 on the base 130 .

在本实施例中,第二导线架180设置于基板110且第二导线架180可为金属层,以至少大部分覆盖基板110背离基座130的背面。前述的贯孔H1则贯穿基板110及第二导线架180,以暴露部分传感芯片120。此外,在本实施例中,封装结构100还可包括基板接地/屏蔽层190,其如图1A及图1B所示的覆盖基板110的周围侧面并连接第二导线架180。如此,在传感芯片120的封装与使用过程中,当静电累积至一定程度而产生放电现象时,由于驱动芯片170与第一导通孔150电性连接,故驱动芯片170很容易受到静电放电的影响而被损害,因此,上述的第二导线架180及基板接地/屏蔽层190可作为接地层或电磁屏蔽层之用,以降低静电放电及电磁干扰的影响。并且,基座130还可包括基座接地/屏蔽层192,其覆盖基座130的周围侧面和/或容置凹槽134的内表面,以达到接地和/或电磁屏蔽的效果。In this embodiment, the second lead frame 180 is disposed on the substrate 110 and the second lead frame 180 may be a metal layer to cover at least most of the back surface of the substrate 110 facing away from the base 130 . The aforementioned through hole H1 penetrates through the substrate 110 and the second lead frame 180 to expose part of the sensing chip 120 . In addition, in this embodiment, the package structure 100 may further include a substrate grounding/shielding layer 190 , which covers the peripheral side of the substrate 110 and connects to the second lead frame 180 as shown in FIGS. 1A and 1B . In this way, during the packaging and use of the sensing chip 120, when the static electricity accumulates to a certain extent and discharge occurs, since the driving chip 170 is electrically connected to the first via hole 150, the driving chip 170 is easily subjected to electrostatic discharge. Therefore, the above-mentioned second lead frame 180 and substrate grounding/shielding layer 190 can be used as a grounding layer or an electromagnetic shielding layer to reduce the influence of electrostatic discharge and electromagnetic interference. Moreover, the base 130 may further include a base grounding/shielding layer 192 covering the surrounding sides of the base 130 and/or the inner surface of the receiving groove 134 to achieve grounding and/or electromagnetic shielding effects.

具体而言,基板接地/屏蔽层190的作法可例如先将基板110以模具成型的方式形成于第二导线架180上,并利用雷射对基板110材料中的非导电金属复合物进行金属化。之后再对基板110进行电镀以形成电极接点112及覆盖基板110的周围侧面的基板接地/屏蔽层190。基座接地/屏蔽层192还可利用相似于上述的作法制成。Specifically, the grounding/shielding layer 190 of the substrate can be formed, for example, by molding the substrate 110 on the second lead frame 180 first, and using laser to metallize the non-conductive metal compound in the substrate 110 material. . The substrate 110 is then electroplated to form electrode contacts 112 and a substrate grounding/shielding layer 190 covering the surrounding sides of the substrate 110 . Base ground/shield layer 192 can also be formed using a method similar to that described above.

此外,为了防止基板110与第二导线架180发生脱层(de-lamination)的情形,第二导线架180还可包括多个如图1A及图1B所示的阶梯状通孔184,贯穿至第二导线架180,其中,各阶梯状通孔184包括顶盖部184a以及连接顶盖部184a的连接部184b。顶盖部184a的最小直径大于连接部184b的最大直径。如此,通过模具成型的方式形成基板110于第二导线架180上时,基板110便可填入阶梯状通孔184内,也就是说,基板110会对应包括多个阶梯状凸起以与对应的阶梯状通孔184嵌合。如此,封装结构100便可通过阶梯状通孔184来增强基板110与第二导线架180之间的结合力,减少脱层的情形发生。In addition, in order to prevent de-lamination between the substrate 110 and the second lead frame 180, the second lead frame 180 may further include a plurality of stepped through holes 184 as shown in FIG. 1A and FIG. In the second lead frame 180 , each stepped through hole 184 includes a top cover portion 184 a and a connecting portion 184 b connecting the top cover portion 184 a. The smallest diameter of the top cover portion 184a is larger than the largest diameter of the connection portion 184b. In this way, when the substrate 110 is formed on the second lead frame 180 by mold molding, the substrate 110 can be filled into the stepped through hole 184, that is to say, the substrate 110 will include a plurality of stepped protrusions corresponding to the corresponding The stepped through hole 184 fits. In this way, the package structure 100 can enhance the bonding force between the substrate 110 and the second lead frame 180 through the stepped through hole 184 to reduce the occurrence of delamination.

同样地,第一导线架140还可包括阶梯状通孔142,其结构相同于阶梯状通孔184。如此,通过模具成型的方式形成基座130于第一导线架140上时,基座130便可填入阶梯状通孔142内,以与对应的阶梯状通孔142嵌合。封装结构100便可通过阶梯状通孔142来增强基座130与第一导线架140之间的结合力,减少脱层的情形发生。Likewise, the first lead frame 140 may further include a stepped through hole 142 whose structure is the same as that of the stepped through hole 184 . In this way, when the base 130 is formed on the first lead frame 140 by mold molding, the base 130 can be filled into the stepped through holes 142 to fit with the corresponding stepped through holes 142 . The package structure 100 can enhance the bonding force between the base 130 and the first lead frame 140 through the stepped through hole 142 to reduce delamination.

图8是依照本发明的一实施例的一种封装结构的剖面示意图。在此必须说明的是,本实施例的封装结构100a与图1A及图1B的封装结构100相似,因此,本实施例沿用前述实施例的组件标号与部分内容,其中采用相同的标号来表示相同或近似的组件,并且省略了相同技术内容的说明。关于省略部分的说明可参考前述实施例,本实施例不再重复赘述。请参照图8,以下将针对本实施例的封装结构100a与图1A及图1B的封装结构100的差异做说明。FIG. 8 is a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention. It must be noted here that the packaging structure 100a of this embodiment is similar to the packaging structure 100 of FIG. 1A and FIG. or similar components, and descriptions of the same technical content are omitted. For the description of the omitted part, reference may be made to the foregoing embodiments, and this embodiment will not be repeated. Referring to FIG. 8 , the following will describe the differences between the package structure 100 a of this embodiment and the package structure 100 shown in FIGS. 1A and 1B .

在本实施例中,封装结构100a包括第二导线架180,其设置于基板110并包括多个电性连接传感芯片120的外部接垫182。如此,封装结构100a便可如图8所示的通过基板110上的外部接垫182而电性连接至外部电子组件,例如:主板200。在这样的结构配置下,第一导线架140设置于相对于接合面132的背面,且第一导线架140可为金属层,以至少大部分覆盖第一导线架140的背面。此外,封装结构100a还可包括基座接地/屏蔽层192,其覆盖基座130的周围侧面和/或容置凹槽134的内表面,并连接第一导线架140。如此,在传感芯片120的封装与使用过程中,当静电累积至一定程度而产生放电现象时,由于驱动芯片170与第一导通孔150电性连接,故驱动芯片170很容易受到静电放电的影响而被损害,因此,上述的第一导线架140及基座接地/屏蔽层192可作为接地层或电磁屏蔽层之用,以降低静电放电及电磁干扰的影响。并且,基板110还可包括基板接地/屏蔽层190,其完全覆盖基板110的周围侧面以达到接地和/或电磁屏蔽的效果。In this embodiment, the packaging structure 100 a includes a second lead frame 180 disposed on the substrate 110 and including a plurality of external pads 182 electrically connected to the sensing chip 120 . In this way, the package structure 100 a can be electrically connected to an external electronic component, such as a motherboard 200 , through the external pad 182 on the substrate 110 as shown in FIG. 8 . Under such a structural configuration, the first lead frame 140 is disposed on the back side relative to the bonding surface 132 , and the first lead frame 140 may be a metal layer to cover at least most of the back side of the first lead frame 140 . In addition, the package structure 100 a may further include a base ground/shield layer 192 covering the peripheral side of the base 130 and/or the inner surface of the receiving groove 134 and connected to the first lead frame 140 . In this way, during the packaging and use of the sensing chip 120, when the static electricity accumulates to a certain extent and discharge occurs, since the driving chip 170 is electrically connected to the first via hole 150, the driving chip 170 is easily subjected to electrostatic discharge. Therefore, the above-mentioned first lead frame 140 and base ground/shield layer 192 can be used as a ground layer or an electromagnetic shielding layer to reduce the influence of electrostatic discharge and electromagnetic interference. Moreover, the substrate 110 may further include a substrate grounding/shielding layer 190 that completely covers the surrounding sides of the substrate 110 to achieve grounding and/or electromagnetic shielding effects.

具体而言,基座接地/屏蔽层192的作法可例如先将基座130以模具成型的方式形成于第一导线架140上,并利用雷射对基座130材料中的非导电金属复合物进行金属化。之后再对基座130进行电镀以形成电极139、第一图案化线路层160及覆盖基座130的周围侧面和/或容置凹槽134的内表面的基座接地/屏蔽层192。基板接地/屏蔽层190还可利用相似于上述的作法制成。Specifically, the grounding/shielding layer 192 of the base can be formed on the first lead frame 140 by molding the base 130 firstly, and the non-conductive metal compound in the material of the base 130 is treated with a laser. Metallize. Then, electroplating is performed on the base 130 to form the electrodes 139 , the first patterned circuit layer 160 and the base grounding/shielding layer 192 covering the surrounding sides of the base 130 and/or the inner surface of the receiving groove 134 . Substrate ground/shield layer 190 can also be formed using a method similar to that described above.

此外,为了防止基座130与层状的第一导线架140发生脱层的情形,第一导线架140还可包括多个如图1A及图1B所示的阶梯状通孔142,其设置于第一导线架140,其中,各阶梯状通孔142包括顶盖部142a以及连接顶盖部142a的连接部142b。顶盖部142a的最小直径大于连接部142b的最大直径。如此,通过模具成型的方式形成基座130于第一导线架140上时,基座130便可填入阶梯状通孔142内,也就是说,基座130会对应包括多个阶梯状凸起以与对应的阶梯状通孔142嵌合。如此,封装结构100a便可通过阶梯状通孔142来增强基座130与第一导线架140之间的结合力,减少脱层的情形发生。In addition, in order to prevent delamination between the base 130 and the layered first lead frame 140, the first lead frame 140 may further include a plurality of stepped through holes 142 as shown in FIG. 1A and FIG. The first lead frame 140 , wherein each stepped through hole 142 includes a top cover portion 142 a and a connection portion 142 b connecting the top cover portion 142 a. The smallest diameter of the top cover portion 142a is greater than the largest diameter of the connecting portion 142b. In this way, when the base 130 is formed on the first lead frame 140 by molding, the base 130 can be filled into the stepped through hole 142, that is to say, the base 130 will correspondingly include a plurality of stepped protrusions. To fit with the corresponding stepped through hole 142 . In this way, the package structure 100a can enhance the bonding force between the base 130 and the first lead frame 140 through the stepped through hole 142 to reduce the occurrence of delamination.

同样地,第二导线架180还可包括阶梯状通孔184,其结构相同于阶梯状通孔142。如此,通过模具成型的方式形成基板110于第二导线架180上时,基板110便可填入阶梯状通孔184内,以与对应的阶梯状通孔184嵌合。封装结构100a便可通过阶梯状通孔184来增强基板110与第二导线架180之间的结合力,减少脱层的情形发生。Likewise, the second lead frame 180 may further include a stepped through hole 184 whose structure is the same as that of the stepped through hole 142 . In this way, when the substrate 110 is formed on the second lead frame 180 by molding, the substrate 110 can be filled into the stepped through holes 184 to be fitted into the corresponding stepped through holes 184 . The package structure 100a can enhance the bonding force between the substrate 110 and the second lead frame 180 through the stepped through hole 184, thereby reducing the occurrence of delamination.

图9是依照本发明的一实施例的一种导线架的上视示意图。图10是图9的导线架的剖面示意图。图11是图9的导线架的另一剖面示意图。请先参照图9至图11,详细而言,本实施例的第二导线架180可包括多个如图9所示的多个阶梯状通孔184以及止挡环186,其如图9所示的环绕贯孔H1且与贯孔H1的外周缘维持间距G1,通过止挡环186的设置,可以防止在通过模具成型的方式灌胶以形成基板110于第二导线架180上时发生溢胶而使胶体流入贯孔H1内的问题。FIG. 9 is a schematic top view of a lead frame according to an embodiment of the present invention. FIG. 10 is a schematic cross-sectional view of the lead frame in FIG. 9 . FIG. 11 is another schematic cross-sectional view of the lead frame in FIG. 9 . Please refer to FIGS. 9 to 11 first. In detail, the second lead frame 180 of this embodiment may include a plurality of stepped through holes 184 and stop rings 186 as shown in FIG. 9 , which are shown in FIG. 9 Surrounding the through hole H1 as shown and maintaining a distance G1 from the outer periphery of the through hole H1, the setting of the stop ring 186 can prevent overflow when the glue is poured to form the substrate 110 on the second lead frame 180 through mold molding. Glue to make the colloid flow into the through hole H1.

图12是图11的导线架与基板结合的剖面示意图。图13是图12的导线架与基板结合的上视示意图。须说明的是,为了更清楚区分导线架与基板,图12及图13中的导线架区域以斜线标示。请同时参照图12及图13,在本实施例中,阶梯状通孔184可贯穿至第二导线架180,其中,各阶梯状通孔184包括顶盖部184a以及连接顶盖部184a的连接部184b。连接部184b可例如位于面向基座130的表面,顶盖部184a则位于背离基座130的表面,且顶盖部184a的最小直径大于连接部184b的最大直径。如此,通过模具成型的方式由图12所示的箭头方向灌胶,以形成基板110于第二导线架180上时,胶体便可填入阶梯状通孔184内,以形成与第二导线架180的阶梯状通孔184彼此嵌合的基板110,因而可增强基板110与第二导线架180之间的结合力,减少脱层的情形发生。综上所述,本发明的封装结构利用阶梯部的设计将线路有效地连接至基座的接合面及相对接合面的背面,提升线路的设计弹性,并且,阶梯部可用以容置封装结构的驱动芯片,提升封装结构的空间利用率。此外,本发明的基座和/或基板的材料包括可选择性电镀介电材,以利用其可选择性电镀的特性直接于其表面上直接化镀及电镀而形成图案化线路层、导通孔或是接垫等导电结构。并且,据此形成的图案化线路层可符合微细线路的标准,还提供了封装结构上的连接线路的设计弹性。并且,可选择性电镀介电材可通过模塑(molding)的方式定型,故对其厚度及外型上具有较大的设计弹性,进而可轻易将基座/基板的厚度控制在100微米以下,因此,本发明的封装结构不仅可提升其设计弹性,还可轻易符合细线路的标准,且可有效减化制程步骤及降低封装结构的整体厚度。FIG. 12 is a schematic cross-sectional view of the combination of the lead frame and the substrate of FIG. 11 . FIG. 13 is a schematic top view of the combination of the lead frame and the substrate of FIG. 12 . It should be noted that, in order to distinguish the lead frame and the substrate more clearly, the area of the lead frame in FIG. 12 and FIG. 13 is marked with oblique lines. Please refer to FIG. 12 and FIG. 13 at the same time. In this embodiment, the stepped through holes 184 can penetrate to the second lead frame 180, wherein each stepped through hole 184 includes a top cover portion 184a and a connection connecting the top cover portion 184a. Section 184b. The connection portion 184b may be located on a surface facing the base 130 , and the top cover portion 184a is located on a surface facing away from the base 130 , and the smallest diameter of the top cover portion 184a is greater than the largest diameter of the connecting portion 184b. In this way, when the substrate 110 is poured in the direction of the arrow shown in FIG. The stepped through-holes 184 of 180 fit the substrate 110 with each other, thereby enhancing the bonding force between the substrate 110 and the second lead frame 180 and reducing the occurrence of delamination. In summary, the packaging structure of the present invention utilizes the design of the stepped portion to effectively connect the circuit to the bonding surface of the base and the back surface of the opposite bonding surface, thereby improving the design flexibility of the circuit, and the stepped portion can be used to accommodate the package structure. Drive the chip and improve the space utilization of the packaging structure. In addition, the material of the base and/or the substrate of the present invention includes a selective electroplating dielectric material, so as to directly form a patterned circuit layer, conduction, etc. Conductive structures such as holes or pads. Moreover, the patterned circuit layer formed according to this method can meet the standard of fine circuits, and also provides flexibility in the design of the connection circuit on the packaging structure. Moreover, the optional electroplating dielectric material can be shaped by molding, so it has greater design flexibility in its thickness and shape, and can easily control the thickness of the base/substrate below 100 microns Therefore, the packaging structure of the present invention can not only improve its design flexibility, but also easily meet the standard of thin lines, and can effectively reduce the process steps and reduce the overall thickness of the packaging structure.

虽然本发明已以实施例揭示如上,然其并非用以限定本发明,任何所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,当可作些许的更改与润饰,故本发明的保护范围当视权利要求范围所界定的为准。Although the present invention has been disclosed as above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the claims.

Claims (25)

1.一种封装结构,其特征在于,包括:1. A packaging structure, characterized in that, comprising: 基板,包括组件设置区以及多个电极接点,多个所述电极接点设置于该组件设置区的一侧;The substrate includes a component setting area and a plurality of electrode contacts, and the plurality of electrode contacts are set on one side of the component setting area; 传感芯片,设置于该组件设置区并与多个所述电极接点电性连接;A sensor chip is arranged in the component setting area and is electrically connected to a plurality of the electrode contacts; 基座,以接合面罩覆于该基板上并包括容置凹槽、延伸斜面以及多个电极,该延伸斜面连接于该容置凹槽的底面与该接合面之间,多个所述电极设置于该接合面并分别与多个所述电极接点电性连接,该传感芯片位于该容置凹槽的对应区域内;The base is covered on the substrate with a bonding mask and includes an accommodating groove, an extending slope and a plurality of electrodes, the extending slope is connected between the bottom surface of the accommodating groove and the bonding surface, and the plurality of electrodes are arranged The sensor chip is located in the corresponding area of the accommodating groove on the bonding surface and is electrically connected to a plurality of the electrode contacts respectively; 第一导线架,设置于该基座;以及a first lead frame disposed on the base; and 多个第一导通孔,贯穿该基座并电性连接至该第一导线架;以及a plurality of first via holes passing through the base and electrically connected to the first lead frame; and 第一图案化线路层,设置于该延伸斜面上以电性连接多个所述第一导通孔与多个所述电极;a first patterned circuit layer, disposed on the extending slope to electrically connect a plurality of the first via holes and a plurality of the electrodes; 第二导线架,设置于该基板;a second lead frame disposed on the substrate; 多个第二导通孔,贯穿该基板并电性连接至该第二导线架;以及a plurality of second via holes penetrating through the substrate and electrically connected to the second lead frame; and 第二图案化线路层,设置于该基板并电性连接至多个所述第二导通孔及多个所述电极接点。The second patterned circuit layer is arranged on the substrate and electrically connected to the plurality of second via holes and the plurality of electrode contacts. 2.根据权利要求1所述的封装结构,其特征在于,该基座包括阶梯部,突出于该容置凹槽的该底面,该延伸斜面由该阶梯部的顶面延伸至该接合面,且多个所述第一导通孔贯穿该阶梯部以电性连接该第一导线架。2. The packaging structure according to claim 1, wherein the base comprises a stepped portion protruding from the bottom surface of the accommodating groove, the extending inclined surface extends from the top surface of the stepped portion to the bonding surface, And a plurality of first via holes penetrate through the stepped portion to electrically connect the first lead frame. 3.根据权利要求1所述的封装结构,其特征在于,该基座与该基板的材料包括可选择性电镀介电材,其中包括非导电的金属复合物。3. The package structure according to claim 1, wherein the material of the base and the substrate comprises a selectively plateable dielectric material including a non-conductive metal compound. 4.根据权利要求3所述的封装结构,其特征在于,该可选择性电镀介电材包括环氧树脂、聚脂、丙烯酸酯、氟素聚合物、聚亚苯基氧化物、聚酰亚胺、酚醛树脂、聚砜、硅素聚合物、双马来酰亚胺-三嗪树脂、氰酸聚酯、聚乙烯、聚碳酸酯树脂、丙烯腈-丁二烯-苯乙烯共聚物、聚对苯二甲酸乙二酯、聚对苯二甲酸丁二酯、液晶高分子、聚酰胺、尼龙6、共聚聚甲醛、聚苯硫醚或环状烯烃共聚物。4. The packaging structure according to claim 3, characterized in that, the selective plating dielectric material comprises epoxy resin, polyester, acrylate, fluoropolymer, polyphenylene oxide, polyimide Amine, phenolic resin, polysulfone, silica polymer, bismaleimide-triazine resin, cyanate polyester, polyethylene, polycarbonate resin, acrylonitrile-butadiene-styrene copolymer, polypara Ethylene phthalate, polybutylene terephthalate, liquid crystal polymer, polyamide, nylon 6, polyoxymethylene copolymer, polyphenylene sulfide or cyclic olefin copolymer. 5.根据权利要求3所述的封装结构,其特征在于,该非导电的金属复合物中的金属包括锌、铜、银、金、镍、钯、铂、钴、铑、铱、铟、铁、锰、铝、铬、钨、钒、钽、钛或其任意组合。5. The packaging structure according to claim 3, wherein the metal in the non-conductive metal compound comprises zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, iridium, indium, iron , manganese, aluminum, chromium, tungsten, vanadium, tantalum, titanium or any combination thereof. 6.根据权利要求1所述的封装结构,其特征在于,还包括驱动芯片,设置于该基板上,该驱动芯片电性连接至该传感芯片以及多个所述电极接点。6 . The package structure according to claim 1 , further comprising a driving chip disposed on the substrate, the driving chip being electrically connected to the sensor chip and the plurality of electrode contacts. 7.根据权利要求6所述的封装结构,其特征在于,该传感芯片包括微机电系统传感芯片,该驱动芯片包括专用集成电路。7 . The package structure according to claim 6 , wherein the sensor chip comprises a MEMS sensor chip, and the driving chip comprises an application specific integrated circuit. 8.根据权利要求1所述的封装结构,其特征在于,该基板还包括多个电极开口,多个所述电极接点分别内嵌于多个所述电极开口,且多个所述电极接点的上表面低于该基板的接合表面。8. The package structure according to claim 1, wherein the substrate further comprises a plurality of electrode openings, a plurality of the electrode contacts are respectively embedded in the plurality of electrode openings, and the plurality of electrode contacts The upper surface is lower than the bonding surface of the substrate. 9.根据权利要求8所述的封装结构,其特征在于,多个所述电极突出于该接合面,以与多个所述电极开口嵌合并与多个所述电极接点接触。9 . The package structure according to claim 8 , wherein a plurality of the electrodes protrude from the bonding surface to fit into the plurality of electrode openings and contact with the plurality of electrode contacts. 10.根据权利要求1所述的封装结构,其特征在于,该第一导线架包括多个电性连接该传感芯片的外部接垫,该基座相对于该接合面的背面暴露多个所述外部接垫。10. The package structure according to claim 1, wherein the first lead frame comprises a plurality of external pads electrically connected to the sensor chip, and the backside of the base relative to the bonding surface exposes a plurality of the bonding pads. described external pads. 11.根据权利要求10所述的封装结构,其特征在于,该第二导线架覆盖该基板背离该基座的背面。11. The package structure according to claim 10, wherein the second lead frame covers the back surface of the substrate facing away from the base. 12.根据权利要求11所述的封装结构,其特征在于,还包括基板接地/屏蔽层以及基座接地/屏蔽层,该基板接地/屏蔽层覆盖该基板的周围侧面并连接该第二导线架,该基座接地/屏蔽层覆盖该基座的周围侧面和/或该容置凹槽的内表面,并连接该第一导线架。12. The package structure according to claim 11, further comprising a substrate ground/shield layer and a base ground/shield layer, the substrate ground/shield layer covers the peripheral side of the substrate and is connected to the second lead frame , the base grounding/shielding layer covers the surrounding sides of the base and/or the inner surface of the receiving groove, and is connected to the first lead frame. 13.根据权利要求11所述的封装结构,其特征在于,该第二导线架还包括多个阶梯状通孔,其贯穿该第二导线架,且该基板还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各该阶梯状通孔包括顶盖部以及连接该顶盖部的连接部,该顶盖部的最小直径大于该连接部的最大直径。13. The package structure according to claim 11, wherein the second lead frame further comprises a plurality of stepped through holes penetrating through the second lead frame, and the substrate further comprises a plurality of stepped protrusions to Fitting with the corresponding stepped through holes, wherein each of the stepped through holes includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part. 14.根据权利要求10所述的封装结构,其特征在于,该第一导线架还包括多个阶梯状通孔,其贯穿至该第一导线架,且该基座还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各该阶梯状通孔包括顶盖部以及连接该顶盖部的连接部,该顶盖部的最小直径大于该连接部的最大直径。14. The package structure according to claim 10, wherein the first lead frame further comprises a plurality of stepped through holes, which penetrate to the first lead frame, and the base further comprises a plurality of stepped protrusions To fit with the corresponding stepped through holes, wherein each of the stepped through holes includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part. 15.根据权利要求11所述的封装结构,其特征在于,还包括贯孔,贯穿该基板及该第二导线架,以暴露部分该传感芯片。15. The package structure according to claim 11, further comprising a through hole penetrating through the substrate and the second lead frame to expose part of the sensor chip. 16.根据权利要求15所述的封装结构,其特征在于,该第二导线架还包括止挡环,环绕该贯孔且与该贯孔的外周缘维持间距。16 . The package structure according to claim 15 , wherein the second lead frame further comprises a stop ring surrounding the through hole and maintaining a distance from the outer periphery of the through hole. 17.根据权利要求1所述的封装结构,其特征在于,该第二导线架包括多个电性连接该传感芯片的外部接垫。17. The package structure according to claim 1, wherein the second lead frame comprises a plurality of external pads electrically connected to the sensor chip. 18.根据权利要求17所述的封装结构,其特征在于,还包括贯孔,贯穿该基板及该第二导线架,以暴露部分该传感芯片。18. The package structure according to claim 17, further comprising a through hole penetrating through the substrate and the second lead frame to expose part of the sensor chip. 19.根据权利要求18所述的封装结构,其特征在于,该第二导线架还包括止挡环,环绕该贯孔且与该贯孔的外周缘维持间距。19. The package structure according to claim 18, wherein the second lead frame further comprises a stop ring surrounding the through hole and maintaining a distance from the outer periphery of the through hole. 20.根据权利要求17所述的封装结构,其特征在于,该第一导线架设置于相对于该接合面的背面,并覆盖该第一导线架的该背面。20 . The package structure according to claim 17 , wherein the first lead frame is disposed on the back side relative to the bonding surface and covers the back side of the first lead frame. 21 . 21.根据权利要求20所述的封装结构,其特征在于,还包括基板接地/屏蔽层以及基座接地/屏蔽层,该基板接地/屏蔽层覆盖该基板的周围侧面并连接该第二导线架,该基座接地/屏蔽层覆盖该基座的周围侧面和/或该容置凹槽的内表面,并连接该第一导线架。21. The package structure according to claim 20, further comprising a substrate ground/shield layer and a base ground/shield layer, the substrate ground/shield layer covers the peripheral side of the substrate and is connected to the second lead frame , the base grounding/shielding layer covers the surrounding sides of the base and/or the inner surface of the receiving groove, and is connected to the first lead frame. 22.根据权利要求20所述的封装结构,其特征在于,该第一导线架还包括多个阶梯状通孔,贯穿至该第一导线架,且该基座还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各该阶梯状通孔包括顶盖部以及连接该顶盖部的连接部,该顶盖部的最小直径大于该连接部的最大直径。22. The package structure according to claim 20, wherein the first lead frame further comprises a plurality of stepped through holes penetrating to the first lead frame, and the base further comprises a plurality of stepped protrusions To fit with the corresponding stepped through holes, wherein each of the stepped through holes includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part. 23.根据权利要求17所述的封装结构,其特征在于,该第二导线架还包括多个阶梯状通孔,贯穿至该第二导线架,且该基板还包括多个阶梯状凸起以与对应的阶梯状通孔嵌合,其中各该阶梯状通孔包括顶盖部以及连接该顶盖部的连接部,该顶盖部的最小直径大于该连接部的最大直径。23. The package structure according to claim 17, wherein the second lead frame further comprises a plurality of stepped through holes penetrating to the second lead frame, and the substrate further comprises a plurality of stepped protrusions to Fitting with the corresponding stepped through holes, wherein each of the stepped through holes includes a top cover part and a connection part connecting the top cover part, and the minimum diameter of the top cover part is larger than the maximum diameter of the connection part. 24.根据权利要求1所述的封装结构,其特征在于,还包括黏着胶材,该黏着胶材为非导电胶或导电胶,设置于该接合面与该基板之间,以贴合该基座与该基板。24. The packaging structure according to claim 1, further comprising an adhesive material, the adhesive material is a non-conductive adhesive or a conductive adhesive, and is disposed between the bonding surface and the substrate to adhere to the substrate. seat with the substrate. 25.根据权利要求1所述的封装结构,其特征在于,该第一图案化线路层的底面低于该延伸斜面以及该基座的顶面,且该第二图案化线路层的底面低于该基板的顶面。25. The package structure according to claim 1, wherein the bottom surface of the first patterned circuit layer is lower than the extending slope and the top surface of the base, and the bottom surface of the second patterned circuit layer is lower than the top surface of the substrate.
CN201611224879.3A 2016-06-16 2016-12-27 Package structure Pending CN107527876A (en)

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US15/232,808 US9801282B2 (en) 2014-06-24 2016-08-10 Package structure

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