CN106879168A - A printed circuit board, PCBA board and electronic equipment - Google Patents
A printed circuit board, PCBA board and electronic equipment Download PDFInfo
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- CN106879168A CN106879168A CN201710271722.4A CN201710271722A CN106879168A CN 106879168 A CN106879168 A CN 106879168A CN 201710271722 A CN201710271722 A CN 201710271722A CN 106879168 A CN106879168 A CN 106879168A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/062—Means for thermal insulation, e.g. for protection of parts
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
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- Oscillators With Electromechanical Resonators (AREA)
Abstract
本发明适用于电子产品技术领域,提供了一种印刷电路板、PCBA板以及电子设备。PCBA板包括晶体振荡器、电容、芯片以及印刷电路板。印刷电路板包括绝缘的介质材料,介质材料的顶面设有顶面走线层,底面设有底面走线层,介质材料的内部设有中间走线层。顶面走线层上设有用于固定晶体振荡器的晶振区域,至少有一层靠近顶面走线层的中间走线层,其对应于晶振焊盘正下方的位置为绝缘区域。由于绝缘区域上没有导电介质,所以能避免或减少了该绝缘区域与晶振焊盘产生寄生电容,防止振荡频率发生偏移。同时,该绝缘区域能与上方的绝缘介质材料形成一个空隙,有利于隔热,进面防止晶体振荡器受到附近发热量大的器件影响。
The invention is applicable to the technical field of electronic products, and provides a printed circuit board, a PCBA board and electronic equipment. The PCBA board includes crystal oscillators, capacitors, chips, and printed circuit boards. The printed circuit board includes an insulating dielectric material. The top surface of the dielectric material is provided with a top wiring layer, the bottom surface is provided with a bottom wiring layer, and the interior of the dielectric material is provided with a middle wiring layer. The top wiring layer is provided with a crystal oscillator area for fixing the crystal oscillator, and there is at least one middle wiring layer close to the top wiring layer, and the position corresponding to the directly below the crystal oscillator pad is an insulating area. Since there is no conductive medium on the insulating region, the parasitic capacitance between the insulating region and the pad of the crystal oscillator can be avoided or reduced, preventing the oscillation frequency from shifting. At the same time, the insulating region can form a gap with the upper insulating dielectric material, which is beneficial to heat insulation and prevents the crystal oscillator from being affected by nearby devices with high heat generation.
Description
技术领域technical field
本发明属于电子产品技术领域,尤其涉及一种印刷电路板、PCBA板以及电子设备。The invention belongs to the technical field of electronic products, and in particular relates to a printed circuit board, a PCBA board and electronic equipment.
背景技术Background technique
晶体振荡器是高精度和高稳定度的振荡器,被广泛应用于彩电、计算机、遥控器等各类振荡电路中,以及通信系统中用于频率发生器、为数据处理设备产生时钟信号和为特定系统提供基准信号。石英晶体振荡器分为有源晶振以及无源晶振,无源晶振不需要外接电源,但需要外接电容以及配合芯片内部的反相器才能产生振荡。Crystal oscillators are high-precision and high-stability oscillators, which are widely used in various oscillating circuits such as color TVs, computers, remote controls, etc., as well as frequency generators in communication systems, generating clock signals for data processing equipment and for Certain systems provide a reference signal. Quartz crystal oscillators are divided into active crystal oscillators and passive crystal oscillators. Passive crystal oscillators do not require an external power supply, but require an external capacitor and an inverter inside the chip to generate oscillation.
由电容的原理可知,只要有两块相隔一定距离的导电金属极板,就会形成电容,如果极板之间填充介质,电容容量会增大。目前的PCBA板(Printed Circuit BoardAssembly,PCB空板经过SMT上件以及DIP插件后),晶振内部的晶体引出两个引脚,这两个引脚的焊盘比较大,会与下一层的铺地铜皮形成寄生电容,晶体两端的电容值大小,跟振荡频率相关,因此寄生电容会导致振荡频率的偏移,进而影响电子设备的性能。It can be seen from the principle of capacitance that as long as there are two conductive metal plates separated by a certain distance, a capacitor will be formed. If a medium is filled between the plates, the capacitance will increase. In the current PCBA board (Printed Circuit Board Assembly, after the empty PCB board passes through the SMT upper part and the DIP plug-in), the crystal inside the crystal oscillator leads to two pins. The ground copper forms a parasitic capacitance, and the capacitance value at both ends of the crystal is related to the oscillation frequency. Therefore, the parasitic capacitance will cause the oscillation frequency to shift, thereby affecting the performance of electronic equipment.
发明内容Contents of the invention
本发明所要解决的技术问题在于提供一种印刷电路板、PCBA板以及电子设备,旨在解决现有技术中的PCBA板的晶体振荡器引脚的焊盘与下一层铺地铜皮形成寄生电容,导致振荡频率偏移的问题。The technical problem to be solved by the present invention is to provide a printed circuit board, PCBA board and electronic equipment, aiming to solve the parasitic formation between the soldering pad of the crystal oscillator pin of the PCBA board and the next layer of ground copper skin in the prior art. Capacitance, causing the problem of oscillation frequency shift.
本发明是这样实现的,一种印刷电路板,包括绝缘的介质材料,所述介质材料的顶面设置有顶面走线层,所述介质材料的底面设置有底面走线层,所述介质材料的内部设置有一层中间走线层或者两层以上间隔的中间走线层;所述顶面走线层上设有用于固定晶体振荡器的晶振区域、电容焊盘、用于固定芯片的芯片区域、导电的走线以及绝缘区域,所述晶振区域包括晶振焊盘,所述芯片区域包括芯片焊盘;所述中间走线层上设置有导电的走线以及绝缘区域;所述底面走线层上设置有板级主参考地线;至少有一层靠近所述顶面走线层的中间走线层,其对应于所述晶振焊盘正下方的位置为绝缘区域。The present invention is achieved in this way, a printed circuit board includes an insulating dielectric material, the top surface of the dielectric material is provided with a top wiring layer, the bottom surface of the dielectric material is provided with a bottom wiring layer, and the dielectric material The interior of the material is provided with a middle wiring layer or an intermediate wiring layer with more than two layers; the top wiring layer is provided with a crystal oscillator area for fixing the crystal oscillator, a capacitor pad, and a chip for fixing the chip. area, conductive wiring and insulating area, the crystal oscillator area includes crystal oscillator pads, and the chip area includes chip pads; the middle wiring layer is provided with conductive wiring and insulating areas; the bottom surface wiring The board-level main reference ground wire is arranged on the layer; at least one intermediate wiring layer close to the top surface wiring layer, which corresponds to the position directly below the crystal oscillator pad, is an insulating area.
进一步地,所述晶振区域下方的介质材料内设置有第一过孔,所述第一过孔内穿设有用于与晶振焊盘电连接的第一地线,所述中间走线层上的走线包括第二地线,所述第一地线与第二地线连接,所述芯片区域下方的介质材料内设置有贯通整个所述印刷电路板的第二过孔,所述第二过孔内穿设有与芯片焊盘电连接的第三地线,所述第二地线与所述第三地线电连接,所述第三地线与所述底面走线层上设置的板级主参考地线电连接。Further, a first via hole is provided in the dielectric material below the crystal oscillator region, and a first ground wire for electrically connecting to the crystal oscillator pad is pierced through the first via hole, and the intermediate wiring layer on the The wiring includes a second ground wire, the first ground wire is connected to the second ground wire, and a second via hole penetrating through the entire printed circuit board is provided in the dielectric material below the chip area, and the second via hole A third ground wire electrically connected to the chip pad is pierced through the hole, the second ground wire is electrically connected to the third ground wire, and the third ground wire is connected to the board provided on the wiring layer on the bottom surface. Level main reference ground electrical connection.
进一步地,所述顶面走线层上的晶振焊盘、电容焊盘以及芯片焊盘为覆盖于介质材料顶面上的一层铜箔。Further, the crystal oscillator pad, the capacitor pad and the chip pad on the wiring layer on the top surface are a layer of copper foil covering the top surface of the dielectric material.
进一步地,所述中间走线层上的走线为嵌置于介质材料内部的一层铜箔。Further, the wiring on the middle wiring layer is a layer of copper foil embedded in the dielectric material.
进一步地,所述绝缘区域为所述中间走线层上的一个凹陷区域。Further, the insulating region is a recessed region on the middle wiring layer.
进一步地,所述底面走线层上的板级主参考地线为覆盖于介质材料底面上的一层铜箔。Further, the board-level main reference ground wire on the wiring layer on the bottom surface is a layer of copper foil covering the bottom surface of the dielectric material.
本发明为解决上述技术问题,还提供了一种PCBA板,包括晶体振荡器、电容以及芯片,所述PCBA板还包括上述的印刷电路板;所述晶体振荡器位于所述晶振区域上,所述晶体振荡器具有晶体振荡器以及电容的参考地的引脚,所述晶体振荡器的引脚与所述晶振焊盘焊接;所述电容焊接于所述电容焊盘上,所述电容通过顶面走线层上的走线与所述晶体振荡器电连接;所述芯片位于所述芯片区域上,所述芯片具有晶振参考地的引脚,所述芯片的晶振参考地的引脚与所述芯片焊盘焊接。In order to solve the above-mentioned technical problems, the present invention also provides a PCBA board, including a crystal oscillator, a capacitor and a chip, and the PCBA board also includes the above-mentioned printed circuit board; the crystal oscillator is located on the crystal oscillator area, and the The crystal oscillator has the reference ground pins of the crystal oscillator and the capacitor, and the pins of the crystal oscillator are welded to the crystal pad; the capacitor is soldered to the capacitor pad, and the capacitor passes through the top The wiring on the surface wiring layer is electrically connected to the crystal oscillator; the chip is located on the chip area, and the chip has a crystal oscillator reference ground pin, and the crystal oscillator reference ground pin of the chip is connected to the crystal oscillator reference ground. The above chip pads are soldered.
本发明为解决上述技术问题,还提供了一种电子设备,包括上述的PCBA板。In order to solve the above-mentioned technical problems, the present invention also provides an electronic device, including the above-mentioned PCBA board.
本发明与现有技术相比,有益效果在于:本发明中的印刷电路板,至少有一层靠近顶面走线层的中间走线层,其对应于晶振焊盘的位置设置有绝缘区域,由于该绝缘区域上没有导电介质,所以,能避免或者减少了该绝缘区域与上面的晶振焊盘产生寄生电容,防止振荡频率发生偏移。同时,由于绝缘区域上没有导电介质,该绝缘区域能与上方的绝缘介质材料形成一个空隙,有利于隔热,进面防止晶体振荡器受到附近发热量大的器件影响。Compared with the prior art, the present invention has the beneficial effect that: the printed circuit board in the present invention has at least one middle wiring layer close to the top surface wiring layer, and an insulating area is arranged at the position corresponding to the crystal oscillator pad, because There is no conductive medium on the insulating region, so the parasitic capacitance between the insulating region and the above crystal oscillator pad can be avoided or reduced, preventing the oscillation frequency from shifting. At the same time, since there is no conductive medium on the insulating region, the insulating region can form a gap with the insulating dielectric material above, which is beneficial to heat insulation and prevents the crystal oscillator from being affected by nearby devices with high heat generation.
附图说明Description of drawings
一个或多个实施例通过与之对应的附图中的图片进行示例性说明,这些示例性说明并不构成对实施例的限定,附图中具有相同参考数字标号的元件表示为类似的元件,除非有特别申明,附图中的图不构成比例限制。One or more embodiments are exemplified by the pictures in the corresponding drawings, and these exemplifications do not constitute a limitation to the embodiments. Elements with the same reference numerals in the drawings represent similar elements. Unless otherwise stated, the drawings in the drawings are not limited to scale.
图1是本发明实施例提供的一种印刷电路板的纵向剖视示意图;Fig. 1 is a schematic longitudinal sectional view of a printed circuit board provided by an embodiment of the present invention;
图2是图1所示印刷电路板的晶振区域的俯视示意图;Fig. 2 is a schematic top view of the crystal oscillator area of the printed circuit board shown in Fig. 1;
图3是本发明实施例提供的一种PCBA板的纵向剖视示意图。Fig. 3 is a schematic longitudinal sectional view of a PCBA board provided by an embodiment of the present invention.
具体实施方式detailed description
为了使本发明所要解决的技术问题、技术方案及有益效果更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
如图1至图3所示,为本发明的一佳实施例,提供了一种印刷电路板,包括绝缘的介质材料100。介质材料100的顶面设置有顶面走线层1,介质材料100的内部设置有一层中间走线层2或者两层以上间隔的中间走线层3,介质材料100底面设置有底面走线层3。As shown in FIGS. 1 to 3 , a preferred embodiment of the present invention provides a printed circuit board, including an insulating dielectric material 100 . The top surface of the dielectric material 100 is provided with a top wiring layer 1, and the interior of the dielectric material 100 is provided with a middle wiring layer 2 or an intermediate wiring layer 3 separated by more than two layers, and the bottom surface of the dielectric material 100 is provided with a bottom wiring layer. 3.
上述顶面走线层1上设有用于固定晶体振荡器的晶振区域11、电容焊盘、用于固定芯片的芯片区域12、导电的走线以及绝缘区域。晶振区域11包括晶振焊盘111。芯片区域12包括芯片焊盘121,中间走线层2上设置有导电的走线以及绝缘区域,底面走线层3上设置有板级主参考地线31。其中,至少有一层靠近顶面走线层1的中间走线层2,其对应于晶振焊盘111正下方的位置为绝缘区域21。本实施例以一块三层的印刷电路板进行举例说明,从图1可看出,本实施例的印刷电路板具有三层介质材料100、一层顶面走线层1、两层中间走线层2以及一层底面走线层3,其中,两个中间走线层2对应于晶振焊盘111正下方的位置均为绝缘区域21。The above wiring layer 1 on the top surface is provided with a crystal oscillator area 11 for fixing the crystal oscillator, a capacitor pad, a chip area 12 for fixing the chip, conductive wiring and an insulating area. The crystal oscillator area 11 includes a crystal oscillator pad 111 . The chip area 12 includes a chip pad 121 , the middle wiring layer 2 is provided with conductive wiring and an insulating area, and the bottom wiring layer 3 is provided with a board-level main reference ground wire 31 . Among them, there is at least one intermediate wiring layer 2 close to the top wiring layer 1 , and the position corresponding to the directly below the crystal pad 111 is an insulating region 21 . In this embodiment, a three-layer printed circuit board is used as an example. It can be seen from FIG. layer 2 and a bottom wiring layer 3 , where the positions of the two middle wiring layers 2 corresponding to the directly below the crystal pad 111 are insulating regions 21 .
具体地,晶振区域11下方的介质材料100内设置有第一过孔,第一过孔内穿设有用于与晶振焊盘111电连接的第一地线4,中间走线层2上的走线包括第二地线22,芯片区域12下方的介质材料100内设置有贯通整个印刷电路板的第二过孔,第二过孔内穿设有与芯片焊盘121电连接的第三地线5,第三地线5与底面走线层3上设置的板级主参考地线31电连接,第一地线4、第二地线22、第三地线5以及板级主参考地线31依次电连接。通过将晶体振荡器和外围电容跟芯片内部的时钟模块一起组成一个时钟发生系统,将此系统的地线全部连接到芯片的时钟参考地上,再一起连接至板级主参考地线31,可以保证时钟系统的晶振、电容、芯片内部时钟模块三者的地不受其他地的干扰。此外,即使受到干扰,也可以保证时钟系统的不同器件的地线之间的电压差最小。Specifically, the dielectric material 100 below the crystal oscillator region 11 is provided with a first via hole, and the first ground wire 4 for electrically connecting with the crystal oscillator pad 111 is pierced through the first via hole, and the traces on the intermediate wiring layer 2 The line includes a second ground wire 22, a second via hole penetrating through the entire printed circuit board is provided in the dielectric material 100 below the chip area 12, and a third ground wire electrically connected to the chip pad 121 is pierced through the second via hole 5. The third ground wire 5 is electrically connected to the board-level main reference ground wire 31 set on the bottom wiring layer 3, the first ground wire 4, the second ground wire 22, the third ground wire 5 and the board-level main reference ground wire 31 are electrically connected in turn. By combining the crystal oscillator and peripheral capacitors with the internal clock module of the chip to form a clock generation system, all the ground wires of this system are connected to the clock reference ground of the chip, and then connected to the board-level main reference ground wire 31, which can ensure The grounds of the clock system's crystal oscillator, capacitors, and the internal clock module of the chip are not disturbed by other grounds. In addition, even if disturbed, the voltage difference between the grounds of different components of the clock system can be guaranteed to be minimal.
可选地,顶面走线层1上的晶振焊盘111、电容焊盘以及芯片焊盘121为覆盖于介质材料100顶面上的一层铜箔。中间走线层2上的第二地线22为嵌置于介质材料100内部的一层铜箔。底面走线层3上的板级主参考地线31为覆盖于介质材料100底面上的一层铜箔。而上面的绝缘区域21是中间走线层2上的一个凹陷区域,即是没有布置铜箔或者仅有少量第二地线22经过的区域,其与各层上的走线均在电路板设计阶段时决定。Optionally, the crystal pad 111 , the capacitor pad and the chip pad 121 on the wiring layer 1 on the top surface are a layer of copper foil covering the top surface of the dielectric material 100 . The second ground wire 22 on the middle wiring layer 2 is a layer of copper foil embedded in the dielectric material 100 . The board-level main reference ground wire 31 on the bottom wiring layer 3 is a layer of copper foil covering the bottom surface of the dielectric material 100 . The upper insulating area 21 is a recessed area on the middle wiring layer 2, that is, an area where no copper foil is arranged or only a small amount of second ground wires 22 pass through, and the wiring on each layer is in the circuit board design. stage is decided.
请参见图3,本实施例还提供了一种PCBA板,包括晶体振荡器6、电容、芯片7以及上述的印刷电路板。本实施例中,晶体振荡器6为无源晶振器,其与外接的电容,并配合芯片7内部的反相器产生振荡条件。Referring to FIG. 3 , this embodiment also provides a PCBA board, including a crystal oscillator 6 , a capacitor, a chip 7 and the above-mentioned printed circuit board. In this embodiment, the crystal oscillator 6 is a passive crystal oscillator, which is connected with an external capacitor and cooperates with the inverter inside the chip 7 to generate oscillation conditions.
晶体振荡器6位于晶振区域11上,晶体振荡器6具有晶体振荡器以及电容的参考地的引脚61,晶体振荡器6的引脚61与晶振焊盘111焊接。电容焊接于电容焊盘上,电容通过顶面走线层1上的走线与晶体振荡器6电连接。芯片7位于芯片区域12上,芯片7具有晶振参考地的引脚71,芯片7的晶振参考地的引脚71芯片焊盘121焊接。The crystal oscillator 6 is located on the crystal oscillator area 11 . The crystal oscillator 6 has pins 61 of the reference ground of the crystal oscillator and capacitors. The pins 61 of the crystal oscillator 6 are welded to the crystal oscillator pad 111 . The capacitor is welded on the capacitor pad, and the capacitor is electrically connected to the crystal oscillator 6 through the wiring on the wiring layer 1 on the top surface. The chip 7 is located on the chip area 12 , and the chip 7 has a crystal oscillator reference ground pin 71 , and the crystal oscillator reference ground pin 71 of the chip 7 is soldered to a chip pad 121 .
为了远离发热源,与晶体振荡器6电连接的顶面走线层1上的输入和输出走线长度一般设置为3~10mm,发热较大的主板,走线长度设置为6~10mm,发热量大的器件的底部不允许放置晶体振荡器6;为了减小晶体振荡器6输入、输出的寄生电容,走线的宽度小于3mil。In order to keep away from the heat source, the length of the input and output wires on the top wire layer 1 electrically connected to the crystal oscillator 6 is generally set to 3-10mm. The crystal oscillator 6 is not allowed to be placed on the bottom of the device with high heat; in order to reduce the parasitic capacitance of the input and output of the crystal oscillator 6, the width of the trace is less than 3mil.
本实施例还提供了一种电子设备,包括上述的PCBA板。This embodiment also provides an electronic device, including the above-mentioned PCBA board.
可见,本实施例中PCBA板或电子设备中的印刷电路板,两个中间走线层2上对应于晶振焊盘111的位置设置有绝缘区域21,由于该绝缘区域21上没有导电介质,所以,能避免或者减少了该绝缘区域21与上面的晶振焊盘111产生寄生电容,防止振荡频率发生偏移。同时,由于绝缘区域21上没有导电介质,该绝缘区域21能与上方的绝缘介质材料100形成一个空隙,有利于隔热,进面防止晶体振荡器受到附近发热量大的器件影响。It can be seen that in this embodiment, the PCBA board or the printed circuit board in the electronic equipment, the two intermediate wiring layers 2 are provided with an insulating area 21 corresponding to the crystal oscillator pad 111, since there is no conductive medium on the insulating area 21, so , can avoid or reduce the parasitic capacitance generated between the insulating region 21 and the above crystal pad 111 , and prevent the oscillation frequency from shifting. At the same time, since there is no conductive medium on the insulating region 21, the insulating region 21 can form a gap with the insulating dielectric material 100 above, which is beneficial to heat insulation and prevents the crystal oscillator from being affected by nearby devices with high heat generation.
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. within range.
Claims (8)
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