JP2010062180A - Multilayer printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board that reduces generation of unwanted radiation noise during operation as compared with before. <P>SOLUTION: The multilayer printed wiring board has, as an inner layer, a power supply layer 24 for supplying driving voltages different by conductor patterns 14, 16 and 18 to an electronic component provided with insulated discontinuous parts to be divided into the conductor patterns 14, 16 and 18 and mounted. The multilayer printed wiring board is characterized in that a plurality of inter-power-source bypass capacitors 12 for connecting the conductor patterns 14, 16 and 18 in terms of high frequency are mounted on surfaces moved vertically with a posture parallel to surfaces of the inner layer where the discontinuous parts are provided, and/or an inter-power-source-ground bypass capacitor 52 for connecting the conductor patterns 14, 16 and 18, and a GND layer 36 in terms of high frequency is mounted on an inner layer surface moved vertically with a posture parallel to peripheral edges of the conductor patterns 14, 16 and 18. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a multilayer printed wiring board, and more specifically to a multilayer printed wiring board used as a functional module.

  In recent years, there has been a demand for miniaturization and high-speed operation of semiconductor integrated circuits such as a central processing unit (CPU) and a digital signal processing unit (DSP) mounted on a multilayer printed wiring board (printed circuit board, printed circuit board). As a countermeasure against heat generation, the voltage of a power source for driving a semiconductor integrated circuit is being lowered. Further, in order to achieve matching with the external interface, the circuit element drive voltage is required to use various power supply voltages such as 5 V, 3.3 V, 2.5 V, and 1.8 V, for example. On the other hand, with the demand for miniaturization of products incorporating a multilayer printed wiring board, the multilayer printed wiring board is also required to be miniaturized and densified.

  With the increasing power supply voltage of the drive power supply, the power layer of the multilayer printed wiring board inner layer, which was conventionally configured with a uniform plane, is now configured with island patterns that are divided into small pieces for each power supply voltage. . As a result, a discontinuous part occurs between the conductor patterns of the inner power layer, and this discontinuous part cannot secure the shortest return current path of the high-speed signal line equivalent to the inner ground layer (GND layer) that is a uniform plane. ing.

  As semiconductor integrated circuit elements themselves have become smaller and higher in density, circuit element foot patterns have become more common in high density specifications such as ball grid arrays (BGA), which makes it difficult to route signal wiring only on the surface layer. There is no choice but to use a lot of holes and use the inner layer for wiring. When the through hole for the signal line increases in this way, when the through hole crosses the inner power supply layer / GND layer, an insulation escape (clearance) is required. This clearance causes the inner power supply layer / GND layer. A slit which is a non-conductive portion (a discontinuous portion in a uniform conductor pattern) is generated. With this slit, the return current path of the high-speed signal is forced to go around.

  By the way, with high-speed operation of semiconductor integrated circuits, unnecessary radiation noise such as electromagnetic interference (EMI) becomes a problem when high-speed signals propagate on signal lines connecting circuit elements. Moreover, unnecessary radiation noise due to resonance of the multilayer printed wiring board itself is a factor that cannot be ignored. This is a major problem as electromagnetic waves generated from electronic circuits cause malfunctions due to communication failures and mutual interference of electronic circuits as electronic components become more functional and faster.

  In general, in multilayer printed wiring boards, it is necessary to secure the return current path of the high-speed signal line on the inner uniform plane closest to the high-speed signal line with the shortest path against EMI caused by the high-speed operation of the circuit. However, due to the use of various power supply driving voltages as described above, the inner power supply layer cannot be regarded as a uniform plane. As a countermeasure, when a return current path is secured in a discontinuous portion between conductor patterns having different voltages, in Patent Document 1, at least a position crossing the discontinuous portion of the surface component mounting surface on the opposite side where the signal line is wired is provided. A structure for mounting one capacitor is proposed.

For EMI caused by resonance of multilayer printed wiring boards, Patent Document 2 proposes a structure in which capacitors for connecting the power supply layer and the ground layer are mounted side by side on the surface component mounting surface around the multilayer printed wiring board. is doing.
Japanese Patent No. 3610228 Japanese Patent No. 3036629

  However, in any of the methods described above, there are restrictions on mounting component placement and signal wiring routing due to the high-density mounting of multilayer printed wiring boards, and the operating power supply voltage accompanying the speeding up of semiconductor integrated circuit elements In response to the increase in the number of power supplies, an appropriate number of capacitors cannot be mounted at an appropriate position, so that a sufficient effect against unwanted radiation noise such as EMI has not been obtained. In particular, the slit due to the clearance of the through hole for signal lines is an obstacle to the formation of the shortest return current path, but no fundamental countermeasure has been proposed.

  In addition, when mounting electronic components on the surface layer of a multilayer printed wiring board, it is usually necessary to sandwich the edge of the multilayer printed wiring board with a guide or the like from the end of the multilayer printed wiring board. It was impossible to mount at a position within 5 mm. That is, in the conventional method such as Patent Document 2, it is necessary to mount the capacitor more than 5 mm away from the end of the multilayer printed wiring board, and the position corresponding to the outer peripheral edge of the power supply layer / GND layer in the multilayer printed wiring board inner layer. It was impossible to place in Therefore, the open end of the inner power supply layer / GND layer remains on the periphery of the multilayer printed wiring board outside the capacitor mounting position, and this part acts as a radiation source (antenna) for EMI-free radiation noise. As a countermeasure, a sufficient effect was not obtained.

  Furthermore, unnecessary radiant noise generated at the open end of the conductor pattern having the inner power supply layer propagates to other conductor patterns ahead of the discontinuous portion, causing malfunction of the electronic device.

  In view of such problems, the present invention has an object to provide a multilayer printed wiring board in which generation of unnecessary radiation noise during operation is reduced as compared with the conventional art.

  In order to solve the above-described problems, the present invention provides an insulating discontinuous portion so as to be divided into a plurality of conductor patterns and supply different drive voltages to the mounted electronic components for each conductor pattern. A power supply layer is provided on the inner layer, and a plurality of conductor patterns are connected at a high frequency on the surface that is translated in the direction perpendicular to the surface of the inner layer of the multilayer printed wiring board provided with the discontinuous portion. In this configuration, a plurality of capacitors are mounted.

  Further, in order to solve the above-described problems, the present invention is divided into a plurality of conductor patterns by providing insulated discontinuous portions, and different drive voltages are applied to the mounted electronic components for each conductor pattern. The inner layer includes a power supply layer to be supplied and a ground layer for supplying a reference potential to the electronic component, and an inner layer mounting layer capable of mounting the electronic component on the inner layer, and the periphery of the conductor pattern in the inner layer mounting layer A plurality of capacitors that connect any one of the conductor patterns and the ground layer at a high frequency are mounted on a surface that is translated in a direction perpendicular to the portion.

  According to the present invention, since the return current path of the high-speed signal line can be secured in the shortest distance by connecting the plurality of conductor patterns of the power supply layer at high frequency, unnecessary radiation of high-order harmonics generated by the high-speed signal line is ensured. Noise can be reduced.

  In addition, since the conductor pattern of the power supply layer and the ground layer are connected at a high frequency at the periphery of the conductor pattern, the radiation of unnecessary radiation noise is suppressed to the outside, so that the electronic circuit including the mounted electronic component It is possible to reduce unnecessary radiation noise of high-order harmonics generated by high-speed operation.

  Next, embodiments of the multilayer printed wiring board according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing a portion of a multilayer printed wiring board 10 having a total of six layers, in which one inter-power supply bypass capacitor 12 for connecting conductor patterns of different power supply voltages in high frequency is provided.

  FIG. 2 is a plan view at the stage where the inner layer component mounting layer (L4), which is an inner layer for mounting electronic components, is completed assuming that the multilayer printed wiring board 10 is manufactured by the sequential lamination method. This diagram is a diagram shown to facilitate understanding of an example of the arrangement of the plurality of inter-power supply bypass capacitors 12 provided in the inner layer of the multilayer printed wiring board 10. FIG.

  In FIG. 2, for convenience of explanation, the arrangement of the conductor patterns 14, 16, 18 for supplying different types of drive power supply voltages provided on the fifth layer (L 5), which is a power supply layer located below the fourth layer, is indicated by a broken line. Is shown. Also, the alternate long and short dash line II shown in FIG. 2 is for indicating the cutting direction of the cross-sectional view shown in FIG. 1, and in FIG. Cross-sectional views of all the layers from the first layer to the sixth layer of the multilayer printed wiring board 10 are shown.

  The multilayer printed wiring board 10 according to this embodiment is built in various electronic devices that require different power supply voltages for driving high-speed operation elements such as a central processing unit (CPU) and a digital signal processing unit (DSP). obtain. Various electronic components such as a semiconductor integrated circuit are mounted on the multilayer printed wiring board 10 incorporated in an electronic device or the like, and wiring capable of propagating high-speed signals is installed between these electronic components, so that each semiconductor The integrated circuit is electrically connected, and an electronic device or the like is operated by driving the mounted circuit. The drive power supply voltage of the electronic components mounted on the multilayer printed wiring board 10 differs depending on each component from the viewpoint of lowering the drive voltage. In this embodiment, three types of drive power supply voltages (5V, 3.3V, Conductor patterns 14, 16, and 18 for supplying 2.5V) are provided, and a plurality of power supply bypass capacitors 12 are connected between these conductor patterns at high frequency.

  The embodiment of the multilayer printed wiring board 10 to be described below has a structure composed of six layers. However, it is not limited to the structure of all 6 layers, and if it is a multilayer printed wiring board of 4 layers or 5 layers or more depending on where the layer for mounting the bypass capacitor 12 between power supplies is 8 layers, 10 layers, It is also possible to realize a multilayer printed wiring board according to the present invention having more layers. In other words, the present invention can be implemented as long as a total of five layers including two surface layer component mounting layers, a power supply layer and a GND layer, or a total of at least one inner component mounting layer is provided.

  The multi-layer printed wiring board exceeding 6 layers is designed to have a multi-layer printed wiring board in which a signal layer is added between the inner layer component mounting layer and the power supply layer or the GND layer, and / or multiple inner layer component mounting layers. A multi-layer printed wiring board can be considered.

  Hereinafter, the configuration of the multilayer printed wiring board 10 will be described in more detail. The sixth layer (L6), which is the bottom layer of the multilayer printed wiring board 10, can be mounted with electronic components that output high-speed signals on the surface, and high-speed signal lines that propagate signals between these electronic components A surface layer component mounting layer 22 is provided. The value of the driving voltage of the electronic component varies depending on the component. The surface component mounting layer 22 constitutes one surface of the multilayer printed wiring board 10, and an insulating material P5 such as a prepreg is laminated on the inner surface of the multilayer printed wiring board 10.

  On the insulating material P5, as a fifth layer (L5), a 5V conductor pattern 14 and a 3.3V conductor for supplying different driving power supply voltages to electronic components such as semiconductor integrated circuits mounted on the multilayer printed wiring board 10 are provided. The pattern 16 and the 2.5V conductor pattern 18 are arranged, and the inner power supply layer 24 is configured as the entire fifth layer. As a matter of course, the value of the voltage supplied by each conductor pattern is not limited to the above value, and the arrangement position and shape of the conductor pattern and the number of conductor patterns installed in the entire power supply layer can be appropriately determined.

  A discontinuous portion for ensuring insulation from different conductor patterns is formed between the conductor patterns. That is, the power supply layer 24 is divided into a plurality of conductor patterns 14, 16, and 18 by providing the insulated discontinuous portions. In the case of the present embodiment, the peripheral portion on the wiring board end 20 side of the power supply layer 24 composed of the conductor patterns 14, 16, and 18 is positioned inward by 1 mm from the wiring board end 20 of the multilayer printed wiring board 10. Is arranged. With this arrangement, the clearance of the power supply layer 24 is configured.

  As with the L6 layer, an insulating material P4 such as a prepreg is laminated on the power supply layer (L5) to form an insulating layer. The insulating material P4 is formed with an inner via for connecting each conductor pattern on the fifth layer and the inter-power supply bypass capacitor 12 on the fourth layer at the shortest distance. As an example, FIG. 1 shows an inner via 26 for connecting the 3.3V conductor pattern 16 and the power supply bypass capacitor 12 and an inner via 28 for connecting the 2.5V conductor pattern 18 and the power supply bypass capacitor 12. Yes. In order to realize the connection with the shortest distance, the inner vias 26 and 28 are perforated in a direction perpendicular to the surface on which each layer of the multilayer printed wiring board 10 is formed.

  The inner vias 26 and 28 are formed by, for example, forming a hole penetrating the insulating material P4 with a laser and then plating the formed hole with a conductor such as copper or silver. A conical protrusion (bump) made of such a material may be formed, and may be formed by any known forming method such as a method of forming a via in the insulating material P4 by applying pressure to penetrate the bump. In the present embodiment shown in FIG. 1, a design is adopted in which the entire opened hole is filled with a conductive material in order to enhance the heat dissipation effect. However, the inner vias 26 and 28 may be conductive by being plated with a conductor such as copper or silver so that only the wall portions of the formed holes are in contact with lands 30 and 32 described later.

  On the insulating material P4, the inner layer component mounting layer that can mount various electronic components, which is the fourth layer (L4), is configured. In this embodiment, a conductor such as lands 30 and 32, which are copper foils for bonding material, is provided directly on the inner component mounting layer immediately above the position where the openings of the inner vias 26 and 28 are formed. It is fixed so as to be electrically connected to 26 and 28. The lands 30 and 32 may be formed by etching from a copper foil, or may be formed by printing a copper paste or the like. Further, instead of using the lands 30 and 32, the inner vias 26 and 28 and the inter-power supply bypass capacitor 12 may be connected by laminating copper plating or the like.

  Furthermore, a plurality of inter-power supply bypass capacitors 12 are mounted on the fourth layer so as to be connected to the lands 30 and 32. Each of the inter-power supply bypass capacitors 12 connects one of the conductor patterns 14-16, 14-18, and 16-18 having different voltages in high frequency via an inner via. In this way, by connecting the conductor patterns with a plurality of inter-power supply bypass capacitors 12, the power supply layer 24 can be regarded as a uniform return plane as a whole. If necessary, other electronic components and signal lines that cannot be mounted on the surface layer of the multilayer printed wiring board 10 can be mounted and wired on the fourth layer.

  In this embodiment, as shown in FIG. 2, the position on the L4 where the inter-power supply bypass capacitor 12 is mounted is relative to the surface provided with the discontinuous portions between the conductor patterns arranged in the fifth layer. Along the plane translated in the vertical direction, that is, along the position corresponding to the upper part of the discontinuous portion.

  Furthermore, it is most desirable that the inter-power supply bypass capacitor 12 be arranged vertically above or below the number in accordance with the number and path of high-speed signal lines wired on the surface layer or the inner layer of the multilayer printed wiring board 10. FIG. 3 is a simplified illustration of this positional relationship. The signal lines 22A, 22B, and 22C wired to the surface component mounting layer 22 of the sixth layer are fixed to the multilayer printed wiring board 10 by fixing the copper foil 220 indicated by a broken line at the manufacturing stage of the multilayer printed wiring board 10. It is formed by performing etching or the like. In the manufacturing stage of the multilayer printed wiring board 10 itself or in the manufacture of an electronic device in which the multilayer printed wiring board 10 is built, the surface layer 22 has an electronic component 40, 42 such as a semiconductor integrated circuit such as a CPU or DSP. Are connected via the formed signal lines 22A, 22B, and 22C. The components other than the signal line 22B are not shown, but are mounted and connected in the same manner. Further, FIG. 3 shows that when the multilayer printed wiring board 10 is operated, the signal lines 22A when signals flowing through the signal lines 22A, 22B, and 22C are transmitted between the electronic components as indicated by arrows 23a, 23b, and 23c, respectively. , 22B and 22C are shown as examples of return currents 123a, 123b and 123c. The inter-power supply bypass capacitors 12A, 12B, and 12C were translated in the vertical direction with respect to the positions above the discontinuous portions between the conductor patterns and the wiring positions of the signal lines 22A, 22B, and 22C. It is mounted on the line, that is, vertically above the line where the return current is generated. By arranging the power supply bypass capacitors 12A, 12B, and 12C in this way, the paths of the return currents 123a, 123b, and 123c that are suppressed to the shortest distance are secured.

  Even when there is no high-speed signal line, it is desirable to mount three or more inter-power supply bypass capacitors 12 between the conductor patterns. By preparing a number of power supply bypass capacitors 12 that can serve as a return current path for noise such as ripple generated from integrated circuits, etc., it is possible to prevent noise from concentrating on specific power supply bypass capacitors 12 and to prevent malfunctions due to resonance. This is to reduce the influence.

  The interval at which the inter-power supply bypass capacitor 12 is mounted along the discontinuous portion is, for example, an interval of 10 mm to 30 mm. However, the mounting interval of the power supply bypass capacitor 12 is determined by the size of the multilayer printed wiring board 10, and the position interval is not always specified as a constant value.

  Further, the capacitance of the inter-power supply bypass capacitor 12 used is desirably a large-capacity product of 1000 pF or more. However, the capacity of the power supply bypass capacitor 12 used is not limited to a fixed value, and every 1000pF power supply bypass capacitor 12 and every other 1mF power supply bypass capacitor 12 are inner layer component mounting layers ( Various combinations such as mounting in L4) are possible.

  The connection between the power supply bypass capacitor 12 and the inner vias 26 and 28 via the lands 30 and 32, and the electrical connection between the conductor patterns arranged on the fifth layer via the power supply bypass capacitor 12 is as follows. This is realized by bonding the lands 30 and 32 and the terminals of the inter-power supply bypass capacitor 12 to each other using a known bonding material 34 such as solder or conductive paste.

  As described above, since the inter-power supply bypass capacitor 12 is mounted on the inner layer of the multilayer printed wiring board 10, there is no restriction on the surface layer (L1, L6) circuit mounting design of the multilayer printed wiring board 10. In addition, the electrical length can be shortened at least by the thickness corresponding to the multilayer printed wiring board 10 as compared with the case where the inter-power supply bypass capacitor 12 is mounted on the surface layer. Furthermore, by using inner via technology, it is possible to create a connection between the inner layers, so that it is not necessary to form a through hole that is essential when the bypass capacitor 12 between power supplies is mounted on the surface layer. The effect of slits due to inner layer clearance can be eliminated.

  An insulating material P3 such as a prepreg is laminated on the inner component mounting layer (L4 layer) on which the inter-power supply bypass capacitor 12 and the like are mounted. As a result, insulation between the power supply bypass capacitor 12 and other electronic components and wirings, and more firm fixation of the power supply bypass capacitor 12 are achieved.

  On the insulating material P3, there is an inner layer component mounting layer that is an L3 layer, and electronic components can be mounted and signal lines can be wired. However, since these are elements not directly related to the present invention, illustration and detailed description are omitted.

  An insulating material P2 such as a prepreg is further laminated on the L3 layer, and a ground layer 36 (GND layer 36) is provided as an L2 layer on the insulating material P2. The GND layer 36 is a uniform plane across the L2 layer, and provides a potential reference to electronic components (40, 42, etc.) mounted on the multilayer printed wiring board 10.

  An insulating material P1 such as a prepreg is laminated on the GND layer 36 as in the other layers. Further, on the insulating material P1, as a first layer (L1) of the uppermost layer, high-speed signals having different driving voltages are provided. A surface layer component mounting layer 38 is provided that can mount electronic components that output a high-speed signal line that propagates signals between these electronic components. The surface of the surface component mounting layer 38 on which electronic components and the like are mounted is one of the surfaces of the multilayer printed wiring board 10 itself.

  The cross-sectional configuration of the multilayer printed wiring board 10 described so far is high-frequency using the inter-power supply bypass capacitor 12 between the 3.3 V conductor pattern 16 and the 2.5 V conductor pattern 18 because of the relationship described with reference to FIG. The main configuration was to connect to. However, it goes without saying that the same configuration is adopted for connecting the 5V conductor pattern 14 and the 3.3V conductor pattern 16 and between the 5V conductor pattern 14 and the 2.5V conductor pattern 18 at high frequency by the inter-power supply bypass capacitor 12. .

  When the electronic component mounted on the inner layer of the multilayer printed wiring board 10 is only the inter-power source bypass capacitor 12, the inter-power source bypass capacitor 12 is mounted on the inner layer component mounting layer (L4), and the inner vias 26, 28 Instead of connecting different conductor patterns through, instead of the power supply layer 24 in the vicinity of the discontinuous portion of the power supply layer 24, the land 30 for the power supply bypass capacitor 12 on the periphery of the conductor pattern 14, 16, 18 It is also possible to provide the power supply bypass capacitor 12 on the lands 30 and 32, that is, to directly mount the power supply bypass capacitor 12 on the L5 power supply layer 24. A cross-sectional view in that case is shown in FIG. The cutting direction of FIG. 4 is the same as that of FIG. 1, and the same elements as those shown in FIG. 1 are denoted by the same reference numerals. When such a configuration is adopted, it is also possible to provide the multilayer printed wiring board 10 including all the four layers of the surface component mounting layers 22 and 38, the power supply layer 24, and the GND layer 36.

  Subsequently, the operation of the multilayer printed wiring board 10 according to the present embodiment will be described. When an electronic device or the like in which the multilayer printed wiring board 10 is built in operates, for example, an electronic component (see FIG. 3) mounted on the surface component mounting layer 22 receives each drive voltage from the power supply layer 24, for example, arrows 23a and 23b. , 23c is output as a high-speed signal (high-speed switching signal).

  In response to high-speed signal propagation, return currents such as 123a, 123b, and 123c are induced in the inner power supply layer 24 that is closest to the surface mount layer 22 where the high-speed signal lines 22A, 22B, and 22C are wired, for example. The At this time, the power supply layer 24 has an insulating discontinuous portion due to the arrangement of the conductor patterns 14, 16, and 18 having different voltages, but the inter-power supply bypass capacitor 12 is adapted to the arrangement of the signal lines. Therefore, a shortest return current path as shown by an arrow 123 in FIG.

  The bypass capacitor 12 between the power supplies is not mounted on the surface layer as in the conventional multilayer printed wiring board, but is mounted on the inner layer component mounting layer (L4 layer), so the return current path of the multilayer printed wiring board 10 is Compared to a conventional multilayer printed wiring board, the electrical length is at least as short as the thickness of the multilayer printed wiring board.

  Further, unlike the conventional board, it is not necessary to mount the bypass capacitor 12 between the power sources on the surface component mounting layers 22 and 38 and provide a through-through hole. Therefore, the GND layer 36 which is a uniform conductor pattern has no clearance for clearance. A continuous portion is not formed. Therefore, there is no obstacle to the formation of the shortest path for the return current generated in the GND layer 36 due to the signal propagating through the signal line wired on the surface component mounting layer 38.

  Under such operation, about 10dB reduction effect is recognized for unnecessary radiation of high-order harmonics generated by high-speed signal lines, and EMI characteristics are improved.

  Subsequently, another embodiment according to the present invention will be described with reference to FIGS. 5 to 8, the same constituent elements as those used in the previous embodiment are denoted by the same reference numerals.

  FIG. 5 is a plan view at a stage where the inner component mounting layer (L4) is completed on the assumption that the multilayer printed wiring board 50 is manufactured by the sequential lamination method. This figure makes it easy to grasp an example of the arrangement of the plurality of power-ground bypass capacitors 52 provided in the inner layer of the multilayer printed wiring board 50. In the embodiments described below, the inter-power supply bypass capacitor 12 described in the previous embodiment is disposed vertically above the discontinuous portion that ensures insulation between the conductor patterns 14, 16, 18 of the power supply layer 24. Although not shown in the drawing, the illustration is omitted.

  6 to 8 show a multilayer printed wiring board having a total of six layers, in which a power-ground bypass capacitor 52 for connecting the power supply layer and the GND layer at the shortest distance is provided in the inner component mounting layer (third layer / 4 layer). FIG. The dashed-dotted line VI-VI, the dashed-two dotted line VII-VII, and the dashed-dotted line VIII-VIII which are displayed in FIG. 5 are for showing the cutting direction of sectional drawing shown in FIG.6, FIG.7, FIG.8, respectively. Actually, FIGS. 6 to 8 show sectional views of not only the fourth layer to the sixth layer but also all the layers of the multilayer printed wiring board 50 from the first layer to the sixth layer.

  Similarly to the multilayer printed wiring board 10 according to the above-described embodiment, the multilayer printed wiring board 50 according to the present embodiment is also incorporated in various electronic devices. In addition, various electronic components such as semiconductor integrated circuits are mounted, and high-speed signal lines (for example, signal lines 22A, 22B, and 22C) that connect these electronic components are wired, so that each electronic component is electrically connected. To operate electronic devices.

  Hereinafter, the configuration of the multilayer printed wiring board 50 including the power supply ground bypass capacitor 52 will be described in detail. However, the same parts as those of the multilayer printed wiring board 10 according to the previous embodiment may be omitted or simplified.

  In the case of the present embodiment, each of the conductor patterns 14, 16, and 18 arranged in the power supply layer 24 which is the fifth layer is a multilayer printed wiring while ensuring a predetermined discontinuous portion with another conductor pattern. The board 50 is disposed at an inner position of 1 mm from the end 20 of the wiring board. A gap existing from the wiring board end 20 to the periphery of each conductor pattern constitutes a clearance of the power supply layer 24. Similarly, the peripheral portions of the GND layer 36 and the surface component mounting layers 22 and 38 are also arranged on the inner side by 1 mm from the wiring board end 20 of the multilayer printed wiring board 50.

  On the inner layer component mounting layer (L4), a plurality of spaced apart patterns are provided on the surface translated in the vertical direction with respect to the peripheral edges of the conductor patterns 14, 16, 18 along the vertical direction. A power supply ground bypass capacitor 52 is mounted. Of course, in this embodiment, the bypass capacitor 52 between the power supply grounds is mounted vertically above the peripheral edge of the conductor patterns 14, 16, 18; however, the outer periphery of the multilayer printed wiring board 50 is perpendicular to the peripheral edge of the conductor pattern. It may be mounted on the inside within a range of 5 mm from above. From the viewpoint of reducing EMI, the peripheral edge of the conductor pattern is desirable, but the power supply ground bypass capacitor 52 may not be mounted at the peripheral edge of the conductor pattern due to manufacturing or wiring reasons. However, if the distance is within 5 mm from the end 20 of the wiring board, the reduction effect is small.

  Thus, since the position where the bypass capacitor 52 between power grounds is mounted is on the fourth layer which is the inner layer component mounting layer, the surface layer circuit on the surface of the multilayer printed wiring board 50 is mounted for mounting the bypass capacitor 52 between power grounds. There are no restrictions on packaging design or manufacturing.

  The mounting interval of the bypass capacitor 52 between the power supply grounds is, for example, 10 mm to 30 mm. However, the mounting interval of the bypass capacitor 52 between the power grounds is determined by the dimensions of the multilayer printed wiring board 50, and the position interval is not always specified by a constant value.

  Further, it is desirable that the capacity of the bypass capacitor 52 between the power supply ground used is a large capacity product of 1000 pF or more. However, the capacitance of the power supply ground bypass capacitor 52 to be used is not limited to a constant value, and another 1000 pF power supply ground bypass capacitor 52 and every other 1 mF power ground bypass capacitor 52 are arranged. Various combinations are possible.

  The high frequency connection between the power supply ground bypass capacitor 52 and the power supply layer 24 and the GND layer 36 is made by the following configuration. First, an inner via 54 is formed in the insulating material P4 to connect one end of each conductor pattern on the fifth layer and one of the terminals of the power-ground bypass capacitor 52 on the fourth layer at the shortest distance. Has been. In order to realize the electrical connection with the shortest distance, the inner via 54 is perforated in a direction perpendicular to the surface of each layer of the multilayer printed wiring board 50.

  In addition, an inner via 56 is formed from the insulating material P3 to P2 to connect the remaining one of the terminals of the power supply ground bypass capacitor 52 on the fourth layer and the GND layer 36 in the second layer in the shortest distance. Yes. In order to realize the electrical connection with the shortest distance, the inner via 56 is perforated in a direction perpendicular to the surface on which each layer of the multilayer printed wiring board 50 is formed.

  In the case of this embodiment, a conductor such as a land 58 that is a copper foil for bonding material is directly above the position where the opening of the inner via 54 is formed in the inner layer component mounting layer of the fourth layer (L4). Has been established. Similarly, a conductor such as a land 60 is fixed immediately below the position where the opening of the inner via 56 is formed in the fourth layer.

  The electrical connection between the bypass capacitor 52 and the inner vias 54 and 56 via the lands 58 and 60 is bypassed between the lands 58 and 60 and the power ground using a known bonding material 34 such as solder or conductive paste. This is realized by electrically connecting the terminals of the capacitor 52 to each other. Further, instead of using the lands 58 and 60, the inner vias 54 and 56 and the power supply ground bypass capacitor 52 may be connected by laminating copper plating or the like.

  When the power supply ground bypass capacitor 52 is mounted on the inner layer (L4 layer) and the power supply ground bypass capacitor 52, the conductor pattern 18, and the GND layer 36 are connected using the inner vias 54 and 56, respectively, the power ground ground bypass Compared to the case where the capacitor 52 is mounted on the surface layer, the bypass capacitor 52 between the power supply grounds can be placed at the optimal position of the conductor pattern end of the power supply layer 24, and the electrical length is increased by the thickness equivalent to the multilayer printed wiring board 50. Can be shortened. In addition, by connecting between inner layers using inner via technology, the through-hole and inner-layer clearance around the through-hole that is essential when the bypass capacitor 52 between the power grounds is mounted on the surface layer is not required, and the power layer 24 and the GND layer It is possible to prevent the influence of the slit when the return current is generated at 36, that is, the detour of the return current path.

  As a result of such a configuration, the bypass capacitor 52 between the power supply grounds is mounted on the inner component mounting layer (L4) along the vertical upper side of the peripheral edge of the conductor patterns 14, 16, and 18, and extends in the vertical lower or upper direction. The vias 54 and 56 are connected to the power supply layer 24 and the GND layer 36. Therefore, as shown in FIG. 7, there is no open end that can be an unnecessary radiation source (antenna) at the periphery of the multilayer printed wiring board 50 of the conductor patterns 14, 16, 18 and the GND layer 36. Alternatively, if the remaining open ends of the conductor patterns 14, 16, 18 and the GND layer 36 are kept within 5 mm, unnecessary radiation noise is reduced as compared with the conventional printed circuit version.

  Next, an example of the operation when various electronic components are mounted on the multilayer printed wiring board 50 according to the present embodiment will be described. When an electronic device or the like in which the multilayer printed wiring board 50 is built-in operates, inner layer planes such as the power supply layer 24 and the GND layer 36 resonate, and unnecessary radiation noise is generated. However, as shown in FIG. 7, the power source ground bypass capacitor 52 and the inner vias 54 and 56 are not formed at the ends of the power supply layer 24 and the GND layer 36 without forming a remaining open end that can be an antenna for unnecessary radiation noise. The return current path 124 is secured by the power supply layer 24 and the GND layer 36 so as to surround and cover the outer peripheral edge of the multilayer printed wiring board 50. As described above, the unnecessary ground noise can be prevented from leaking to the outside by the bypass capacitor 52 between the power supply grounds.

  Further, as shown in FIG. 8, the end of the conductor patterns 14, 16, and 18 (other than the outer periphery of the multilayer printed wiring board 50) does not have a remaining open end that can be an antenna for unnecessary radiation noise. Since the return current path 124 is secured by the intermediate bypass capacitor 52 and the inner vias 54 and 56, the unnecessary radiation noise does not propagate to the adjacent conductor pattern across the discontinuous portion. That is, unnecessary radiation noise is reduced by providing the power supply ground bypass capacitor 52 not only on the outer periphery of the multilayer printed wiring board 50 but also on the inner side.

  Further, the bypass capacitor 52 between power supply grounds is not mounted on the surface layer as in the conventional multilayer printed wiring board, but is mounted on the inner component mounting layer (L4 layer). The electrical length of the path is shorter than that of a conventional multilayer printed wiring board. Further, since it is not necessary to provide a through-hole as in the conventional substrate on which the power supply ground bypass capacitor 52 is mounted on the surface layer, a discontinuous portion for clearance is not formed in the GND layer. Therefore, with respect to the return current generated in the power supply layer 24 and the GND layer 36, the discontinuous portion does not prevent the shortest return path from being prevented.

  Under such operation, about 10dB reduction effect is recognized for unnecessary radiation of high-order harmonics generated by high-speed signal lines, and EMI characteristics are improved.

  As described above, the multilayer printed wiring boards 10 and 50 in which the power supply bypass capacitor 12 and / or the power supply ground bypass capacitor 52 are mounted on the inner component mounting layer have been described, but the embodiment of the present invention is not limited thereto. As long as the present invention can be implemented, the design can be changed as appropriate. Of course, regardless of the manufacturing method, if the completed circuit device has a structure similar to that of the multilayer printed wiring boards 10 and 50, an effect specific to the present invention can be obtained.

In the Example of the multilayer printed wiring board which concerns on this invention, it is a figure which shows the cross section parted in the orthogonal | vertical direction with respect to the surface which forms a layer. In the multilayer printed wiring board shown in FIG. 1, it is a top view which shows arrangement | positioning of the bypass capacitor between power supplies on an inner layer. In the same Example, it is a perspective view which shows arrangement | positioning of the bypass capacitor between power supplies. It is a figure which shows the cross section cut | disconnected in the orthogonal | vertical direction with respect to the surface which forms the layer which shows the modification of the multilayer printed wiring board shown in FIG. It is a top view which shows arrangement | positioning of the bypass capacitor between power supply grounds on an inner layer in another Example of the multilayer printed wiring board which concerns on this invention. FIG. 6 is a diagram showing a cross section of the multilayer printed wiring board shown in FIG. FIG. 6 is a view showing a cross section of the embodiment shown in FIG. 5 cut at an angle different from that in FIG. 6. FIG. 6 is a diagram showing a cross-section obtained by dividing a place different from FIG. 6 in the vertical direction in the embodiment of FIG. 5.

Explanation of symbols

10 Multilayer printed wiring board
12 Power supply bypass capacitor
14 5V conductor pattern
16 3.3V conductor pattern
18 2.5V conductor pattern
24 Power layer
26, 28 Inner via
34 GND layer
50 multilayer printed wiring board
52 Power supply ground bypass capacitor
54, 56 Inner via

Claims (7)

In a multilayer printed wiring board having a power source layer as an inner layer that is divided into a plurality of conductor patterns by providing discontinuous portions that are insulated and supplies different driving voltages to the mounted electronic components for each of the conductor patterns. ,
On the inner layer of the multilayer printed wiring board, a plurality of capacitors for connecting the plurality of conductor patterns at a high frequency is mounted on a surface that is translated in a direction perpendicular to the surface on which the discontinuous portion is provided. A multilayer printed wiring board characterized by being made. The multilayer printed wiring board according to claim 1, wherein the multilayer printed wiring board has a signal line wired to propagate a signal between the electronic components,
The multilayer printed wiring board, wherein the capacitor is mounted on a line translated in a direction perpendicular to a wiring position of the signal line. In the multilayer printed wiring board according to claim 1 or 2,
The capacitor is mounted on an inner layer mounting layer capable of mounting the electronic component which is an inner layer different from the ground layer for supplying the power supply layer and a reference potential to the electronic component,
An insulating layer made of an insulator is provided between the inner layer mounting layer and the power supply layer, and an inner via is formed in the insulating layer to connect any one of the conductor patterns to the capacitor. Printed wiring board.   3. The multilayer printed wiring board according to claim 1, wherein the capacitor is mounted on the power supply layer. 4. A power supply layer that is divided into a plurality of conductor patterns by providing discontinuous portions that are insulated and supplies different driving voltages for each of the conductor patterns to electronic components to be mounted;
In a multilayer printed wiring board having a ground layer as an inner layer for supplying a reference potential to the electronic component,
The multilayer printed wiring board further includes an inner layer mounting layer on which the electronic component can be mounted on an inner layer, and a surface of the inner layer mounting layer that is translated in a direction perpendicular to the peripheral portion of the conductor pattern. A multilayer printed wiring board, wherein a plurality of capacitors for connecting the conductor pattern and the ground layer at a high frequency are mounted.   6. The multilayer printed wiring board according to claim 5, wherein the capacitor is on a surface that is translated in a direction perpendicular to a surface within 5 mm from the end of the conductor pattern on the surface of the inner layer mounting layer. A multilayer printed wiring board characterized by being mounted on.   7. The multilayer printed wiring board according to claim 5, wherein an insulating layer made of an insulator is provided between the inner layer mounting layer, the power supply layer, and the ground layer, and the conductor layer includes the conductor pattern. A multilayer printed wiring board, wherein any one of the ground layer and the inner via for conducting the capacitor is formed.

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