CN106601810A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
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- CN106601810A CN106601810A CN201510673054.9A CN201510673054A CN106601810A CN 106601810 A CN106601810 A CN 106601810A CN 201510673054 A CN201510673054 A CN 201510673054A CN 106601810 A CN106601810 A CN 106601810A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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- H10P14/38—
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Abstract
Description
技术领域technical field
本发明涉及半导体器件制造方法领域,具体而言,涉及一种FinFET半导体器件的制造方法。The present invention relates to the field of semiconductor device manufacturing methods, in particular to a method for manufacturing FinFET semiconductor devices.
背景技术Background technique
近30年来,半导体器件一直按照摩尔定律等比例缩小,半导体集成电路的特征尺寸不断缩小,集成度不断提高。随着技术节点进入深亚微米领域,例如100nm以内,甚至45nm以内,传统场效应晶体管(FET),也即平面FET,开始遭遇各种基本物理定律的限制,使其等比例缩小的前景受到挑战。众多新型结构的FET被开发出来,以应对现实的需求,其中,集成了高迁移率沟道的FinFET就是一种很具等比例缩小潜力的新结构器件。In the past 30 years, semiconductor devices have been proportionally reduced in accordance with Moore's law, the feature size of semiconductor integrated circuits has been continuously reduced, and the integration level has been continuously improved. As the technology node enters the deep sub-micron field, such as within 100nm or even within 45nm, the traditional field effect transistor (FET), that is, planar FET, begins to encounter the limitations of various basic physical laws, making its prospect of scaling down challenged . Many new structure FETs have been developed to meet the actual needs, among which, the FinFET integrated with high mobility channel is a new structure device with great potential for scaling down.
高迁移率沟道FinFET器件的制作方法通常为在硅衬底上生长高迁移率沟道材料。高迁移率沟道通常由高迁移率材料构成,如锗,锗硅,三五族材料,二六族材料等。在生长完成高迁移率材料之后,形成由高迁移率材料构成的鳍片(Fin)。现有技术中相对比较简单的集成方案为在硅衬底直接外延一层锗硅作为高迁移率材料,之后进行图案化处理,形成鳍片;再后形成STI结构,进行电学隔离。The manufacturing method of the high mobility channel FinFET device is usually to grow the high mobility channel material on the silicon substrate. The high-mobility channel is usually made of high-mobility materials, such as germanium, silicon germanium, group III and V materials, and group II and VI materials. After the growth of the high-mobility material is completed, fins (Fin) made of the high-mobility material are formed. A relatively simple integration solution in the prior art is to directly epitaxially epitaxial a layer of silicon germanium on a silicon substrate as a high-mobility material, and then perform patterning to form fins; and then form an STI structure for electrical isolation.
但是常规的集成工艺面临一些问题。当高迁移率材料例如锗的浓度越高时,载流子迁移率越高,但是随着锗浓度的升高,锗硅或者锗的外延层的关键厚度(critical thickness,即超过这个厚度就会产生较多的缺陷)就会降低;而当外延层中缺陷较多时,沟道材料的载流子迁移率将会退化,从而阻碍提高器件的性能。另外,如果通过热氧化来提高锗的浓度,会导致在高温过程中锗向衬底扩散,从而造成锗流失而无法获得具有较高浓度锗的器件沟道。现有技术中通常采用SOI衬底来解决扩散问题,衬底中的埋氧层将会阻止锗向衬底内的扩散,但是SOI衬底的高昂成本阻止了这一方案的更广泛应用。But the conventional integration process faces some problems. When the concentration of high-mobility materials such as germanium is higher, the carrier mobility is higher, but as the concentration of germanium increases, the critical thickness of the epitaxial layer of germanium silicon or germanium (critical thickness, that is, exceeding this thickness will be reduced) More defects) will be reduced; and when there are more defects in the epitaxial layer, the carrier mobility of the channel material will be degraded, which hinders the improvement of device performance. In addition, if the concentration of germanium is increased through thermal oxidation, germanium will diffuse to the substrate during the high temperature process, resulting in the loss of germanium and failing to obtain a device channel with a higher concentration of germanium. In the prior art, an SOI substrate is usually used to solve the diffusion problem, and the buried oxide layer in the substrate will prevent germanium from diffusing into the substrate, but the high cost of the SOI substrate prevents the wider application of this solution.
因此,需要提供一种新的FinFET制造方法,以更加简便、有效的方法形成高迁移率沟道。Therefore, it is necessary to provide a new FinFET manufacturing method to form a high-mobility channel in a simpler and more effective way.
发明内容Contents of the invention
本发明提出了一种FinFET制造方法,采用对高迁移率材料层进行氧化处理的方式,更加简便、有效的方法形成高迁移率沟道FinFET器件。The invention proposes a FinFET manufacturing method, which adopts the method of oxidizing the high-mobility material layer to form a high-mobility channel FinFET device in a more convenient and effective way.
本发明提供了一种半导体器件制造方法,用于制造FinFET器件,包括如下步骤:The invention provides a method for manufacturing a semiconductor device, which is used to manufacture a FinFET device, comprising the following steps:
提供衬底;provide the substrate;
在所述衬底上形成防锗扩散阻挡层;forming an anti-germanium diffusion barrier layer on the substrate;
在所述防锗扩散阻挡层上形成低浓度锗硅层;forming a low-concentration germanium-silicon layer on the germanium-resistant diffusion barrier layer;
进行一次或者多次氧化工艺,消耗所述低浓度锗硅层中的硅,从而提高所述低浓度锗硅层中的锗含量,形成高浓度锗硅层。Perform one or more oxidation processes to consume silicon in the low-concentration silicon-germanium layer, thereby increasing the content of germanium in the low-concentration silicon-germanium layer to form a high-concentration silicon-germanium layer.
根据本发明的一个方面,在进行一次或者多次氧化工艺之后,形成包括所述高浓度锗硅层的鳍片。According to one aspect of the present invention, after performing one or more oxidation processes, the fins including the high-concentration germanium-silicon layer are formed.
根据本发明的一个方面,所述防锗扩散阻挡层包括碳元素。According to one aspect of the present invention, the anti-germanium diffusion barrier layer includes carbon element.
根据本发明的一个方面,所述低浓度锗硅层采用外延工艺形成,锗浓度为5%-50%。According to one aspect of the present invention, the low-concentration germanium-silicon layer is formed by an epitaxial process, and the concentration of germanium is 5%-50%.
根据本发明的一个方面,所述氧化工艺的参数为:温度500~1200℃,氧化时间为1分钟~10小时。According to one aspect of the present invention, the parameters of the oxidation process are: a temperature of 500-1200° C., and an oxidation time of 1 minute to 10 hours.
本发明的优点在于:采用了一次或者多次氧化工艺,对低浓度的锗硅层进行处理,消耗其中的硅原子,进而增加锗原子的浓度,有利于获得具有更高迁移率的器件沟道,使FinFET性能进一步的提高成为可能;同时,由于本发明的衬底采用了体硅衬底,相比于SOI衬底,可以大幅降低成本,而且氧化工艺与传统工艺兼容,并不会增加工艺难度。The advantage of the present invention is that one or more oxidation processes are used to process the low-concentration germanium-silicon layer, consume the silicon atoms therein, and increase the concentration of germanium atoms, which is beneficial to obtain device channels with higher mobility , making it possible to further improve the performance of FinFET; at the same time, because the substrate of the present invention uses a bulk silicon substrate, compared with the SOI substrate, the cost can be greatly reduced, and the oxidation process is compatible with the traditional process, and does not increase the process difficulty.
附图说明Description of drawings
图1-4本发明提供的半导体制造方法的流程示意图。1-4 are schematic flow charts of the semiconductor manufacturing method provided by the present invention.
具体实施方式detailed description
以下,通过附图中示出的具体实施例来描述本发明。但是应该理解,这些描述只是示例性的,而并非要限制本发明的范围。此外,在以下说明中,省略了对公知结构和技术的描述,以避免不必要地混淆本发明的概念。Hereinafter, the present invention is described by means of specific embodiments shown in the drawings. It should be understood, however, that these descriptions are exemplary only and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.
本发明提供一种半导体器件制造方法,具体而言,涉及一种FinFET器件制造方法。下面,参见说明书附图,将详细描述本发明提供的半导体器件制造方法。The invention provides a method for manufacturing a semiconductor device, and in particular, relates to a method for manufacturing a FinFET device. Hereinafter, referring to the accompanying drawings, the semiconductor device manufacturing method provided by the present invention will be described in detail.
首先,参见附图1,提供衬底1,在衬底1上形成防锗扩散阻挡层2。在本发明优选实施例中,衬底1为体硅衬底,相比于SOI衬底,其有利于降低成本。防锗扩散阻挡层2用于防止随后形成的高迁移率外延层中的杂质元素扩散至衬底以及防止衬底1内的掺杂元素扩散至外延层中,可以采用在衬底1上注入或者外延的方式形成。防锗扩散阻挡层2包括原子序数小于锗的元素,优选采用碳元素产生阻挡作用,其厚度优选为厚度为1-100nm,优选为5-20nm。First, referring to FIG. 1 , a substrate 1 is provided, and an anti-germanium diffusion barrier layer 2 is formed on the substrate 1 . In a preferred embodiment of the present invention, the substrate 1 is a bulk silicon substrate, which is beneficial to reduce costs compared with an SOI substrate. The anti-germanium diffusion barrier layer 2 is used to prevent impurity elements in the subsequently formed high-mobility epitaxial layer from diffusing to the substrate and to prevent dopant elements in the substrate 1 from diffusing into the epitaxial layer. Implantation on the substrate 1 or formed in an epitaxial manner. The anti-germanium diffusion barrier layer 2 includes elements with an atomic number smaller than that of germanium, preferably carbon elements for barrier effect, and its thickness is preferably 1-100 nm, preferably 5-20 nm.
接着,参见图2,在防锗扩散阻挡层2上形成低浓度锗硅层3。其中,形成低浓度锗硅层3的方式为外延。其中,“低浓度”是相对于之后通过氧化工艺提高了锗浓度的高迁移率锗硅材料层而言的,优选地,低浓度锗硅层3中锗的浓度为5%-50%,优选为25%-50%。低浓度锗硅层3的厚度依据所要形成的FinFET器件鳍片高度而设定,优选为10nm-100nm,优选为30nm-60nm。Next, referring to FIG. 2 , a low-concentration silicon-germanium layer 3 is formed on the anti-germanium diffusion barrier layer 2 . Wherein, the method of forming the low-concentration germanium-silicon layer 3 is epitaxy. Wherein, "low concentration" refers to the high-mobility germanium-silicon material layer whose germanium concentration is increased through an oxidation process. Preferably, the concentration of germanium in the low-concentration germanium-silicon layer 3 is 5%-50%, preferably 25%-50%. The thickness of the low-concentration germanium-silicon layer 3 is set according to the fin height of the FinFET device to be formed, preferably 10nm-100nm, preferably 30nm-60nm.
之后,参见图3,进行一次或者多次氧化工艺,消耗低浓度锗硅层3中的硅,从而提高低浓度锗硅层3中的锗含量,获得高浓度锗硅层4,其锗的浓度为40~80%。氧化工艺的设置为:氧化工艺气氛为含氧元素的气体,优选为氧气;氧化温度为500~1200℃,优选为500~1050℃;氧化时间优选为1分钟~10小时,优选为10分钟~2小时。此处氧化工艺可根据需要选择进行一次或者多次氧化,氧化时间以及氧化温度根据上述设置进行选择。氧化工艺中,低浓度锗硅层3中的硅被氧化而生成氧化硅,经过一次或者多次的氧化工艺处理,低浓度锗硅层3中的硅被消耗。在这个过程后,低浓度锗硅层3中的锗浓度升高,进而变成高浓度锗硅层4。Afterwards, referring to FIG. 3 , one or more oxidation processes are performed to consume the silicon in the low-concentration silicon-germanium layer 3, thereby increasing the germanium content in the low-concentration silicon-germanium layer 3 to obtain the high-concentration silicon-germanium layer 4. The concentration of germanium in the silicon germanium layer is 40-80%. The oxidation process is set as follows: the oxidation process atmosphere is a gas containing oxygen elements, preferably oxygen; the oxidation temperature is 500-1200°C, preferably 500-1050°C; the oxidation time is preferably 1 minute-10 hours, preferably 10 minutes- 2 hours. Here, the oxidation process can be selected to perform one or more oxidations as required, and the oxidation time and oxidation temperature are selected according to the above settings. In the oxidation process, the silicon in the low-concentration silicon-germanium layer 3 is oxidized to form silicon oxide, and the silicon in the low-concentration silicon-germanium layer 3 is consumed after one or more oxidation processes. After this process, the germanium concentration in the low-concentration silicon-germanium layer 3 increases, and then becomes the high-concentration silicon-germanium layer 4 .
接着,参见图4,在获得高浓度锗硅层4之后,形成包括高浓度锗硅层4的鳍片,以及不同鳍片之间的隔离结构5。Next, referring to FIG. 4 , after the high-concentration silicon-germanium layer 4 is obtained, fins including the high-concentration silicon-germanium layer 4 and isolation structures 5 between different fins are formed.
以上,本发明的半导体器件制造方法已得到说明。在本发明的方法中,采用了一次或者多次氧化工艺,对低浓度的锗硅层进行处理,消耗其中的硅原子,进而增加锗原子的浓度,有利于获得具有更高迁移率的器件沟道,使FinFET性能进一步的提高成为可能;同时,由于本发明的衬底采用了体硅衬底,相比于SOI衬底,可以大幅降低成本,而且氧化工艺与传统工艺兼容,并不会增加工艺难度。In the above, the semiconductor device manufacturing method of the present invention has been described. In the method of the present invention, one or more oxidation processes are used to process the low-concentration germanium-silicon layer, consume the silicon atoms therein, and increase the concentration of germanium atoms, which is beneficial to obtain device trenches with higher mobility. It makes it possible to further improve the performance of FinFET; at the same time, because the substrate of the present invention uses a bulk silicon substrate, compared with the SOI substrate, the cost can be greatly reduced, and the oxidation process is compatible with the traditional process, and will not increase Craft difficulty.
本发明的方法不仅可以针对锗硅材料层,还可以针对其它适于采用氧化工艺分离硅和高迁移率元素材料的材料层。The method of the present invention can not only be aimed at the silicon germanium material layer, but also can be aimed at other material layers suitable for separating silicon and high-mobility element materials by adopting an oxidation process.
尽管已参照一个或多个示例性实施例说明本发明,本领域技术人员可以知晓无需脱离本发明范围而对器件结构和/或工艺流程做出各种合适的改变和等价方式。此外,由所公开的教导可做出许多可能适于特定情形或材料的修改而不脱离本发明范围。因此,本发明的目的不在于限定在作为用于实现本发明的最佳实施方式而公开的特定实施例,而所公开的器件结构及其制造方法将包括落入本发明范围内的所有实施例。Although the invention has been described with reference to one or more exemplary embodiments, those skilled in the art will recognize various suitable changes and equivalents in device structures and/or process flows without departing from the scope of the invention. In addition, many modifications, possibly suited to a particular situation or material, may be made from the disclosed teaching without departing from the scope of the invention. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best mode for carrying out this invention, but that the disclosed device structures and methods of making the same will include all embodiments falling within the scope of the invention .
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| US20140170839A1 (en) * | 2012-12-17 | 2014-06-19 | Globalfoundries Inc. | Methods of forming fins for a finfet device wherein the fins have a high germanium content |
| US20150255456A1 (en) * | 2014-03-04 | 2015-09-10 | Globalfoundries Inc. | Replacement fin insolation in a semiconductor device |
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| CN101752258A (en) * | 2008-12-05 | 2010-06-23 | 台湾积体电路制造股份有限公司 | Methods of Forming Semiconductor Structures |
| CN101986423A (en) * | 2009-07-28 | 2011-03-16 | 台湾积体电路制造股份有限公司 | Method for forming silicon-germanium stressors with high germanium concentration and integrated circuit transistor structure |
| US20140170839A1 (en) * | 2012-12-17 | 2014-06-19 | Globalfoundries Inc. | Methods of forming fins for a finfet device wherein the fins have a high germanium content |
| US20150255456A1 (en) * | 2014-03-04 | 2015-09-10 | Globalfoundries Inc. | Replacement fin insolation in a semiconductor device |
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