CN106292104B - 阵列基板及其制作方法、液晶面板 - Google Patents
阵列基板及其制作方法、液晶面板 Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title description 6
- 239000010410 layer Substances 0.000 claims abstract description 114
- 239000012044 organic layer Substances 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000002161 passivation Methods 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 239000012528 membrane Substances 0.000 description 5
- 229910004205 SiNX Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
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- 229910052814 silicon oxide Inorganic materials 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 1
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- 230000005622 photoelectricity Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
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Abstract
本发明公开了一种阵列基板,其包括:基板;在基板上的栅极线以及与栅极线连接的栅极;覆盖栅极线和栅极的第一绝缘层;在第一绝缘层上的有源层;在第一绝缘层上且将有源层暴露的有机层;在有机层上的源极、漏极以及与源极连接的数据线,源极和漏极分别与有源层接触,数据线与栅极线重叠在一起;覆盖源极、漏极、数据线以及有源层的第二绝缘层;在第二绝缘层中的过孔,过孔暴露漏极;在第二绝缘层上的像素电极,像素电极通过过孔接触漏极。与现有技术的数据线与栅极线正交设置相比,本发明的阵列基板通过使数据线与栅极线重叠在一起,减小栅极线和数据线所占基板的空间,从而实现开口率的提升。
Description
技术领域
本发明属于液晶显示技术领域,具体地讲,涉及一种阵列基板及其制作方法、液晶面板。
背景技术
随着光电与半导体技术的演进,也带动了平板显示器(Flat Panel Display)的蓬勃发展,而在诸多平板显示器中,液晶显示器(Liquid Crystal Display,简称LCD)因具有高空间利用效率、低消耗功率、无辐射以及低电磁干扰等诸多优越特性,已被应用于生产生活的各个方面。
液晶显示器通常包括相对设置的液晶面板和背光模块,其中,由于液晶面板无法发光,因此需要背光模块向液晶面板提供均匀的面光源,以使液晶面板显示影像。
在现有的液晶面板中,栅极线和数据线正交交错设置。然而,在这种走线方式下,栅极线和数据线占用了基板的大量空间,不利于实现高开口率。
发明内容
为了解决上述技术问题,本发明提供了一种栅极线和数据线重叠在一起的阵列基板及其制作方法、液晶面板。
根据本发明的一方面,提供了一种阵列基板,其包括:基板;在基板上的栅极线以及与所述栅极线连接的栅极;覆盖所述栅极线和所述栅极的第一绝缘层;在所述第一绝缘层上的有源层;在所述第一绝缘层上且将所述有源层暴露的有机层;在所述有机层上的源极、漏极以及与所述源极连接的数据线,所述源极和所述漏极分别与所述有源层接触,所述数据线与所述栅极线重叠在一起;覆盖所述源极、所述漏极、所述数据线以及所述有源层的第二绝缘层;在第二绝缘层中的过孔,所述过孔暴露所述漏极;在所述第二绝缘层上的像素电极,所述像素电极通过所述过孔接触所述漏极。
进一步地,所述有机层中具有通孔,所述通孔的宽度大于所述有源层的宽度,以将所述有源层及其周围的第一绝缘层暴露。
进一步地,在所述有机层上的源极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的一端之上,在所述有机层上的漏极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的另一端之上。
进一步地,所述栅极与所述有源层正相对设置。
根据本发明的另一方面,提供了一种阵列基板的制作方法,其包括:提供一基板;在基板上形成栅极线以及与所述栅极线连接的栅极;在基板上形成覆盖所述栅极线和所述栅极的第一绝缘层;在所述第一绝缘层上形成有源层;在所述第一绝缘层上形成将所述有源层暴露的有机层;在所述有机层上形成源极、漏极以及与所述源极连接的数据线;其中,所述源极和所述漏极分别与所述有源层接触,所述数据线与所述栅极线重叠在一起;在所述有源层上形成覆盖所述源极、所述漏极及所述数据线的第二绝缘层;在第二绝缘层中形成过孔;其中,所述过孔暴露所述漏极;在所述第二绝缘层上形成像素电极;其中,所述像素电极通过所述过孔接触所述漏极。
进一步地,所述过孔暴露所述漏极的具体实现方法为:在所述有机层中形成通孔;其中,所述通孔的宽度大于所述有源层的宽度,以将所述有源层及其周围的第一绝缘层暴露。
进一步地,所述源极和所述漏极分别与所述有源层接触的具体实现方法为:使在所述有机层上的源极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的一端之上,并使在所述有机层上的漏极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的另一端之上。
根据本发明的又一方面,提供了一种液晶面板,其包括对盒设置的彩膜基板以及阵列基板,所述阵列基板为上述的阵列基板,或者利用上述的制作方法制作所述阵列基板。
本发明的有益效果:与现有技术的数据线与栅极线正交设置相比,本发明的阵列基板及其制作方法,通过使数据线与栅极线重叠在一起,减小栅极线和数据线所占基板的空间,从而实现开口率的提升。
附图说明
通过结合附图进行的以下描述,本发明的实施例的上述和其它方面、特点和优点将变得更加清楚,附图中:
图1根据本发明的实施例的液晶面板的结构示意图;
图2是根据本发明的实施例的阵列基板的平面图;
图3是根据本发明的实施例的阵列基板的侧视图;
图4是根据本发明的实施例的阵列基板的制作方法的流程图。
具体实施方式
以下,将参照附图来详细描述本发明的实施例。然而,可以以许多不同的形式来实施本发明,并且本发明不应该被解释为限制于这里阐述的具体实施例。相反,提供这些实施例是为了解释本发明的原理及其实际应用,从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
在附图中,为了清楚器件,夸大了层和区域的厚度。相同的标号在附图中始终表示相同的元件。
图1根据本发明的实施例的液晶面板的结构示意图。
参照图1,根据本发明的实施例的液晶面板包括:对盒设置的阵列基板(Array基板)100和彩膜基板(CF基板)200,以及夹设于阵列基板100和彩膜基板200之间的液晶层300,其中,液晶层300中具有若干液晶分子。彩膜基板200通常包括由红(R)滤光片、绿(G)滤光片、蓝(B)滤光片构成的彩色滤光片、黑色矩阵、配向膜等。更加详细地彩膜基板的结构请参照相关的现有技术,这里不再赘述。
以下对根据本发明的实施例的阵列基板100进行详细说明。图2是根据本发明的实施例的阵列基板的平面图。图3是根据本发明的实施例的阵列基板的侧视图。图4是根据本发明的实施例的阵列基板的制作方法的流程图。在图2中,为了清楚地示出漏极160a、源极160b以及与源极160b连接的数据线160c的结构,未示出钝化层170及形成在钝化层170中的过孔171。钝化层170及过孔171的结构请参照图3。
参照图2至图4,在步骤S410中,提供一基板110。这里,该基板110可以是透明的玻璃基板或者树脂基板。
在步骤S420中,在基板110上形成栅极线120a以及与栅极线120a连接的栅极120b。这里,可对形成在基板110上的金属层(未示出)进行曝光、显影,从而形成栅极线120a和栅极120b。也就是说,栅极线120a和栅极120b由金属材料制成。
在步骤S430中,在基板110上形成覆盖栅极线120a和栅极120b的栅极绝缘层130。这里,栅极绝缘层130可以由SiOx、SiNx或者二者的混合物形成。
在步骤S440中,在栅极绝缘层130上形成有源层140。这里,有源层140可以由非晶硅(a-Si)形成。进一步地,也可以对非晶硅的上层部分进行掺杂,从而使有源层140的下层部分为非晶硅,上层部分为掺杂非晶硅。
进一步优选地,有源层140和栅极120b正相对设置,但本发明并不限制于此。
在步骤S450中,在栅极绝缘层130上形成将有源层140暴露的有机层150。
进一步地,有机层150将有源层140暴露的实现方法为:在有机层150中形成通孔151,使通孔151的宽度大于有源层140的宽度,以将有源层140及其周围的栅极绝缘层130暴露。
在步骤S460中,在有机层150上形成漏极160a、源极160b以及与源极160b连接的数据线160c;其中,漏极160a和源极160b分别与有源层140接触,并且数据线160c与栅极线120a重叠在一起。进一步地,从空间上看,数据线160c与栅极线120a上下平行且重叠在一起。
进一步地,漏极160a和源极160b分别与有源层140接触的具体实现方法为:
使在有机层150上的源极160b经过由通孔151暴露的栅极绝缘层130而延伸至有源层140的一端之上,并使在有机层150上的漏极160a经过由通孔151暴露的栅极绝缘层130而延伸至有源层150的另一端之上。
在步骤S470中,在有机层150上形成覆盖漏极160a、源极160b以及数据线160c的钝化层170。这里,钝化层170可以由SiOx、SiNx或者二者的混合物形成。
在步骤S480中,在钝化层170中形成过孔171,其中,过孔171暴露漏极160a。进一步地,过孔171暴露漏极160a的部分。
在步骤S490中,在钝化层170上形成像素电极180;其中,像素电极180通过过孔171接触漏极160a。
综上所述,与现有技术的数据线与栅极线正交设置相比,根据本发明的实施例的阵列基板及其制作方法,通过使数据线与栅极线重叠在一起,减小栅极线和数据线所占基板的空间,从而实现开口率的提升。
虽然已经参照特定实施例示出并描述了本发明,但是本领域的技术人员将理解:在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下,可在此进行形式和细节上的各种变化。
Claims (10)
1.一种阵列基板,其特征在于,包括:
基板;
在基板上的栅极线以及与所述栅极线连接的栅极;
覆盖所述栅极线和所述栅极的第一绝缘层;
在所述第一绝缘层上的有源层;
在所述第一绝缘层上且将所述有源层暴露的有机层;
在所述有机层上的源极、漏极以及与所述源极连接的数据线,所述源极和所述漏极分别与所述有源层接触,所述阵列基板的所有栅极线分别与对应的数据线重叠在一起;
覆盖所述源极、所述漏极、所述数据线以及所述有源层的第二绝缘层;
在第二绝缘层中的过孔,所述过孔暴露所述漏极;
在所述第二绝缘层上的像素电极,所述像素电极通过所述过孔接触所述漏极。
2.根据权利要求1所述的阵列基板,其特征在于,所述有机层中具有通孔,所述通孔的宽度大于所述有源层的宽度,以将所述有源层及其周围的第一绝缘层暴露。
3.根据权利要求2所述的阵列基板,其特征在于,在所述有机层上的源极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的一端之上,在所述有机层上的漏极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的另一端之上。
4.根据权利要求1所述的阵列基板,其特征在于,所述栅极与所述有源层正相对设置。
5.一种阵列基板的制作方法,其特征在于,包括:
提供一基板;
在基板上形成栅极线以及与所述栅极线连接的栅极;
在基板上形成覆盖所述栅极线和所述栅极的第一绝缘层;
在所述第一绝缘层上形成有源层;
在所述第一绝缘层上形成将所述有源层暴露的有机层;
在所述有机层上形成源极、漏极以及与所述源极连接的数据线;其中,所述源极和所述漏极分别与所述有源层接触,所述阵列基板的所有栅极线分别与对应的数据线重叠在一起;
在所述有源层上形成覆盖所述源极、所述漏极及所述数据线的第二绝缘层;
在第二绝缘层中形成过孔;其中,所述过孔暴露所述漏极;
在所述第二绝缘层上形成像素电极;其中,所述像素电极通过所述过孔接触所述漏极。
6.根据权利要求5所述的阵列基板的制作方法,其特征在于,所述过孔暴露所述漏极的具体实现方法为:
在所述有机层中形成通孔;其中,所述通孔的宽度大于所述有源层的宽度,以将所述有源层及其周围的第一绝缘层暴露。
7.根据权利要求6所述的阵列基板的制作方法,其特征在于,所述源极和所述漏极分别与所述有源层接触的具体实现方法为:
使在所述有机层上的源极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的一端之上,并使在所述有机层上的漏极经过由所述通孔暴露的第一绝缘层而延伸至所述有源层的另一端之上。
8.根据权利要求5所述的阵列基板的制作方法,其特征在于,所述栅极与所述有源层正相对设置。
9.一种液晶面板,包括对盒设置的彩膜基板以及阵列基板,其特征在于,所述阵列基板为权利要求1至4任一项所述的阵列基板。
10.一种液晶面板,包括对盒设置的彩膜基板以及阵列基板,其特征在于,利用权利要求5至8任一项所述的制作方法制作所述阵列基板。
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| PCT/CN2016/100046 WO2018040159A1 (zh) | 2016-08-30 | 2016-09-26 | 阵列基板及其制作方法、液晶面板 |
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| JP2015149467A (ja) * | 2014-01-10 | 2015-08-20 | 株式会社Joled | 薄膜トランジスタ基板の製造方法 |
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