CN105810817A - A Two-Dimensional Nanosheet MoS2 Vertical Structure Resistive Switching Device - Google Patents
A Two-Dimensional Nanosheet MoS2 Vertical Structure Resistive Switching Device Download PDFInfo
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- 229910052982 molybdenum disulfide Inorganic materials 0.000 title claims abstract description 25
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- 239000010410 layer Substances 0.000 claims abstract description 50
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000011241 protective layer Substances 0.000 claims abstract description 10
- 229910004298 SiO 2 Inorganic materials 0.000 claims abstract description 9
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- 238000004544 sputter deposition Methods 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 8
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- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims 1
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- H10N70/20—Multistable switching devices, e.g. memristors
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
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Abstract
一种二维纳米片层MoS2垂直结构阻变器件，由氧化硅片衬底、Ti粘附层、下电极、阻变层、上电极和上电极SiO2保护层组成垂直结构，其中阻变层为具有“三明治夹心”层状结构的二维纳米片层MoS2，各层厚度分别为：Ti粘附层2‑5nm、下电极50‑200nm、二维纳米片层MoS20.65‑10nm、上电极50‑200nm、上电极SiO2保护层5‑10nm。本发明的优点是：1)该阻变器件采用二维纳米片层MoS2作为阻变存储器的阻变层，扩展了阻变存储器中的介质层材料体系，填补了二维纳米片层MoS2在阻变存储器中应用的空白；2)该阻变器件为单纯的垂直叠层结构，制作简单、成本低廉并且易于集成。
A two-dimensional nanosheet MoS 2 vertical structure resistive switch device, which consists of a silicon oxide substrate, a Ti adhesion layer, a lower electrode, a resistive switch layer, an upper electrode, and a SiO 2 protective layer on the upper electrode. The layer is a two-dimensional nanosheet MoS 2 with a "sandwich sandwich" layered structure. The thickness of each layer is: Ti adhesion layer 2-5nm, bottom electrode 50-200nm, two-dimensional nanosheet MoS 2 0.65-10nm, The upper electrode is 50-200nm, and the upper electrode SiO 2 protective layer is 5-10nm. The advantages of the present invention are: 1) The resistive switch device uses two -dimensional nanosheet MoS2 as the resistive layer of the resistive switchable memory, which expands the material system of the dielectric layer in the resistive switchable memory, and fills the two -dimensional nanosheet MoS2 There is a blank in the application of resistive memory; 2) The resistive device is a simple vertical stack structure, which is simple to manufacture, low in cost and easy to integrate.
Description
技术领域technical field
本发明涉及无机先进纳米薄膜材料及微电子技术领域，具体涉及一种二维纳米片层MoS2垂直结构阻变器件。The invention relates to the technical fields of inorganic advanced nanometer film materials and microelectronics, in particular to a two -dimensional nanosheet MoS2 vertical structure resistive switch device.
技术背景technical background
随着半导体工业22nm技术节点的到来，基于硅材料的传统非易失性存储器的存储密度已经越来越接近其本征极限。阻变存储器(RRAM)作为一种具有高密度存储潜力的新型非易失性存储器在20世纪90年代末以来发展十分迅速，具有结构简单、尺寸可缩小性好、擦写速度快、重复擦写次数高、数据保持时间长、多值存储和三维存储潜力等众多优点，受到了研究人员的广泛关注，近年来有很多新型结构的设计和新型材料的提出，是下一代非挥发性存储器有力的竞争者。With the advent of the 22nm technology node in the semiconductor industry, the storage density of traditional non-volatile memories based on silicon materials is getting closer and closer to its intrinsic limit. Resistive RAM (RRAM), as a new type of non-volatile memory with high-density storage potential, has developed rapidly since the late 1990s. Many advantages such as high number of times, long data retention time, multi-value storage and three-dimensional storage potential have attracted extensive attention from researchers. In recent years, many new structure designs and new materials have been proposed, which is a powerful next-generation non-volatile memory. competitor.
电阻转变指材料的电阻在电压(电场)作用下存在两个或两个以上的电阻态，并且这种电阻的改变不随时间而变化。通常把器件从高阻态转变到低阻态的这一过程称为set过程，反之，把器件从低阻态转变到高阻态的过程称为reset过程。Resistance transition means that the resistance of the material has two or more resistance states under the action of voltage (electric field), and the change of this resistance does not change with time. Usually, the process of changing a device from a high-resistance state to a low-resistance state is called a set process, and conversely, the process of changing a device from a low-resistance state to a high-resistance state is called a reset process.
阻变存储器的研发工作还处于材料研发和器件验证的初期阶段，许多问题还需要解决，其中介质材料对于阻变存储器的性能有着最直接的影响。The research and development of resistive memory is still in the initial stage of material development and device verification, and many problems still need to be solved, among which the dielectric material has the most direct impact on the performance of resistive memory.
于此同时，二维纳米片层二硫化钼作为一种重要的二维层状纳米材料引起了众多科研人员的关注，二维纳米片层二硫化钼具有“三明治夹心”层状结构，中间一层为钼原子，上下两层均为硫原子，钼原子被两层硫原子所夹形成类“三明治”结构，钼原子与硫原子以共价键结合形成二维原子晶体。二维纳米片层二硫化钼存在可调控的能带隙，在光电器件领域拥有广阔的发展前景。At the same time, as an important two-dimensional layered nanomaterial, two-dimensional nanosheet molybdenum disulfide has attracted the attention of many researchers. The two-dimensional nanosheet molybdenum disulfide has a "sandwich sandwich" layered structure. The layer is molybdenum atoms, and the upper and lower layers are sulfur atoms. Molybdenum atoms are sandwiched by two layers of sulfur atoms to form a "sandwich" structure. Molybdenum atoms and sulfur atoms are covalently bonded to form a two-dimensional atomic crystal. Two-dimensional nanosheet molybdenum disulfide has a tunable energy band gap and has broad development prospects in the field of optoelectronic devices.
2011年，Radisavljevic等人在Integrated circuits and logic operations based onsingle-layer MoS2中首次制备了二维半导体MoS2集成电路，该集成电路可用作反相器。2013年，Zhang等人在文章Graphene-Like Molybdenum Disulfide and ItsApplication in Optoelectronic Devices中通过将二硫化钼粉末置于聚乙烯基吡咯烷酮(PVP)和乙醇的混合溶液中超声，得到MoS2-PVP的纳米复合物并成功制备闪存型存储器件。In 2011, Radisavljevic et al. prepared a two-dimensional semiconductor MoS 2 integrated circuit for the first time in Integrated circuits and logic operations based onsingle-layer MoS 2 , which can be used as an inverter. In 2013, in the article Graphene-Like Molybdenum Disulfide and Its Application in Optoelectronic Devices, Zhang et al obtained MoS 2 -PVP nanocomposites by placing molybdenum disulfide powder in a mixed solution of polyvinylpyrrolidone (PVP) and ethanol sonicated and successfully prepared flash memory devices.
根据上述的技术背景，二维纳米片层MoS2在阻变存储器方面的应用还没有，本发明制备了一种二维纳米片层MoS2垂直结构阻变器件，填补了这方面的空白。According to the above technical background, there is no application of two -dimensional nanosheet MoS2 in resistive switching memory. The present invention prepares a two -dimensional nanosheet MoS2 vertical structure resistive switch device, which fills the gap in this respect.
发明内容Contents of the invention
本发明的目的是针对目前二维MoS2在阻变存储器方面存在的空白，提供了一种二维纳米片层MoS2垂直结构阻变器件，通过使用二维纳米片层作为阻变存储器的阻变层，将二维纳米片层MoS2应用于阻变存储器。The purpose of the present invention is to provide a two -dimensional nano-sheet MoS2 vertical structure resistive device for the blank of the current two -dimensional MoS2 in the resistive memory, by using two-dimensional nano-sheets as the resistive memory Variable layer, applying two -dimensional nanosheet MoS2 to resistive memory.
本发明的技术方案：Technical scheme of the present invention:
一种二维纳米片层MoS2垂直结构阻变器件，由氧化硅片衬底、Ti粘附层、下电极、阻变层、上电极和上电极SiO2保护层组成垂直结构，其中阻变层为具有“三明治夹心”层状结构的二维纳米片层MoS2，各层厚度分别为：Ti粘附层2-5nm、下电极50-200nm、二维纳米片层MoS20.65-10nm、上电极50-200nm、上电极SiO2保护层5-10nm。A two-dimensional nanosheet MoS 2 vertical structure resistive switch device, which consists of a silicon oxide substrate, a Ti adhesion layer, a lower electrode, a resistive switch layer, an upper electrode, and a SiO 2 protective layer on the upper electrode. The layer is a two-dimensional nanosheet MoS 2 with a "sandwich sandwich" layered structure. The thickness of each layer is: Ti adhesion layer 2-5nm, bottom electrode 50-200nm, two-dimensional nanosheet MoS 2 0.65-10nm, The upper electrode is 50-200nm, and the upper electrode SiO 2 protective layer is 5-10nm.
所述上、下电极材料为导电金属、金属合金、导电金属化合物和碳电极/硅电极，其中导电金属为Ta、Cu、Ag、W、Ni、AL或Pt；金属合金为Pt/Ti、Ti/Ta、Cu/Ti、Cu/Au、Cu/AL或AL/Zr；导电金属化合物为TaN、TiN、ITO、FTO、AZO或GZO；碳电极/硅电极包括石墨烯、碳纳米管、p-Si或n-Si中。The upper and lower electrode materials are conductive metals, metal alloys, conductive metal compounds and carbon electrodes/silicon electrodes, wherein the conductive metals are Ta, Cu, Ag, W, Ni, AL or Pt; the metal alloys are Pt/Ti, Ti /Ta, Cu/Ti, Cu/Au, Cu/AL or AL/Zr; conductive metal compounds are TaN, TiN, ITO, FTO, AZO or GZO; carbon electrodes/silicon electrodes include graphene, carbon nanotubes, p- Si or n-Si.
一种所述二维纳米片层MoS2垂直结构阻变器件的制备方法，以二氧化硅片作为衬底，先利用离子束溅射的方法在二氧化硅绝缘层上制备Ti粘附层，然后在Ti粘附层上制备MoS2垂直结构阻变器件，步骤如下：A preparation method of the two -dimensional nanosheet MoS2 vertical structure resistive switch device, using a silicon dioxide sheet as a substrate, first utilizing ion beam sputtering to prepare a Ti adhesion layer on a silicon dioxide insulating layer, Then MoS2 vertical structure resistive switching devices were fabricated on the Ti adhesion layer, the steps are as follows:
1)在二氧化硅衬底上利用离子束溅射的方法制备Ti粘附层，溅射条件为：以金属靶为靶材，本底真空小于10-4Pa、衬底温度18-500℃、工作压强0.1-2Pa、放电电压50-100V、灯丝电流0.1-0.5A、加速电压100V、束流4-6A；1) Prepare a Ti adhesion layer on a silicon dioxide substrate by ion beam sputtering. The sputtering conditions are: a metal target is used as the target material, the background vacuum is less than 10 -4 Pa, and the substrate temperature is 18-500°C , working pressure 0.1-2Pa, discharge voltage 50-100V, filament current 0.1-0.5A, accelerating voltage 100V, beam current 4-6A;
2)在Ti粘附层上通过磁控溅射法、离子束溅射法或电子束蒸发法制备下电极，磁控溅射条件为：以金属靶为靶材，本底真空小于10-4Pa、衬底温度18-500℃、工作压强0.1-2Pa、溅射功率40-250W；离子束溅射条件为：以金属靶为靶材，本底真空小于10-4Pa、衬底温度18-500℃、工作压强0.1-2Pa、放电电压50-100V、灯丝电流0.1-0.5A、加速电压100V、束流4A-6A；电子束蒸发工艺条件为：本底真空小于10-4Pa，采用熔点较低的金属为蒸发源，加热方式为坩埚加热或电子束加热；2) Prepare the lower electrode on the Ti adhesion layer by magnetron sputtering, ion beam sputtering or electron beam evaporation. The magnetron sputtering conditions are as follows: a metal target is used as the target, and the background vacuum is less than 10 -4 Pa, substrate temperature 18-500°C, working pressure 0.1-2Pa, sputtering power 40-250W; ion beam sputtering conditions: metal target as target, background vacuum less than 10 -4 Pa, substrate temperature 18 -500℃, working pressure 0.1-2Pa, discharge voltage 50-100V, filament current 0.1-0.5A, accelerating voltage 100V, beam current 4A-6A; electron beam evaporation process conditions are: the background vacuum is less than 10 -4 Pa, using The metal with a lower melting point is the evaporation source, and the heating method is crucible heating or electron beam heating;
3)在下电极上采用机械剥离法、化学气相沉积法、液相剥离法、高温硫化法、水热法或原子层沉积法生长二维纳米片层二硫化钼，其中，化学气相沉积条件为：压强为常压、温度500-750℃、生长时间为5-15min、加热速率为10-20℃/min；3) Two-dimensional nanosheet molybdenum disulfide is grown on the lower electrode by mechanical stripping method, chemical vapor deposition method, liquid phase stripping method, high temperature vulcanization method, hydrothermal method or atomic layer deposition method, wherein the chemical vapor deposition conditions are: The pressure is normal pressure, the temperature is 500-750°C, the growth time is 5-15min, and the heating rate is 10-20°C/min;
4)在氧化硅片上采用磁控溅射或电子束蒸发的工艺沉积上电极，将制备的上电极通过Cu线与二维纳米片层MoS2相连，磁控溅射上电极的工艺条件为：以金属靶为靶材，本底真空小于10-4Pa、衬底温度为18-500℃、工作压强为0.1-2Pa、溅射功率为40-250W；电子束蒸发工艺条件为：本底真空小于10-4Pa，采用低熔点金属为蒸发源，加热方式为干锅加热或电子束加热；4) The upper electrode is deposited on the silicon oxide wafer by magnetron sputtering or electron beam evaporation, and the prepared upper electrode is connected to the two -dimensional nanosheet MoS2 through Cu wires. The process conditions of the magnetron sputtering upper electrode are : Metal target is used as the target material, the background vacuum is less than 10 -4 Pa, the substrate temperature is 18-500°C, the working pressure is 0.1-2Pa, and the sputtering power is 40-250W; the electron beam evaporation process conditions are: background The vacuum is less than 10 -4 Pa, using low melting point metal as the evaporation source, and the heating method is dry pot heating or electron beam heating;
5)在上电极利用PECVD的方法生长一层SiO2作为保护层，工艺参数为：本底真空小于10-5Pa、工作压强为0.1-5Pa、射频功率为50-300W、反应气体为SiH4和N2O，SiH4流量为50-600sccm、N2O流量为20-50sccm。5) A layer of SiO 2 is grown on the upper electrode by PECVD as a protective layer. The process parameters are: the background vacuum is less than 10 -5 Pa, the working pressure is 0.1-5 Pa, the radio frequency power is 50-300W, and the reaction gas is SiH 4 and N 2 O, the SiH 4 flow rate is 50-600 sccm, and the N 2 O flow rate is 20-50 sccm.
本发明的技术分析：Technical analysis of the present invention:
本发明提供了一种二维纳米片层MoS2垂直结构阻变器件，阻变层采用了二维纳米片层MoS2作为阻变层，当上电极为Ag、Cu或Ni等活性电极时，在二维纳米片层MoS2中形成连通上下电极的金属导电细丝，在外加电场作用下，金属导电细丝的形成和破裂导致了不同的电阻状态，另外电极与二维纳米片层MoS2之间形成肖特基势垒，在外加电场作用下，肖特基势垒高度的变化也导致了器件不同的电阻状态。The invention provides a two -dimensional nanosheet MoS2 vertical structure resistive switch device, the resistive layer adopts two -dimensional nanosheet MoS2 as the resistive switchable layer, when the upper electrode is an active electrode such as Ag, Cu or Ni, Metal conductive filaments connecting the upper and lower electrodes are formed in the two -dimensional nanosheet MoS 2 . Under the action of an external electric field, the formation and rupture of the metal conductive filaments lead to different resistance states. A Schottky barrier is formed between them. Under the action of an applied electric field, the change of the height of the Schottky barrier also leads to different resistance states of the device.
本发明的优点和有益效果是：Advantage and beneficial effect of the present invention are:
1)该阻变器件采用二维纳米片层MoS2作为阻变存储器的阻变层，扩展了阻变存储器中的介质层材料体系，填补了二维纳米片层MoS2在阻变存储器中应用的空白；1) The resistive switch device uses two-dimensional nanosheet MoS 2 as the resistive layer of the resistive switchable memory, which expands the material system of the dielectric layer in the resistive switchable memory, and fills in the application of two -dimensional nanosheet MoS2 in the resistive switchable memory. blank space;
2)该阻变器件为单纯的垂直叠层结构，制作简单、成本低廉并且易于集成。2) The resistive switch device is a simple vertical stack structure, which is simple to manufacture, low in cost and easy to integrate.
附图说明Description of drawings
图1为该二维纳米片层MoS2垂直结构阻变存储器结构示意图。Figure 1 is a schematic diagram of the structure of the two-dimensional nanosheet MoS 2 vertical structure resistive memory.
图中：1.氧化硅片衬底 2.Ti粘附层 3.下电极 4.二维纳米片层MoS25.上电极 6.上电极SiO2保护层In the figure: 1. Silicon oxide substrate 2. Ti adhesion layer 3. Lower electrode 4. Two-dimensional nanosheet MoS 2 5. Upper electrode 6. Upper electrode SiO 2 protective layer
图2为该二维纳米片层MoS2垂直结构阻变存储器的电流电压特性曲线，在正向电压作用下，该阻变器件发生set过程，器件阻态从高阻变为低阻，在负向电压下，该器件发生reset过程，器件阻态从低阻变为高阻，以上变化说明，该二维纳米片层MoS2垂直结构阻变存储器件具备双极性的电阻转变特性。Figure 2 is the current-voltage characteristic curve of the two-dimensional nanosheet MoS 2 vertical structure resistive variable memory. Under the action of forward voltage, the resistive switch device undergoes a set process, and the resistance state of the device changes from high resistance to low resistance. Under the upward voltage, the device undergoes a reset process, and the resistance state of the device changes from low resistance to high resistance. The above changes indicate that the two-dimensional nanosheet MoS 2 vertical structure resistive memory device has bipolar resistance transition characteristics.
具体实施方式detailed description
实施例1：Example 1:
一种二维纳米片层MoS2垂直结构阻变存储器，如图1所示，由氧化硅片衬底、5nm厚的Ti粘附层、100nm厚的TiN作为下电极、0.65nm的二维纳米片层MoS2和100nm厚的Cu作为上电极构成。A two -dimensional nanosheet MoS2 vertical structure resistive memory, as shown in Figure 1, consists of a silicon oxide substrate, a 5nm-thick Ti adhesion layer, a 100nm-thick TiN as the bottom electrode, and a 0.65nm two-dimensional nanometer Sheet MoS 2 and 100 nm thick Cu are constructed as the top electrode.
该垂直结构阻变存储器的制备方法，首先以硅片为衬底，利用热氧化的方法在硅片上制备一层二氧化硅绝缘层，再利用离子束溅射的方法在二氧化硅绝缘层上制备Ti粘附层，然后在Ti粘附层上制备该垂直结构器件，步骤如下：The preparation method of the vertical structure resistive variable memory, firstly, a silicon wafer is used as a substrate, and a silicon dioxide insulating layer is prepared on the silicon wafer by a thermal oxidation method, and then the silicon dioxide insulating layer is deposited on the silicon dioxide insulating layer by ion beam sputtering. Prepare a Ti adhesion layer on the Ti adhesion layer, and then prepare the vertical structure device on the Ti adhesion layer, the steps are as follows:
1)在二氧化硅衬底上利用离子束溅射的方法制备Ti粘附层，溅射条件为：以金属靶为靶材，本底真空小于10-4Pa、衬底温度18-500℃、工作压强0.1-2Pa、放电电压50-100V、灯丝电流0.1-0.5A、加速电压100V、束流4-6A；(参数取定值)1) Prepare a Ti adhesion layer on a silicon dioxide substrate by ion beam sputtering. The sputtering conditions are: a metal target is used as the target material, the background vacuum is less than 10 -4 Pa, and the substrate temperature is 18-500°C , working pressure 0.1-2Pa, discharge voltage 50-100V, filament current 0.1-0.5A, acceleration voltage 100V, beam current 4-6A; (parameters take fixed values)
2)在Ti粘附层上采用反应磁控溅射制备100nm厚的TiN底电极，溅射工艺为：直径金属Ti靶溅射靶材，溅射模式为直流(DC)磁控溅射，本底真空小于5×10-4Pa、衬底温度为室温、工作压强0.5Pa、溅射功率为100w，反应气体N2、Ar流量分别为2.5、30Sccm；2) Prepare a 100nm thick TiN bottom electrode on the Ti adhesion layer by reactive magnetron sputtering, the sputtering process is: diameter Metal Ti target sputtering target, the sputtering mode is direct current (DC) magnetron sputtering, the background vacuum is less than 5×10 -4 Pa, the substrate temperature is room temperature, the working pressure is 0.5Pa, the sputtering power is 100w, the reaction The flow rates of gas N 2 and Ar are 2.5 and 30 Sccm respectively;
3)利用化学气相沉积的方法在TiN上生长纳米片层MoS2，工艺参数为：首先将基底硅片用硫酸和双氧水的混合溶液进行处理，其中H2SO4：H2O2＝3:1，然后依次在丙酮溶液和异丙醇溶液中超声10分钟，放置240mg的MoO3在高温区，并且将基底硅片放在其上方，将240mg的S粉末放置在上气流的低温区。在制备过程中通入惰性气体，保持常压，将管式炉的温度从100摄氏度升到700摄氏度，加热速率为15℃/min，在生长过程中将温度控制在700℃，生长时间为10分钟，生长完成后将温度降至室温。3) Using the chemical vapor deposition method to grow nanosheet MoS 2 on TiN, the process parameters are as follows: first, the base silicon wafer is treated with a mixed solution of sulfuric acid and hydrogen peroxide, wherein H 2 SO 4 : H 2 O 2 =3: 1, then ultrasonically in acetone solution and isopropanol solution for 10 minutes, place 240mg of MoO3 in the high temperature zone, and place the substrate silicon wafer on top of it, place 240mg of S powder in the low temperature zone of the upper airflow. During the preparation process, an inert gas was introduced to maintain normal pressure, and the temperature of the tube furnace was increased from 100 °C to 700 °C with a heating rate of 15 °C/min. During the growth process, the temperature was controlled at 700 °C and the growth time was 10 min, and after growth was complete, lower the temperature to room temperature.
4)在氧化硅片上利用电子束蒸发的方法生长100nm的Cu作为上电极，电子束蒸发条件为：本底真空小于5×10-4Pa，采用Cu金属为蒸发源，加热方式为电子束加热。4) Use electron beam evaporation method to grow 100nm Cu as the upper electrode on the silicon oxide wafer. The electron beam evaporation conditions are: the background vacuum is less than 5×10 -4 Pa, Cu metal is used as the evaporation source, and the heating method is electron beam heating.
5)在上电极利用PECVD的方法生长一层SiO2作为保护层，工艺参数为：本底真空5×10-4Pa、工作压强为3Pa、射频功率为150W、反应气体为SiH4和N2O，SiH4流量为50sccm、N2O流量为20sccm。5) A layer of SiO 2 is grown on the upper electrode by PECVD as a protective layer. The process parameters are: background vacuum 5×10 -4 Pa, working pressure 3 Pa, radio frequency power 150W, and reaction gases SiH 4 and N 2 O, the flow rate of SiH 4 is 50 sccm, and the flow rate of N 2 O is 20 sccm.
电学测试通过半导体参数分析仪测试，图2为该阻变存储器的电流电压特性曲线，图中表明：该器件的电学特性为典型的双极性特性。The electrical test is tested by a semiconductor parameter analyzer. Figure 2 is the current-voltage characteristic curve of the RRAM, which shows that the electrical characteristics of the device are typical bipolar characteristics.
实施例2：Example 2:
一种二维纳米片层MoS2垂直结构阻变器件，结构与实施例1基本相同，不同的是以Pt为下电极，Cu为上电极，厚度均为100nm。A two-dimensional nanosheet MoS 2 vertical structure resistive switch device, the structure is basically the same as that of Example 1, the difference is that Pt is used as the lower electrode, Cu is used as the upper electrode, and the thickness is 100nm.
该阻变存储器的制备方法，步骤和Cu电极的制备工艺与实施例1相同。The preparation method of the RRAM, the steps and the preparation process of the Cu electrode are the same as those in Example 1.
下电极Pt通过电子束蒸发的方法在Ti粘附层上沉积100nm的Pt下电极，具体工艺条件为：本底真空5×10-5Pa，以金属Pt为蒸发源，加热方式为电子束加热。The lower electrode Pt is deposited on the Ti adhesion layer by electron beam evaporation with a thickness of 100nm . .
电学测试通过半导体参数分析仪测试，该器件表现出典型的双极性特性，转变电压小于2V。The electrical test is tested by a semiconductor parameter analyzer, and the device exhibits typical bipolar characteristics, and the transition voltage is less than 2V.
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