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BRPI1012070A2 - "dispositivo semicondutor" - Google Patents

"dispositivo semicondutor"

Info

Publication number
BRPI1012070A2
BRPI1012070A2 BRPI1012070A BRPI1012070A BRPI1012070A2 BR PI1012070 A2 BRPI1012070 A2 BR PI1012070A2 BR PI1012070 A BRPI1012070 A BR PI1012070A BR PI1012070 A BRPI1012070 A BR PI1012070A BR PI1012070 A2 BRPI1012070 A2 BR PI1012070A2
Authority
BR
Brazil
Prior art keywords
semiconductor device
semiconductor
Prior art date
Application number
BRPI1012070A
Other languages
English (en)
Inventor
Moriwaki Hiroyuki
Original Assignee
Sharp Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=43356353&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=BRPI1012070(A2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Sharp Kk filed Critical Sharp Kk
Publication of BRPI1012070A2 publication Critical patent/BRPI1012070A2/pt

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136204Arrangements to prevent high voltage or static electricity failures
BRPI1012070A 2009-06-18 2010-06-09 "dispositivo semicondutor" BRPI1012070A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009145795 2009-06-18
PCT/JP2010/059736 WO2010147032A1 (ja) 2009-06-18 2010-06-09 半導体装置

Publications (1)

Publication Number Publication Date
BRPI1012070A2 true BRPI1012070A2 (pt) 2018-06-12

Family

ID=43356353

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI1012070A BRPI1012070A2 (pt) 2009-06-18 2010-06-09 "dispositivo semicondutor"

Country Status (7)

Country Link
US (1) US8921857B2 (pt)
EP (1) EP2445011B1 (pt)
JP (1) JP5406295B2 (pt)
CN (1) CN102804388B (pt)
BR (1) BRPI1012070A2 (pt)
RU (1) RU2501117C2 (pt)
WO (1) WO2010147032A1 (pt)

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CN109314317B (zh) * 2016-06-10 2020-10-23 夏普株式会社 扫描天线
CN106959562B (zh) * 2017-05-09 2021-01-08 惠科股份有限公司 一种显示面板
JP7064309B2 (ja) * 2017-10-20 2022-05-10 株式会社ジャパンディスプレイ ダイオード、トランジスタ、およびこれらを有する表示装置
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WO2019157865A1 (zh) * 2018-02-14 2019-08-22 京东方科技集团股份有限公司 移位寄存器单元、栅极驱动电路、显示装置及驱动方法
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Also Published As

Publication number Publication date
RU2501117C2 (ru) 2013-12-10
RU2012101613A (ru) 2013-07-27
EP2445011A1 (en) 2012-04-25
EP2445011A4 (en) 2013-07-24
JPWO2010147032A1 (ja) 2012-12-06
JP5406295B2 (ja) 2014-02-05
WO2010147032A1 (ja) 2010-12-23
US8921857B2 (en) 2014-12-30
CN102804388A (zh) 2012-11-28
US20120087460A1 (en) 2012-04-12
EP2445011B1 (en) 2018-01-10
CN102804388B (zh) 2016-08-03

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]
B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2476 DE 19-06-2018 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.

B350 Update of information on the portal [chapter 15.35 patent gazette]