BR8505520A - Circuito intermediario sincronizado de multipla fase para"chip"de circuito integrado - Google Patents
Circuito intermediario sincronizado de multipla fase para"chip"de circuito integradoInfo
- Publication number
- BR8505520A BR8505520A BR8505520A BR8505520A BR8505520A BR 8505520 A BR8505520 A BR 8505520A BR 8505520 A BR8505520 A BR 8505520A BR 8505520 A BR8505520 A BR 8505520A BR 8505520 A BR8505520 A BR 8505520A
- Authority
- BR
- Brazil
- Prior art keywords
- multiple phase
- phase intermediate
- integrated circuit
- synchronized multiple
- circuit chip
- Prior art date
Links
- 230000001360 synchronised effect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
- H03K19/01735—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
- H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Nonlinear Science (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/664,858 US4642492A (en) | 1984-10-25 | 1984-10-25 | Multiple phase clock buffer module with non-saturated pull-up transistor to avoid hot electron effects |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR8505520A true BR8505520A (pt) | 1986-08-12 |
Family
ID=24667742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR8505520A BR8505520A (pt) | 1984-10-25 | 1985-10-25 | Circuito intermediario sincronizado de multipla fase para"chip"de circuito integrado |
Country Status (12)
| Country | Link |
|---|---|
| US (1) | US4642492A (pt) |
| EP (1) | EP0183582B1 (pt) |
| JP (1) | JPH0666673B2 (pt) |
| KR (1) | KR930008320B1 (pt) |
| CN (1) | CN1005516B (pt) |
| AU (1) | AU570901B2 (pt) |
| BR (1) | BR8505520A (pt) |
| CA (1) | CA1250624A (pt) |
| DE (1) | DE3582310D1 (pt) |
| IN (1) | IN165166B (pt) |
| MX (1) | MX160622A (pt) |
| ZA (1) | ZA858110B (pt) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9216962D0 (en) * | 1992-08-11 | 1992-09-23 | Erba Carlo Spa | Therapeutically active naphthalenesulfonic-pyrrolecarboxamido derivatives |
| US5533197A (en) * | 1994-10-21 | 1996-07-02 | International Business Machines Corporation | Method to assess electromigration and hot electron reliability for microprocessors |
| US5634001A (en) * | 1995-06-07 | 1997-05-27 | International Business Machines Corporation | Method to calculate hot-electron test voltage differential for assessing microprocessor reliability |
| US5736418A (en) * | 1996-06-07 | 1998-04-07 | Lsi Logic Corporation | Method for fabricating a field effect transistor using microtrenches to control hot electron effects |
| CN108196855A (zh) * | 2018-03-15 | 2018-06-22 | 安徽农业大学 | 一种互联网终端结点的装置 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1084169A (fr) * | 1953-01-24 | 1955-01-17 | Electronique & Automatisme Sa | Générateurs-répartiteurs de signaux de synchronisation |
| US3740660A (en) * | 1971-05-27 | 1973-06-19 | North American Rockwell | Multiple phase clock generator circuit with control circuit |
| US3825771A (en) * | 1972-12-04 | 1974-07-23 | Bell Telephone Labor Inc | Igfet inverter circuit |
| US3906255A (en) * | 1974-09-06 | 1975-09-16 | Motorola Inc | MOS current limiting output circuit |
| US4140927A (en) * | 1977-04-04 | 1979-02-20 | Teletype Corporation | Non-overlapping clock generator |
| US4199695A (en) * | 1978-03-03 | 1980-04-22 | International Business Machines Corporation | Avoidance of hot electron operation of voltage stressed bootstrap drivers |
| US4379974A (en) * | 1980-09-10 | 1983-04-12 | Mostek Corporation | Delay stage for a clock generator |
| JPS57106228A (en) * | 1980-12-24 | 1982-07-02 | Fujitsu Ltd | Semiconductor circuit |
| US4431927A (en) * | 1981-04-22 | 1984-02-14 | Inmos Corporation | MOS Capacitive bootstrapping trigger circuit for a clock generator |
| JPS58207718A (ja) * | 1982-05-28 | 1983-12-03 | Nec Corp | 出力回路 |
| US4521701A (en) * | 1982-09-16 | 1985-06-04 | Texas Instruments Incorporated | High-speed low-power delayed clock generator |
-
1984
- 1984-10-25 US US06/664,858 patent/US4642492A/en not_active Expired - Lifetime
-
1985
- 1985-10-14 AU AU48547/85A patent/AU570901B2/en not_active Ceased
- 1985-10-16 IN IN860/DEL/85A patent/IN165166B/en unknown
- 1985-10-18 DE DE8585402019T patent/DE3582310D1/de not_active Expired - Fee Related
- 1985-10-18 EP EP85402019A patent/EP0183582B1/en not_active Expired - Lifetime
- 1985-10-22 MX MX354A patent/MX160622A/es unknown
- 1985-10-22 ZA ZA858110A patent/ZA858110B/xx unknown
- 1985-10-24 KR KR1019850007858A patent/KR930008320B1/ko not_active Expired - Lifetime
- 1985-10-24 CA CA000493755A patent/CA1250624A/en not_active Expired
- 1985-10-25 BR BR8505520A patent/BR8505520A/pt not_active IP Right Cessation
- 1985-10-25 JP JP60239256A patent/JPH0666673B2/ja not_active Expired - Lifetime
- 1985-10-25 CN CN85108283.1A patent/CN1005516B/zh not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CN1005516B (zh) | 1989-10-18 |
| AU570901B2 (en) | 1988-03-24 |
| CN85108283A (zh) | 1986-08-20 |
| KR860003708A (ko) | 1986-05-28 |
| AU4854785A (en) | 1986-05-01 |
| EP0183582B1 (en) | 1991-03-27 |
| DE3582310D1 (de) | 1991-05-02 |
| EP0183582A1 (en) | 1986-06-04 |
| ZA858110B (en) | 1986-06-25 |
| IN165166B (pt) | 1989-08-19 |
| JPS61160127A (ja) | 1986-07-19 |
| MX160622A (es) | 1990-03-29 |
| JPH0666673B2 (ja) | 1994-08-24 |
| CA1250624A (en) | 1989-02-28 |
| US4642492A (en) | 1987-02-10 |
| KR930008320B1 (ko) | 1993-08-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM | Lapse due to non-payment of fees (art. 50) |