BR8501629A - Aparelho divisor - Google Patents

Aparelho divisor

Info

Publication number: BR8501629A
Authority: BR; Brazil
Prior art keywords: divider; appliance; divider appliance
Prior art date: 1984-04-09

Application number

BR8501629A

Other languages

English (en)

Inventor

Masayuki Ikeda

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1984-04-09

Filing date

1985-04-08

Publication date

1985-12-03

1984-04-09 Priority claimed from JP59070353A external-priority patent/JPS60214037A/ja

1984-06-22 Priority claimed from JP59128610A external-priority patent/JPS617939A/ja

1985-04-08 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

1985-12-03 Publication of BR8501629A publication Critical patent/BR8501629A/pt

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/49—Computations with a radix, other than binary, 8, 16 or decimal, e.g. ternary, negative or imaginary radices, mixed radix non-linear PCM
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
- G06F7/537—Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
- G06F7/5375—Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Mathematical Analysis (AREA)
Mathematical Optimization (AREA)
Pure & Applied Mathematics (AREA)
Computational Mathematics (AREA)
Theoretical Computer Science (AREA)
Computing Systems (AREA)
General Engineering & Computer Science (AREA)
Nonlinear Science (AREA)
Complex Calculations (AREA)
Error Detection And Correction (AREA)

BR8501629A 1984-04-09 1985-04-08 Aparelho divisor BR8501629A (pt)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP59070353A JPS60214037A (ja)	1984-04-09	1984-04-09	高基数非回復型除算器
JP59128610A JPS617939A (ja)	1984-06-22	1984-06-22	高基数非回復型除算装置

Publications (1)

Publication Number	Publication Date
BR8501629A true BR8501629A (pt)	1985-12-03

Family

ID=26411512

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
BR8501629A BR8501629A (pt)	1984-04-09	1985-04-08	Aparelho divisor

Country Status (8)

Country	Link
US (1)	US4722069A (pt)
EP (1)	EP0158530B1 (pt)
KR (1)	KR890003321B1 (pt)
AU (1)	AU553078B2 (pt)
BR (1)	BR8501629A (pt)
CA (1)	CA1231455A (pt)
DE (1)	DE3585334D1 (pt)
ES (1)	ES8609768A1 (pt)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4939686A (en) *	1987-05-18	1990-07-03	Weitek Corporation	Method and apparatus for shared radix 4 division and radix 4 square root
JPH0786826B2 (ja) *	1988-07-19	1995-09-20	日本電気株式会社	整数除算回路
US5023827A (en) *	1988-08-18	1991-06-11	Digital Equipment Corporation	Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction
US5132925A (en) *	1988-08-18	1992-07-21	Digital Equipment Corporation	Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction
US4992968A (en) *	1989-02-17	1991-02-12	Digital Equipment Corporation	Division method and apparatus including use of a Z--Z plot to select acceptable quotient bits
US4996660A (en) *	1989-04-17	1991-02-26	International Business Machines Corporation	Selection of divisor multipliers in a floating point divide circuit
ATE114836T1 (de) *	1989-09-07	1994-12-15	Siemens Nixdorf Inf Syst	Verfahren für datenverarbeitungsanlagen zur division von, zu beginn jeweils normalisierten, beliebig langen operanden und divisionswerk zur durchführung des verfahrens.
US5016210A (en) *	1989-11-15	1991-05-14	United Technologies Corporation	Binary division of signed operands
US5103420A (en) *	1989-12-04	1992-04-07	Dror Avnon	Method and apparatus for srt division using gray coded quotient bit signals
US5097436A (en) *	1990-01-09	1992-03-17	Digital Equipment Corporation	High performance adder using carry predictions
US5128891A (en) *	1990-04-02	1992-07-07	Advanced Micro Devices, Inc.	High speed divider with square root capability
KR920006322B1 (ko) *	1990-04-03	1992-08-03	정호선	나눗셈기
KR920009092B1 (ko) *	1990-04-03	1992-10-13	정호선	나눗셈기 회로
JP2857505B2 (ja) *	1990-04-10	1999-02-17	松下電器産業株式会社	除算装置
US5031138A (en) *	1990-06-04	1991-07-09	International Business Machines Corporation	Improved ratio decoder for use in a non-restoring binary division circuit
JP2835153B2 (ja) *	1990-06-25	1998-12-14	株式会社東芝	高基数除算器
JPH04172526A (ja) *	1990-11-07	1992-06-19	Toshiba Corp	浮動小数点除算器
JPH0731592B2 (ja) *	1990-11-29	1995-04-10	株式会社東芝	除算回路
JPH04283831A (ja) *	1991-03-13	1992-10-08	Fujitsu Ltd	除算器
JP2502836B2 (ja) *	1991-03-19	1996-05-29	富士通株式会社	除算回路の前処理装置
US5377135A (en) *	1991-06-07	1994-12-27	Fujitsu Limited	High cardinal number type non-restoring divider reducing delay time for adding two numbers
DE4121106A1 (de) *	1991-06-26	1993-01-07	Siemens Nixdorf Inf Syst	Verfahren fuer datenverarbeitungsanlagen zur radix-division eines dividenden und eines divisors von jeweils beliebiger laenge und schaltungsanordnung zur durchfuehrung des verfahrens
EP0562137A1 (de) *	1992-03-24	1993-09-29	Siemens Nixdorf Informationssysteme Aktiengesellschaft	Verfahren für Datenverarbeitungsanlagen zur Division von normalisierten Operanden
US5381380A (en) *	1992-05-18	1995-01-10	Sharp Kabushiki Kaisha	Divide circuit having high-speed operating capability
US5239498A (en) *	1992-08-31	1993-08-24	Intel Corporation	Methods and apparatus for improved quotient correction in nonrestoring division computation circuits
US6108723A (en) *	1998-07-20	2000-08-22	Hewlett-Packard Company	System for implementing hardware automated control of burst mode data transfer over a communication link between devices operating in a block mode
US7149767B2 (en) *	2003-05-12	2006-12-12	International Business Machines Corporation	Method and system for determining quotient digits for decimal division in a superscaler processor
US8140608B1 (en) *	2007-05-31	2012-03-20	Nvidia Corporation	Pipelined integer division using floating-point reciprocal
JP5169760B2 (ja) *	2008-01-28	2013-03-27	富士通株式会社	通信装置、受信データサイズチェック方法、倍数判定回路および倍数判定方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3852581A (en) *	1972-12-14	1974-12-03	Burroughs Corp	Two bit binary divider
US4320464A (en) *	1980-05-05	1982-03-16	Control Data Corporation	Binary divider with carry-save adders

1985
- 1985-03-29 CA CA000477910A patent/CA1231455A/en not_active Expired
- 1985-04-02 US US06/719,014 patent/US4722069A/en not_active Expired - Lifetime
- 1985-04-02 AU AU40738/85A patent/AU553078B2/en not_active Ceased
- 1985-04-04 DE DE8585302455T patent/DE3585334D1/de not_active Expired - Lifetime
- 1985-04-04 EP EP85302455A patent/EP0158530B1/en not_active Expired - Lifetime
- 1985-04-08 BR BR8501629A patent/BR8501629A/pt not_active IP Right Cessation
- 1985-04-08 ES ES542032A patent/ES8609768A1/es not_active Expired
- 1985-04-09 KR KR8502374A patent/KR890003321B1/ko not_active Expired

Also Published As

Publication number	Publication date
EP0158530A2 (en)	1985-10-16
ES542032A0 (es)	1986-09-01
DE3585334D1 (de)	1992-03-19
KR890003321B1 (en)	1989-09-16
CA1231455A (en)	1988-01-12
AU553078B2 (en)	1986-07-03
EP0158530A3 (en)	1987-12-09
EP0158530B1 (en)	1992-02-05
US4722069A (en)	1988-01-26
AU4073885A (en)	1985-10-17
ES8609768A1 (es)	1986-09-01
KR850007899A (ko)	1985-12-09

Publication	Publication Date	Title
BR8501629A (pt)	1985-12-03	Aparelho divisor
DK177384D0 (da)	1984-04-03	Bestralingsapparat
DK154323C (da)	1989-04-10	Haarsaetteapparat
KR890004491A (ko)	1989-04-22	분파기
DK47485D0 (da)	1985-02-01	Vaeskeadskillelsesapparat
KR860006059A (ko)	1986-08-18	제산기
BR8407354A (pt)	1986-09-23	Aparelho rotativo
ES542196A0 (es)	1987-02-01	Un divisor optico de potencia
GB8513157D0 (en)	1985-06-26	Flick divider
BR8101114A (pt)	1981-09-01	Divisor de debito
PT7541T (pt)	1993-12-30	Divisor de 20 garrafas
DE3578286D1 (de)	1990-07-19	Frequenzteiler-schaltungsanordnung.
IT8621380A1 (it)	1988-02-01	Elettrodomestico ad armadio
GB8309752D0 (en)	1983-05-18	Drawer divider
ES281013Y (es)	1985-07-16	Escudo divisor
BR8804481A (pt)	1990-04-24	Conjunto divisor universal
ES282573Y (es)	1985-12-16	Archivador
BR6501522U (pt)	1987-05-05	Feixo divisor
CA50802S (en)	1983-01-24	Drawer divider
DE8301071U1 (de)	1983-06-16	Schuhschrank
BR8307760A (pt)	1985-10-08	Divisor de sinais eletricos
IT1179770B (it)	1987-09-16	Apparecchio frigorifero perfezionato
BR8306130A (pt)	1985-06-11	Aparelho antimofo
SE8302570D0 (sv)	1983-05-05	Gryta
SE8302571D0 (sv)	1983-05-05	Gryta

Legal Events

Date	Code	Title	Description
2008-07-15	B21A	Patent or certificate of addition expired [chapter 21.1 patent gazette]	Free format text: PATENTE EXTINTA EM 08/04/2000