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BR0113164A - Célula de memória, disposição de células de memória e processo de produção - Google Patents

Célula de memória, disposição de células de memória e processo de produção

Info

Publication number
BR0113164A
BR0113164A BR0113164-8A BR0113164A BR0113164A BR 0113164 A BR0113164 A BR 0113164A BR 0113164 A BR0113164 A BR 0113164A BR 0113164 A BR0113164 A BR 0113164A
Authority
BR
Brazil
Prior art keywords
memory cell
gate electrode
production process
region
drain
Prior art date
Application number
BR0113164-8A
Other languages
English (en)
Inventor
Herbert Palm
Josef Willer
Achim Gratz
Jakob Kriz
Mayk Roehrich
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10039441A external-priority patent/DE10039441A1/de
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Publication of BR0113164A publication Critical patent/BR0113164A/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

"CéLULA DE MEMóRIA, DISPOSIçãO DE CéLULAS DE MEMóRIA E PROCESSO DE PRODUçãO". Cada célula de memória é um transistor de memória, que no lado superior de um corpo semicondutor está dotado de um eletrodo de gate (2), que está disposto em um sulco entre uma região de source (3) e uma região de drain (4), que estão formadas no material semicondutor. O eletrodo de gate está separado do material semicondutor por material dielétrico. Pelo menos entre a região de source e o eletrodo de gate e a região de drain e o eletrodo de gate existe uma seq³ência de camadas de óxido-nitreto-óxido (5, 6, 7), que está prevista para o confinamento de portadores de carga em source e drain.
BR0113164-8A 2000-08-11 2001-08-06 Célula de memória, disposição de células de memória e processo de produção BR0113164A (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10039441A DE10039441A1 (de) 2000-08-11 2000-08-11 Speicherzelle, Speicherzellenanordnung und Herstellungsverfahren
US09/900,654 US20020024092A1 (en) 2000-08-11 2001-07-06 Memory cell, memory cell arrangement and fabrication method
PCT/DE2001/002997 WO2002015276A2 (de) 2000-08-11 2001-08-06 Speicherzelle, speicherzellenanordnung und herstellungsverfahren

Publications (1)

Publication Number Publication Date
BR0113164A true BR0113164A (pt) 2003-06-24

Family

ID=26006676

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0113164-8A BR0113164A (pt) 2000-08-11 2001-08-06 Célula de memória, disposição de células de memória e processo de produção

Country Status (9)

Country Link
US (1) US6844584B2 (pt)
EP (1) EP1307920A2 (pt)
JP (1) JP2004517464A (pt)
CN (1) CN100446258C (pt)
BR (1) BR0113164A (pt)
MX (1) MXPA03001223A (pt)
RU (1) RU2247441C2 (pt)
TW (1) TWI244199B (pt)
WO (1) WO2002015276A2 (pt)

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* Cited by examiner, † Cited by third party
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DE10204868B4 (de) * 2002-02-06 2007-08-23 Infineon Technologies Ag Speicherzelle mit Grabenspeichertransistor und Oxid-Nitrid-Oxid-Dielektrikum
DE10219917A1 (de) * 2002-05-03 2003-11-13 Infineon Technologies Ag Grabentransistor in einem Halbleiterkörper aus Silizium und Herstellungsverfahren
DE10225410A1 (de) * 2002-06-07 2004-01-08 Infineon Technologies Ag Verfahren zur Herstellung von NROM-Speicherzellen mit Grabentransistoren
DE10226964A1 (de) * 2002-06-17 2004-01-08 Infineon Technologies Ag Verfahren zur Herstellung einer NROM-Speicherzellenanordnung
DE10229065A1 (de) * 2002-06-28 2004-01-29 Infineon Technologies Ag Verfahren zur Herstellung eines NROM-Speicherzellenfeldes
KR100885910B1 (ko) * 2003-04-30 2009-02-26 삼성전자주식회사 게이트 적층물에 ｏｈａ막을 구비하는 비 휘발성 반도체메모리 장치 및 그 제조방법
US6979857B2 (en) * 2003-07-01 2005-12-27 Micron Technology, Inc. Apparatus and method for split gate NROM memory
DE10333549B3 (de) * 2003-07-23 2005-01-13 Infineon Technologies Ag Charge-Trapping-Speicherzelle
US6987689B2 (en) * 2003-08-20 2006-01-17 International Business Machines Corporation Non-volatile multi-stable memory device and methods of making and using the same
US6977412B2 (en) * 2003-09-05 2005-12-20 Micron Technology, Inc. Trench corner effect bidirectional flash memory cell
US6965143B2 (en) * 2003-10-10 2005-11-15 Advanced Micro Devices, Inc. Recess channel flash architecture for reduced short channel effect
US7041545B2 (en) * 2004-03-08 2006-05-09 Infineon Technologies Ag Method for producing semiconductor memory devices and integrated memory device
KR100594266B1 (ko) * 2004-03-17 2006-06-30 삼성전자주식회사 소노스 타입 메모리 소자
US20060043463A1 (en) * 2004-09-01 2006-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Floating gate having enhanced charge retention
TWI270199B (en) * 2005-01-31 2007-01-01 Powerchip Semiconductor Corp Non-volatile memory and manufacturing method and operating method thereof
US7186607B2 (en) * 2005-02-18 2007-03-06 Infineon Technologies Ag Charge-trapping memory device and method for production
US7196008B1 (en) * 2005-03-23 2007-03-27 Spansion Llc Aluminum oxide as liner or cover layer to spacers in memory device
DE102005024951A1 (de) * 2005-05-31 2006-12-14 Infineon Technologies Ag Halbleiterspeicherbauelement
US7468299B2 (en) * 2005-08-04 2008-12-23 Macronix International Co., Ltd. Non-volatile memory cells and methods of manufacturing the same
US7292478B2 (en) * 2005-09-08 2007-11-06 Macronix International Co., Ltd. Non-volatile memory including charge-trapping layer, and operation and fabrication of the same
US20070221979A1 (en) * 2006-03-22 2007-09-27 Dirk Caspary Method for production of memory devices and semiconductor memory device
US20070257293A1 (en) * 2006-05-08 2007-11-08 Josef Willer Semiconductor memory device and method for production of the semiconductor memory device
JP2008166528A (ja) * 2006-12-28 2008-07-17 Spansion Llc 半導体装置およびその製造方法
US7778073B2 (en) 2007-10-15 2010-08-17 Qimonda Ag Integrated circuit having NAND memory cell strings
JP5405737B2 (ja) * 2007-12-20 2014-02-05 スパンション エルエルシー 半導体装置およびその製造方法
JP2009277782A (ja) * 2008-05-13 2009-11-26 Oki Semiconductor Co Ltd 半導体記憶装置および半導体記憶装置の製造方法
US8304840B2 (en) 2010-07-29 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Spacer structures of a semiconductor device
RU2543668C2 (ru) * 2012-08-27 2015-03-10 Федеральное государственное бюджетное учреждение науки Физико-технический институт им. Ф.Ф. Иоффе Российской академии наук Полевой транзистор с ячейкой памяти
US9412790B1 (en) * 2012-12-04 2016-08-09 Crossbar, Inc. Scalable RRAM device architecture for a non-volatile memory device and method
CN108735773A (zh) * 2017-04-14 2018-11-02 上海磁宇信息科技有限公司 一种超高密度随机存储器架构
CN108735772B (zh) * 2017-04-14 2020-08-21 上海磁宇信息科技有限公司 一种共享型的高密度随机存储器架构

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JP2662076B2 (ja) * 1990-05-02 1997-10-08 松下電子工業株式会社 不揮発性半導体記憶装置およびその製造方法
DE19545903C2 (de) 1995-12-08 1997-09-18 Siemens Ag Festwertspeicherzellenanordnung und Verfahren zu deren Herstellung
DE19600423C2 (de) 1996-01-08 2001-07-05 Siemens Ag Elektrisch programmierbare Speicherzellenanordnung und Verfahren zu deren Herstellung
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EP0967654A1 (en) * 1998-06-26 1999-12-29 EM Microelectronic-Marin SA Non-volatile semiconductor memory device

Also Published As

Publication number Publication date
RU2247441C2 (ru) 2005-02-27
US20030015752A1 (en) 2003-01-23
TWI244199B (en) 2005-11-21
WO2002015276A3 (de) 2002-06-06
WO2002015276A2 (de) 2002-02-21
CN1446378A (zh) 2003-10-01
JP2004517464A (ja) 2004-06-10
CN100446258C (zh) 2008-12-24
US6844584B2 (en) 2005-01-18
EP1307920A2 (de) 2003-05-07
MXPA03001223A (es) 2003-09-22

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 6O, 7O E 8O ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 NA RPI 2021 DE 29/09/2009.