AU4580300A - Exception handling method and apparatus for use in program code conversion - Google Patents
Exception handling method and apparatus for use in program code conversionInfo
- Publication number
- AU4580300A AU4580300A AU45803/00A AU4580300A AU4580300A AU 4580300 A AU4580300 A AU 4580300A AU 45803/00 A AU45803/00 A AU 45803/00A AU 4580300 A AU4580300 A AU 4580300A AU 4580300 A AU4580300 A AU 4580300A
- Authority
- AU
- Australia
- Prior art keywords
- program code
- code conversion
- exception handling
- handling method
- exception
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US29975199A | 1999-04-27 | 1999-04-27 | |
| US09299751 | 1999-04-27 | ||
| GB9909615 | 1999-04-27 | ||
| GB9909615A GB2349486B (en) | 1999-04-27 | 1999-04-27 | Exception handling in program code conversion. |
| PCT/GB2000/001439 WO2000065440A2 (en) | 1999-04-27 | 2000-04-26 | Exception handling method and apparatus for use in program code conversion |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU4580300A true AU4580300A (en) | 2000-11-10 |
Family
ID=26315473
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU45803/00A Abandoned AU4580300A (en) | 1999-04-27 | 2000-04-26 | Exception handling method and apparatus for use in program code conversion |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1183601A2 (en) |
| JP (1) | JP4709394B2 (en) |
| AU (1) | AU4580300A (en) |
| WO (1) | WO2000065440A2 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002042898A2 (en) * | 2000-11-20 | 2002-05-30 | Zucotto Wireless, Inc. | Interpretation loop for object oriented processor |
| GB2401217B (en) * | 2003-05-02 | 2005-11-09 | Transitive Ltd | Improved architecture for generating intermediate representations for program code conversion |
| GB0315844D0 (en) * | 2003-07-04 | 2003-08-13 | Transitive Ltd | Method and apparatus for performing adjustable precision exception handling |
| US7480902B2 (en) * | 2004-07-08 | 2009-01-20 | Intel Corporation | Unwind information for optimized programs |
| KR101244104B1 (en) | 2006-10-02 | 2013-03-18 | 인터내셔널 비지네스 머신즈 코포레이션 | Computer system and method of adapting a computer system to support a register window architecture |
| JP5115332B2 (en) * | 2008-05-22 | 2013-01-09 | 富士通株式会社 | Emulation program, emulation device, and emulation method |
| CN102141929B (en) * | 2010-10-21 | 2014-05-07 | 华为技术有限公司 | Application program running method, simulator, host machine and system |
| KR101642556B1 (en) * | 2012-09-21 | 2016-07-25 | 인텔 코포레이션 | Methods and systems for performing a binary translation |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63156236A (en) * | 1986-12-19 | 1988-06-29 | Toshiba Corp | Register device |
| JPS63245529A (en) * | 1987-03-31 | 1988-10-12 | Toshiba Corp | Register saving and restoring device |
| JP2707867B2 (en) * | 1991-04-25 | 1998-02-04 | 富士ゼロックス株式会社 | Register file of digital computer and instruction execution method using it. |
| JP3302706B2 (en) * | 1991-05-31 | 2002-07-15 | 日本電気株式会社 | Storage device |
| JPH06180653A (en) * | 1992-10-02 | 1994-06-28 | Hudson Soft Co Ltd | Interruption processing method and device therefor |
| US5694564A (en) * | 1993-01-04 | 1997-12-02 | Motorola, Inc. | Data processing system a method for performing register renaming having back-up capability |
| JPH0756760A (en) * | 1993-08-10 | 1995-03-03 | Fujitsu Ltd | Recovery equipment |
| JP2513142B2 (en) * | 1993-09-07 | 1996-07-03 | 日本電気株式会社 | Program simulator device |
| US5812823A (en) * | 1996-01-02 | 1998-09-22 | International Business Machines Corporation | Method and system for performing an emulation context save and restore that is transparent to the operating system |
| US5925124A (en) * | 1997-02-27 | 1999-07-20 | International Business Machines Corporation | Dynamic conversion between different instruction codes by recombination of instruction elements |
| US5872950A (en) * | 1997-03-31 | 1999-02-16 | International Business Machines Corporation | Method and apparatus for managing register renaming including a wraparound array and an indication of rename entry ages |
| WO1998059292A1 (en) * | 1997-06-25 | 1998-12-30 | Transmeta Corporation | Improved microprocessor |
-
2000
- 2000-04-26 EP EP00927395A patent/EP1183601A2/en not_active Withdrawn
- 2000-04-26 WO PCT/GB2000/001439 patent/WO2000065440A2/en not_active Ceased
- 2000-04-26 JP JP2000614118A patent/JP4709394B2/en not_active Expired - Lifetime
- 2000-04-26 AU AU45803/00A patent/AU4580300A/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| JP4709394B2 (en) | 2011-06-22 |
| EP1183601A2 (en) | 2002-03-06 |
| JP2002543490A (en) | 2002-12-17 |
| WO2000065440A3 (en) | 2001-01-25 |
| WO2000065440A2 (en) | 2000-11-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |