AU2003290593A1 - Method for improving the accuracy of an etched silicon pattern using mask compensation - Google Patents

Method for improving the accuracy of an etched silicon pattern using mask compensation

Info

Publication number: AU2003290593A1
Authority: AU; Australia
Prior art keywords: accuracy; improving; silicon pattern; etched silicon; mask compensation
Prior art date: 2002-11-15
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Abandoned

Application number

AU2003290593A

Inventor

Philip J. Koh

David T. Nemeth

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Sophia Wireless Inc

Original Assignee

Sophia Wireless Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2002-11-15

Filing date

2003-11-13

Publication date

2004-06-15

2003-11-13 Application filed by Sophia Wireless Inc filed Critical Sophia Wireless Inc

2004-06-15 Publication of AU2003290593A1 publication Critical patent/AU2003290593A1/en

Status Abandoned legal-status Critical Current

Classifications

- H10P50/696—
- H10P50/644—

AU2003290593A 2002-11-15 2003-11-13 Method for improving the accuracy of an etched silicon pattern using mask compensation Abandoned AU2003290593A1 (en)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
US42652802P	2002-11-15	2002-11-15
US60/426,528		2002-11-15
PCT/US2003/035045 WO2004045869A1 (en)	2002-11-15	2003-11-13	Method for improving the accuracy of an etched silicon pattern using mask compensation

Publications (1)

Publication Number	Publication Date
AU2003290593A1 true AU2003290593A1 (en)	2004-06-15

Family

ID=32326366

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU2003290593A Abandoned AU2003290593A1 (en)	2002-11-15	2003-11-13	Method for improving the accuracy of an etched silicon pattern using mask compensation

Country Status (2)

Country	Link
AU (1)	AU2003290593A1 (en)
WO (1)	WO2004045869A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
CN103035477B (en) *	2011-09-30	2015-09-30	中国科学院上海微系统与信息技术研究所	A kind of method preparing monocrystalline silicon nanometer structure
CN115620626B (en) *	2022-08-12	2023-10-20	荣耀终端有限公司	Electronic equipment, display screen, display module and dislocation amount testing method of display module

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS58200238A (en) *	1982-05-19	1983-11-21	Toshiba Corp	Photomask
JPH0289054A (en) *	1988-09-26	1990-03-29	Nec Corp	Mask for exposing
JPH0775244B2 (en) *	1990-11-16	1995-08-09	信越半導体株式会社	Dielectric isolation substrate and manufacturing method thereof
US5658636A (en) *	1995-01-27	1997-08-19	Carnegie Mellon University	Method to prevent adhesion of micromechanical structures
DE19609399C2 (en) *	1996-03-01	2002-05-29	Infineon Technologies Ag	Method for determining crystal orientation in a wafer

2003
- 2003-11-13 AU AU2003290593A patent/AU2003290593A1/en not_active Abandoned
- 2003-11-13 WO PCT/US2003/035045 patent/WO2004045869A1/en not_active Ceased

Also Published As

Publication number	Publication date
WO2004045869A1 (en)	2004-06-03

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Legal Events

Date	Code	Title	Description
2005-08-04	MK6	Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase