AU2001233119A1 - Improved apparatus and method for multi-threaded signal processing - Google Patents
Improved apparatus and method for multi-threaded signal processingInfo
- Publication number
- AU2001233119A1 AU2001233119A1 AU2001233119A AU3311901A AU2001233119A1 AU 2001233119 A1 AU2001233119 A1 AU 2001233119A1 AU 2001233119 A AU2001233119 A AU 2001233119A AU 3311901 A AU3311901 A AU 3311901A AU 2001233119 A1 AU2001233119 A1 AU 2001233119A1
- Authority
- AU
- Australia
- Prior art keywords
- signal processing
- improved apparatus
- threaded signal
- threaded
- improved
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
- Logic Circuits (AREA)
- Mobile Radio Communication Systems (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US49263400A | 2000-01-27 | 2000-01-27 | |
| US09492634 | 2000-01-27 | ||
| PCT/US2001/002982 WO2001055917A1 (en) | 2000-01-27 | 2001-01-29 | Improved apparatus and method for multi-threaded signal processing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001233119A1 true AU2001233119A1 (en) | 2001-08-07 |
Family
ID=23956997
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001233119A Abandoned AU2001233119A1 (en) | 2000-01-27 | 2001-01-29 | Improved apparatus and method for multi-threaded signal processing |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JP2003521072A (en) |
| KR (1) | KR100784412B1 (en) |
| AU (1) | AU2001233119A1 (en) |
| DE (1) | DE10195202T1 (en) |
| GB (1) | GB2374701B (en) |
| WO (1) | WO2001055917A1 (en) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
| WO2002029600A2 (en) | 2000-10-06 | 2002-04-11 | Pact Informationstechnologie Gmbh | Cell system with segmented intermediate cell structure |
| DE19651075A1 (en) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Unit for processing numerical and logical operations, for use in processors (CPU's), multi-computer systems, data flow processors (DFP's), digital signal processors (DSP's) or the like |
| US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
| DE19861088A1 (en) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Repairing integrated circuits by replacing subassemblies with substitutes |
| US20020010810A1 (en) | 2000-03-01 | 2002-01-24 | Ming-Kang Liu | xDSL function ASIC processor & method of operation |
| US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
| US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
| US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
| US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
| US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
| US7577822B2 (en) | 2001-12-14 | 2009-08-18 | Pact Xpp Technologies Ag | Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization |
| US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
| EP1537486A1 (en) | 2002-09-06 | 2005-06-08 | PACT XPP Technologies AG | Reconfigurable sequencer structure |
| US7657893B2 (en) * | 2003-04-23 | 2010-02-02 | International Business Machines Corporation | Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor |
| CN100492296C (en) * | 2005-04-12 | 2009-05-27 | 松下电器产业株式会社 | Processor with a memory having a plurality of memory cells |
| US7693257B2 (en) | 2006-06-29 | 2010-04-06 | Accuray Incorporated | Treatment delivery optimization |
| CN107193539B (en) * | 2016-03-14 | 2020-11-24 | 北京京东尚科信息技术有限公司 | Multithreaded concurrent processing method and multithreaded concurrent processing system |
| US11288072B2 (en) * | 2019-09-11 | 2022-03-29 | Ceremorphic, Inc. | Multi-threaded processor with thread granularity |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4821220A (en) * | 1986-07-25 | 1989-04-11 | Tektronix, Inc. | System for animating program operation and displaying time-based relationships |
| US5519867A (en) * | 1993-07-19 | 1996-05-21 | Taligent, Inc. | Object-oriented multitasking system |
| US5537226A (en) * | 1994-11-22 | 1996-07-16 | Xerox Corporation | Method for restoring images scanned in the presence of vibration |
| US5870588A (en) * | 1995-10-23 | 1999-02-09 | Interuniversitair Micro-Elektronica Centrum(Imec Vzw) | Design environment and a design method for hardware/software co-design |
| US5946487A (en) * | 1996-06-10 | 1999-08-31 | Lsi Logic Corporation | Object-oriented multi-media architecture |
| US6112020A (en) * | 1996-10-31 | 2000-08-29 | Altera Corporation | Apparatus and method for generating configuration and test files for programmable logic devices |
-
2001
- 2001-01-29 WO PCT/US2001/002982 patent/WO2001055917A1/en not_active Ceased
- 2001-01-29 JP JP2001555391A patent/JP2003521072A/en active Pending
- 2001-01-29 AU AU2001233119A patent/AU2001233119A1/en not_active Abandoned
- 2001-01-29 KR KR1020027009711A patent/KR100784412B1/en not_active Expired - Fee Related
- 2001-01-29 GB GB0217126A patent/GB2374701B/en not_active Expired - Fee Related
- 2001-01-29 DE DE10195202T patent/DE10195202T1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JP2003521072A (en) | 2003-07-08 |
| DE10195202T1 (en) | 2003-04-30 |
| GB2374701A (en) | 2002-10-23 |
| GB0217126D0 (en) | 2002-09-04 |
| KR20030004327A (en) | 2003-01-14 |
| GB2374701B (en) | 2004-12-15 |
| KR100784412B1 (en) | 2007-12-11 |
| WO2001055917A1 (en) | 2001-08-02 |
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