AU2001296683A1 - Self-adjusting multi-speed pipeline - Google Patents
Self-adjusting multi-speed pipelineInfo
- Publication number
- AU2001296683A1 AU2001296683A1 AU2001296683A AU9668301A AU2001296683A1 AU 2001296683 A1 AU2001296683 A1 AU 2001296683A1 AU 2001296683 A AU2001296683 A AU 2001296683A AU 9668301 A AU9668301 A AU 9668301A AU 2001296683 A1 AU2001296683 A1 AU 2001296683A1
- Authority
- AU
- Australia
- Prior art keywords
- self
- speed pipeline
- adjusting multi
- adjusting
- pipeline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3873—Variable length pipelines, e.g. elastic pipeline
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09680672 | 2000-10-06 | ||
| US09/680,672 US6502202B1 (en) | 2000-10-06 | 2000-10-06 | Self-adjusting multi-speed pipeline |
| PCT/US2001/031349 WO2002029530A1 (en) | 2000-10-06 | 2001-10-09 | Self-adjusting multi-speed pipeline |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001296683A1 true AU2001296683A1 (en) | 2002-04-15 |
Family
ID=24732032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001296683A Abandoned AU2001296683A1 (en) | 2000-10-06 | 2001-10-09 | Self-adjusting multi-speed pipeline |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6502202B1 (en) |
| AU (1) | AU2001296683A1 (en) |
| WO (1) | WO2002029530A1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020104032A1 (en) * | 2001-01-30 | 2002-08-01 | Mazin Khurshid | Method for reducing power consumption using variable frequency clocks |
| US20050195183A1 (en) * | 2004-03-03 | 2005-09-08 | Anderson Michael H. | Clock control for a graphics processor |
| WO2005086095A1 (en) * | 2004-03-03 | 2005-09-15 | Qualcomm Incorporated | Variable clock control for a graphics processor |
| US20050268142A1 (en) * | 2004-04-12 | 2005-12-01 | Ramesh Saripalli | Pipelined clock stretching circuitry and method for I2C logic system |
| US10698692B2 (en) * | 2016-07-21 | 2020-06-30 | Advanced Micro Devices, Inc. | Controlling the operating speed of stages of an asynchronous pipeline |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9114513D0 (en) | 1991-07-04 | 1991-08-21 | Univ Manchester | Condition detection in asynchronous pipelines |
| US5553276A (en) | 1993-06-30 | 1996-09-03 | International Business Machines Corporation | Self-time processor with dynamic clock generator having plurality of tracking elements for outputting sequencing signals to functional units |
| US5987620A (en) | 1997-09-19 | 1999-11-16 | Thang Tran | Method and apparatus for a self-timed and self-enabled distributed clock |
| US6182233B1 (en) * | 1998-11-20 | 2001-01-30 | International Business Machines Corporation | Interlocked pipelined CMOS |
-
2000
- 2000-10-06 US US09/680,672 patent/US6502202B1/en not_active Expired - Lifetime
-
2001
- 2001-10-09 WO PCT/US2001/031349 patent/WO2002029530A1/en not_active Ceased
- 2001-10-09 AU AU2001296683A patent/AU2001296683A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US6502202B1 (en) | 2002-12-31 |
| WO2002029530A1 (en) | 2002-04-11 |
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