AU2001245748A1 - Parallel terminated bus system - Google Patents

Parallel terminated bus system

Info

Publication number: AU2001245748A1
Authority: AU; Australia
Prior art keywords: bus system; terminated bus; parallel terminated; parallel; terminated
Prior art date: 2000-03-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Abandoned

Application number

AU2001245748A

Inventor

Alper Ilkbahar

Harry Muljono

Pablo M. Rodriguez

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Intel Corp

Original Assignee

Intel Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2000-03-30

Filing date

2001-03-14

Publication date

2001-10-15

2001-03-14 Application filed by Intel Corp filed Critical Intel Corp

2001-10-15 Publication of AU2001245748A1 publication Critical patent/AU2001245748A1/en

Status Abandoned legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4086—Bus impedance matching, e.g. termination
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
General Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Computer Hardware Design (AREA)
Memory System Of A Hierarchy Structure (AREA)
Information Transfer Systems (AREA)

AU2001245748A 2000-03-30 2001-03-14 Parallel terminated bus system Abandoned AU2001245748A1 (en)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
US09539640		2000-03-30
US09/539,640 US6519664B1 (en)	2000-03-30	2000-03-30	Parallel terminated bus system
PCT/US2001/008271 WO2001075616A2 (en)	2000-03-30	2001-03-14	Parallel terminated bus system

Publications (1)

Publication Number	Publication Date
AU2001245748A1 true AU2001245748A1 (en)	2001-10-15

Family

ID=24152046

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU2001245748A Abandoned AU2001245748A1 (en)	2000-03-30	2001-03-14	Parallel terminated bus system

Country Status (8)

Country	Link
US (2)	US6519664B1 (en)
EP (1)	EP1269327A2 (en)
KR (1)	KR100454780B1 (en)
CN (1)	CN1204507C (en)
AU (1)	AU2001245748A1 (en)
RU (1)	RU2239230C2 (en)
TW (1)	TWI235304B (en)
WO (1)	WO2001075616A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6687780B1 (en) *	2000-11-02	2004-02-03	Rambus Inc.	Expandable slave device system
US20020152340A1 (en) *	2001-03-29	2002-10-17	International Business Machines Corporation	Pseudo-differential parallel source synchronous bus
US7685456B1 (en) *	2003-07-30	2010-03-23	Marvell Israel (Misl) Ltd.	DDR interface bus control
US7057414B2 (en) *	2004-01-07	2006-06-06	International Business Machines Corporation	Avoiding oscillation in self-synchronous bi-directional communication system
US7844767B2 (en) *	2004-05-21	2010-11-30	Intel Corporation	Method for identifying bad lanes and exchanging width capabilities of two CSI agents connected across a link
KR100574989B1 (en) *	2004-11-04	2006-05-02	삼성전자주식회사	Memory device for improving the efficiency of the data strobe bus line, memory system having the same, and data strobe signal control method
US7843225B2 (en) *	2009-04-14	2010-11-30	Via Technologies, Inc.	Protocol-based bus termination for multi-core processors
CN114911741B (en) *	2021-02-08	2024-04-19	南京宏泰半导体科技股份有限公司	Signal synchronization method and device based on floating address system

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2535615B2 (en) *	1989-08-14	1996-09-18	株式会社東芝	Data synchronous transmission system
JP2933751B2 (en) *	1990-08-10	1999-08-16	株式会社リコー	Digital data detection circuit and detection method thereof
EP0503850A1 (en) *	1991-03-13	1992-09-16	AT&T Corp.	Microprocessor with low power bus
JP2928066B2 (en) *	1993-11-05	1999-07-28	群馬日本電気株式会社	Bus line length recognition device
US6026456A (en) *	1995-12-15	2000-02-15	Intel Corporation	System utilizing distributed on-chip termination
US6239619B1 (en) *	1996-12-11	2001-05-29	Sun Microsystems, Inc.	Method and apparatus for dynamic termination logic of data buses
US5964856A (en)	1997-09-30	1999-10-12	Intel Corporation	Mechanism for data strobe pre-driving during master changeover on a parallel bus
US5978861A (en) *	1997-09-30	1999-11-02	Iomega Corporation	Device and method for continuously polling for communication bus type and termination
US5961649A (en)	1997-12-04	1999-10-05	Intel Corporation	Method and apparatus for propagating a signal between synchronous clock domains operating at a non-integer frequency ratio
US6092212A (en) *	1997-12-22	2000-07-18	Intel Corporation	Method and apparatus for driving a strobe signal
US6317801B1 (en) *	1998-07-27	2001-11-13	Intel Corporation	System for post-driving and pre-driving bus agents on a terminated data bus

2000
- 2000-03-30 US US09/539,640 patent/US6519664B1/en not_active Expired - Lifetime
2001
- 2001-03-14 RU RU2002129009A patent/RU2239230C2/en not_active IP Right Cessation
- 2001-03-14 KR KR10-2002-7013013A patent/KR100454780B1/en not_active Expired - Fee Related
- 2001-03-14 CN CNB018076955A patent/CN1204507C/en not_active Expired - Fee Related
- 2001-03-14 AU AU2001245748A patent/AU2001245748A1/en not_active Abandoned
- 2001-03-14 EP EP01918700A patent/EP1269327A2/en not_active Withdrawn
- 2001-03-14 WO PCT/US2001/008271 patent/WO2001075616A2/en not_active Ceased
- 2001-03-21 US US09/814,469 patent/US6510477B2/en not_active Expired - Fee Related
- 2001-03-30 TW TW090107716A patent/TWI235304B/en not_active IP Right Cessation

Also Published As

Publication number	Publication date
KR20020089419A (en)	2002-11-29
WO2001075616A3 (en)	2002-06-20
US6519664B1 (en)	2003-02-11
WO2001075616A8 (en)	2001-12-06
US20020026547A1 (en)	2002-02-28
CN1451120A (en)	2003-10-22
WO2001075616A2 (en)	2001-10-11
TWI235304B (en)	2005-07-01
CN1204507C (en)	2005-06-01
EP1269327A2 (en)	2003-01-02
US6510477B2 (en)	2003-01-21
RU2239230C2 (en)	2004-10-27
KR100454780B1 (en)	2004-11-03
RU2002129009A (en)	2004-03-10

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