AU1680299A - Memory addressing - Google Patents
Memory addressingInfo
- Publication number
- AU1680299A AU1680299A AU16802/99A AU1680299A AU1680299A AU 1680299 A AU1680299 A AU 1680299A AU 16802/99 A AU16802/99 A AU 16802/99A AU 1680299 A AU1680299 A AU 1680299A AU 1680299 A AU1680299 A AU 1680299A
- Authority
- AU
- Australia
- Prior art keywords
- memory addressing
- addressing
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IE970886 | 1997-12-15 | ||
| IE970886 | 1997-12-15 | ||
| IE980710 | 1998-08-31 | ||
| IES980710 IES80916B2 (en) | 1997-12-15 | 1998-08-31 | Memory addressing |
| PCT/IE1998/000104 WO1999031665A1 (en) | 1997-12-15 | 1998-12-15 | Memory addressing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU1680299A true AU1680299A (en) | 1999-07-05 |
Family
ID=26320135
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU16802/99A Abandoned AU1680299A (en) | 1997-12-15 | 1998-12-15 | Memory addressing |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1040483A1 (en) |
| AU (1) | AU1680299A (en) |
| IE (1) | IES80916B2 (en) |
| WO (1) | WO1999031665A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013012435A1 (en) | 2011-07-18 | 2013-01-24 | Hewlett-Packard Development Company, L.P. | Security parameter zeroization |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5243703A (en) * | 1990-04-18 | 1993-09-07 | Rambus, Inc. | Apparatus for synchronously generating clock signals in a data processing system |
| US5537353A (en) * | 1995-08-31 | 1996-07-16 | Cirrus Logic, Inc. | Low pin count-wide memory devices and systems and methods using the same |
| US5818789A (en) * | 1995-10-10 | 1998-10-06 | Holtek Microelectronics, Inc. | Device and method for memory access |
| US5835965A (en) * | 1996-04-24 | 1998-11-10 | Cirrus Logic, Inc. | Memory system with multiplexed input-output port and memory mapping capability |
-
1998
- 1998-08-31 IE IES980710 patent/IES80916B2/en not_active IP Right Cessation
- 1998-12-15 WO PCT/IE1998/000104 patent/WO1999031665A1/en not_active Ceased
- 1998-12-15 EP EP98961334A patent/EP1040483A1/en not_active Ceased
- 1998-12-15 AU AU16802/99A patent/AU1680299A/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| WO1999031665A1 (en) | 1999-06-24 |
| EP1040483A1 (en) | 2000-10-04 |
| IES980710A2 (en) | 1999-06-30 |
| IES80916B2 (en) | 1999-06-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |