NO922092L - Pc med lokal bussarbitrasjon - Google Patents

Pc med lokal bussarbitrasjon

Info

Publication number: NO922092L
Authority: NO; Norway
Prior art keywords: bus; local processor; local; output data; data bus
Prior art date: 1991-05-28

Application number

NO92922092A

Other languages

English (en)

Norwegian (no)

Other versions

NO922092D0 (no

Inventor

Daniel Paul Fuoco

Luis Antonio Hernandez

Eric Mathisen

Dennis Lee Moeller

Jonathan Henry Raymond

Esmaeil Tashakori

Original Assignee

Ibm

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1991-05-28

Filing date

1992-05-26

Publication date

1992-11-30

1992-05-26 Application filed by Ibm filed Critical Ibm

1992-05-26 Publication of NO922092D0 publication Critical patent/NO922092D0/no

1992-11-30 Publication of NO922092L publication Critical patent/NO922092L/no

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/4031—Coupling between buses using bus bridges with arbitration

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
General Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Computer Hardware Design (AREA)
Bus Control (AREA)
Information Transfer Systems (AREA)
Multi Processors (AREA)
Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
Nitrogen Condensed Heterocyclic Rings (AREA)

NO92922092A 1991-05-28 1992-05-26 Pc med lokal bussarbitrasjon NO922092L (no)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US70660291A	1991-05-28	1991-05-28

Publications (2)

Publication Number	Publication Date
NO922092D0 NO922092D0 (no)	1992-05-26
NO922092L true NO922092L (no)	1992-11-30

Family

ID=24838300

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
NO92922092A NO922092L (no)	1991-05-28	1992-05-26	Pc med lokal bussarbitrasjon

Country Status (14)

Country	Link
EP (1)	EP0518504B1 (zh)
JP (1)	JPH05101001A (zh)
KR (1)	KR950008229B1 (zh)
CN (1)	CN1029165C (zh)
AT (1)	ATE169135T1 (zh)
AU (1)	AU1519992A (zh)
CA (1)	CA2064162C (zh)
DE (1)	DE69226403T2 (zh)
ES (1)	ES2118792T3 (zh)
FI (1)	FI922351A7 (zh)
MX (1)	MX9202526A (zh)
MY (1)	MY114652A (zh)
NO (1)	NO922092L (zh)
SG (1)	SG46187A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5377331A (en) *	1992-03-26	1994-12-27	International Business Machines Corporation	Converting a central arbiter to a slave arbiter for interconnected systems
US5396602A (en) *	1993-05-28	1995-03-07	International Business Machines Corp.	Arbitration logic for multiple bus computer system
EP0654743A1 (en) *	1993-11-19	1995-05-24	International Business Machines Corporation	Computer system having a DSP local bus
US5666516A (en) *	1993-12-16	1997-09-09	International Business Machines Corporation	Protected programmable memory cartridge having selective access circuitry
JPH07210465A (ja) *	1993-12-30	1995-08-11	Internatl Business Mach Corp <Ibm>	ペナルティのないキャッシュとメモリとのインタフェース
CN1049752C (zh) *	1994-09-16	2000-02-23	联华电子股份有限公司	可编程多重总线优先仲裁装置
JP2591502B2 (ja) *	1994-12-09	1997-03-19	日本電気株式会社	情報処理システムおよびそのバス調停方式
US5596729A (en) *	1995-03-03	1997-01-21	Compaq Computer Corporation	First arbiter coupled to a first bus receiving requests from devices coupled to a second bus and controlled by a second arbiter on said second bus
CN100356355C (zh) *	2003-08-01	2007-12-19	上海奇码数字信息有限公司	仲裁器和仲裁方法
US10223312B2 (en)	2016-10-18	2019-03-05	Analog Devices, Inc.	Quality of service ordinal modification

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4470114A (en) *	1982-03-01	1984-09-04	Burroughs Corporation	High speed interconnection network for a cluster of processors
EP0606102A1 (en) *	1986-09-19	1994-07-13	International Business Machines Corporation	An input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the buses
US5003465A (en) *	1988-06-27	1991-03-26	International Business Machines Corp.	Method and apparatus for increasing system throughput via an input/output bus and enhancing address capability of a computer system during DMA read/write operations between a common memory and an input/output device
US5003463A (en) *	1988-06-30	1991-03-26	Wang Laboratories, Inc.	Interface controller with first and second buffer storage area for receiving and transmitting data between I/O bus and high speed system bus
US5083259A (en) *	1988-12-07	1992-01-21	Xycom, Inc.	Computer bus interconnection device
GB9019001D0 (en) *	1990-08-31	1990-10-17	Ncr Co	Work station including a direct memory access controller and interfacing means to microchannel means

1992
- 1992-03-26 CA CA002064162A patent/CA2064162C/en not_active Expired - Fee Related
- 1992-03-31 JP JP4076500A patent/JPH05101001A/ja active Pending
- 1992-04-28 MY MYPI92000728A patent/MY114652A/en unknown
- 1992-04-28 CN CN92103106A patent/CN1029165C/zh not_active Expired - Fee Related
- 1992-04-28 AU AU15199/92A patent/AU1519992A/en not_active Abandoned
- 1992-04-28 KR KR1019920007146A patent/KR950008229B1/ko not_active Expired - Fee Related
- 1992-05-19 DE DE69226403T patent/DE69226403T2/de not_active Expired - Fee Related
- 1992-05-19 SG SG1996000349A patent/SG46187A1/en unknown
- 1992-05-19 AT AT92304511T patent/ATE169135T1/de not_active IP Right Cessation
- 1992-05-19 ES ES92304511T patent/ES2118792T3/es not_active Expired - Lifetime
- 1992-05-19 EP EP92304511A patent/EP0518504B1/en not_active Expired - Lifetime
- 1992-05-22 FI FI922351A patent/FI922351A7/fi unknown
- 1992-05-26 NO NO92922092A patent/NO922092L/no unknown
- 1992-05-28 MX MX9202526A patent/MX9202526A/es unknown

Also Published As

Publication number	Publication date
KR920022112A (ko)	1992-12-19
DE69226403D1 (de)	1998-09-03
EP0518504B1 (en)	1998-07-29
KR950008229B1 (ko)	1995-07-26
CA2064162A1 (en)	1992-11-29
NO922092D0 (no)	1992-05-26
EP0518504A1 (en)	1992-12-16
JPH05101001A (ja)	1993-04-23
ES2118792T3 (es)	1998-10-01
ATE169135T1 (de)	1998-08-15
MX9202526A (es)	1992-11-01
FI922351A7 (fi)	1992-11-29
FI922351A0 (fi)	1992-05-22
MY114652A (en)	2002-12-31
DE69226403T2 (de)	1999-03-25
CN1067323A (zh)	1992-12-23
CA2064162C (en)	2002-07-09
SG46187A1 (en)	1998-02-20
CN1029165C (zh)	1995-06-28
AU1519992A (en)	1992-12-03

Publication	Publication Date	Title
MY114231A (en)	2002-09-30	Bidirectional data storage facility for bus interface unit
MY109414A (en)	1997-01-31	Bus interface logic for computer system having dual bus architecture
ATE73241T1 (de)	1992-03-15	Datenverarbeitungssystembus mit fehlerzyklusbetrieb.
NO922092L (no)	1992-11-30	Pc med lokal bussarbitrasjon
ATE180585T1 (de)	1999-06-15	Verfahren zum betreiben eines datenübertragungssystems
FI962854A7 (fi)	1996-07-15	Jakelun automatiikkajärjestelmä, joka käyttää väli- ja pienjänniteverkon jakelujohtoja kaksisuuntaisen datan siirtovälineenä
MY125199A (en)	2006-07-31	System and method for effectively performing isochronous data transfers
DE69330646D1 (de)	2001-09-27	Datenfliessbandordnungssystem
AU6272299A (en)	2000-07-31	Regulating a data transfer time
DE3856389D1 (de)	2000-02-17	Eingabe-Ausgabe-Steuerung, die Eingabe/Ausgabe-Fenster mit Adressbereichen aufweist und die Fähigkeit zum vorherigen Lesen und späteren Schreiben besitzt
KR950004022A (ko)	1995-02-17	분산처리통합 관리시스템
JPS57113144A (en)	1982-07-14	Stored program computer
JPS6428735A (en)	1989-01-31	Interruption control system
EP0330110A3 (en)	1991-03-13	Direct memory access controller
TW269024B (en)	1996-01-21	Data accumulating and processing system
AU1517800A (en)	2000-05-22	Split computer
JPS55150032A (en)	1980-11-21	Data transfer system
JPS57197631A (en)	1982-12-03	Method of controlling information processing system
JPS56145415A (en)	1981-11-12	Direct memory access device
TW242183B (en)	1995-03-01	Chip set architecture for personal computer
JPS5786970A (en)	1982-05-31	Doubled computer system
JPS57191751A (en)	1982-11-25	Integrated circuit information processing device
JPS53118334A (en)	1978-10-16	Totalizator system
JPS61241863A (ja)	1986-10-28	共通メモリのアクセス方式
JPS5465446A (en)	1979-05-26	Direct memory access control system