MX2019014467A - Aparato de transmision y metodo de intercalacion del mismo. - Google Patents
Aparato de transmision y metodo de intercalacion del mismo.Info
- Publication number
- MX2019014467A MX2019014467A MX2019014467A MX2019014467A MX2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A
- Authority
- MX
- Mexico
- Prior art keywords
- ldpc codeword
- ldpc
- transmitting apparatus
- bits
- bit
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1157—Low-density generator matrices [LDGM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- Signal Processing (AREA)
- Mathematical Analysis (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Se proporciona un aparato de transmisión. El aparato de transmisión incluye: un codificador configurado para generar una contraseña de comprobación de paridad de baja densidad (LDPC) por medio de codificación por LDPC de bits de entrada en base a una matriz de comprobación de paridad incluyendo bits de palabra de información y bits de paridad, la contraseña LDPC incluyendo una pluralidad de grupos de bits, cada uno incluyendo una pluralidad de bits; un intercalador configurado para intercalar la contraseña LDPC; y un modulador configurado para mapear la contraseña LDPC intercalada en un símbolo de modulación, en donde el intercalador está además configurado para intercalar la contraseña LDPC de manera que un bit incluido en un grupo de bits predeterminado de entre la pluralidad de grupos de bits que constituyen la contraseña LDPC en un bit predeterminado del símbolo de modulación.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201462001160P | 2014-05-21 | 2014-05-21 | |
| KR1020150069924A KR101785692B1 (ko) | 2014-05-21 | 2015-05-19 | 송신 장치 및 그의 인터리빙 방법 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX2019014467A true MX2019014467A (es) | 2020-01-23 |
Family
ID=54882739
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2016015202A MX370106B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
| MX2019014467A MX2019014467A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
| MX2019014466A MX2019014466A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2016015202A MX370106B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2019014466A MX2019014466A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US10396819B1 (es) |
| EP (1) | EP3146637B1 (es) |
| KR (4) | KR101785692B1 (es) |
| CN (1) | CN106464271B (es) |
| BR (1) | BR112016027099B1 (es) |
| CA (2) | CA2949341C (es) |
| MX (3) | MX370106B (es) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9780808B2 (en) * | 2014-05-21 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitter apparatus and bit interleaving method thereof |
| US10721505B2 (en) * | 2015-01-21 | 2020-07-21 | Lg Electronic Inc. | Broadcast signal transmission apparatus, broadcast signal reception apparatus, broadcast signal transmission method, and broadcast signal reception method |
| US9729174B2 (en) * | 2015-05-19 | 2017-08-08 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| CN115567164B (zh) | 2017-04-14 | 2025-01-28 | 康杜实验室公司 | 向量信令码信道的流水线式前向纠错方法和装置 |
| WO2018216999A1 (ko) * | 2017-05-24 | 2018-11-29 | 한국전자통신연구원 | Miso 동작을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
| KR102465266B1 (ko) * | 2017-05-24 | 2022-11-11 | 한국전자통신연구원 | Miso 동작을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
| CN108989844B (zh) * | 2017-06-02 | 2020-10-16 | 上海数字电视国家工程研究中心有限公司 | 适用于高速运动接收的数据帧的设计方法和传输系统 |
| WO2018226028A1 (ko) * | 2017-06-07 | 2018-12-13 | 한국전자통신연구원 | 주파수/타이밍 옵셋을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
| KR102758629B1 (ko) * | 2017-06-07 | 2025-01-22 | 한국전자통신연구원 | 주파수/타이밍 옵셋을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
| US10693587B2 (en) | 2017-07-10 | 2020-06-23 | Kandou Labs, S.A. | Multi-wire permuted forward error correction |
| US11356197B1 (en) | 2021-03-19 | 2022-06-07 | Kandou Labs SA | Error-tolerant forward error correction ordered set message decoder |
| EP4459908A4 (en) * | 2022-01-28 | 2025-04-09 | Huawei Technologies Co., Ltd. | Data processing method and data processing apparatus |
| US11799700B1 (en) * | 2022-08-31 | 2023-10-24 | Qualcomm Incorporated | Decoding multi-level coded (MLC) systems |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2003256588A1 (en) * | 2002-07-03 | 2004-01-23 | Hughes Electronics Corporation | Bit-interleaved coded modulation using low density parity check (ldpc) codes |
| US7570698B2 (en) * | 2004-11-16 | 2009-08-04 | Intel Corporation | Multiple output multicarrier transmitter and methods for spatial interleaving a plurality of spatial streams |
| WO2009028886A2 (en) * | 2007-08-28 | 2009-03-05 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in a communication system using low density parity check codes |
| ES2379625T3 (es) * | 2007-09-28 | 2012-04-30 | Lg Electronics Inc. | Aparato y método para transmitir y recibir una señal |
| EP2405584B1 (en) * | 2007-10-30 | 2016-04-06 | Sony Corporation | Data processing apparatus and methods |
| ES2649560T3 (es) | 2007-11-26 | 2018-01-12 | Saturn Licensing Llc | Método y aparato para codificar y método y aparato para decodificar un código LDPC de 64K y tasa 2/3 |
| WO2009072854A1 (en) | 2007-12-06 | 2009-06-11 | Samsung Electronics Co., Ltd. | Method and apparatus for encoding and decoding channel in a communication system using low-density parity-check codes |
| KR100917201B1 (ko) * | 2007-12-11 | 2009-09-16 | 엘지전자 주식회사 | 신호 송수신 방법 및 신호 송수신 장치 |
| WO2011062424A2 (en) * | 2009-11-18 | 2011-05-26 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving data in a communication system |
| WO2012026787A2 (en) * | 2010-08-26 | 2012-03-01 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in a communication or broadcasting system using linear block code |
| JP5601182B2 (ja) | 2010-12-07 | 2014-10-08 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| JP2012151656A (ja) | 2011-01-19 | 2012-08-09 | Sony Corp | データ処理装置、及び、データ処理方法 |
| JP5630282B2 (ja) | 2011-01-19 | 2014-11-26 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| JP5637393B2 (ja) | 2011-04-28 | 2014-12-10 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
| EP2690790A1 (en) * | 2012-07-27 | 2014-01-29 | Panasonic Corporation | Bit interleaving for rotated constellations with quasi-cyclic LDPC codes |
| CN105075208B (zh) * | 2013-04-21 | 2018-06-22 | Lg电子株式会社 | 发送广播信号的设备、接收广播信号的设备、发送广播信号的方法以及接收广播信号的方法 |
| RU2656830C2 (ru) * | 2013-06-12 | 2018-06-06 | Сони Корпорейшн | Устройство обработки данных и способ обработки данных |
| KR102104937B1 (ko) * | 2013-06-14 | 2020-04-27 | 삼성전자주식회사 | Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법 |
| KR20150005853A (ko) * | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
| KR20160018791A (ko) * | 2013-08-13 | 2016-02-17 | 엘지전자 주식회사 | 방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법 및 방송 신호 수신 방법 |
| US9294325B2 (en) * | 2013-09-25 | 2016-03-22 | Lg Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
| US9735809B2 (en) * | 2013-09-26 | 2017-08-15 | Samsung Electronics Co., Ltd. | Transmitting apparatus and signal processing method thereof |
| EP3050303B1 (en) * | 2013-09-27 | 2019-04-17 | LG Electronics Inc. | Apparatus for transmitting broadcast signals and method thereof |
| EP3069515B1 (en) * | 2013-11-11 | 2020-07-15 | LG Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
| US9602245B2 (en) * | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US20160204804A1 (en) * | 2015-01-13 | 2016-07-14 | Sony Corporation | Data processing apparatus and method |
-
2015
- 2015-05-19 KR KR1020150069924A patent/KR101785692B1/ko active Active
- 2015-05-21 CN CN201580027271.9A patent/CN106464271B/zh active Active
- 2015-05-21 EP EP15796436.2A patent/EP3146637B1/en active Active
- 2015-05-21 MX MX2016015202A patent/MX370106B/es active IP Right Grant
- 2015-05-21 BR BR112016027099-1A patent/BR112016027099B1/pt active IP Right Grant
- 2015-05-21 CA CA2949341A patent/CA2949341C/en active Active
- 2015-05-21 CA CA3027221A patent/CA3027221C/en active Active
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2016
- 2016-11-18 MX MX2019014467A patent/MX2019014467A/es unknown
- 2016-11-18 MX MX2019014466A patent/MX2019014466A/es unknown
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2017
- 2017-08-25 US US15/686,280 patent/US10396819B1/en active Active
- 2017-09-29 KR KR1020170128090A patent/KR101889536B1/ko active Active
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2018
- 2018-08-10 KR KR1020180094027A patent/KR102018342B1/ko active Active
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2019
- 2019-07-02 US US16/460,305 patent/US10873343B2/en active Active
- 2019-08-29 KR KR1020190106875A patent/KR102163692B1/ko active Active
Also Published As
| Publication number | Publication date |
|---|---|
| MX370106B (es) | 2019-12-02 |
| CA2949341C (en) | 2019-02-05 |
| KR20170117973A (ko) | 2017-10-24 |
| KR102163692B1 (ko) | 2020-10-08 |
| EP3146637A4 (en) | 2018-02-28 |
| CA3027221C (en) | 2022-09-27 |
| KR101785692B1 (ko) | 2017-10-16 |
| CN106464271B (zh) | 2019-10-18 |
| MX2019014466A (es) | 2020-01-23 |
| US10396819B1 (en) | 2019-08-27 |
| KR102018342B1 (ko) | 2019-09-05 |
| KR20180093854A (ko) | 2018-08-22 |
| MX2016015202A (es) | 2017-03-03 |
| KR20150134280A (ko) | 2015-12-01 |
| US20190326932A1 (en) | 2019-10-24 |
| US10873343B2 (en) | 2020-12-22 |
| BR112016027099B1 (pt) | 2024-01-23 |
| CN106464271A (zh) | 2017-02-22 |
| CA2949341A1 (en) | 2015-11-26 |
| KR101889536B1 (ko) | 2018-08-17 |
| EP3146637A1 (en) | 2017-03-29 |
| CA3027221A1 (en) | 2015-11-26 |
| KR20190104493A (ko) | 2019-09-10 |
| BR112016027099A2 (pt) | 2021-06-08 |
| EP3146637B1 (en) | 2024-11-06 |
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