MX2017011146A - Transmisor y metodo de permutacion de paridad del mismo. - Google Patents
Transmisor y metodo de permutacion de paridad del mismo.Info
- Publication number
- MX2017011146A MX2017011146A MX2017011146A MX2017011146A MX2017011146A MX 2017011146 A MX2017011146 A MX 2017011146A MX 2017011146 A MX2017011146 A MX 2017011146A MX 2017011146 A MX2017011146 A MX 2017011146A MX 2017011146 A MX2017011146 A MX 2017011146A
- Authority
- MX
- Mexico
- Prior art keywords
- parity
- bit groups
- group
- wise
- transmitter
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Se proporciona un transmisor. El transmisor incluye: Un codificador de Comprobación de Paridad de Baja Densidad (LDPC) configurado para codificar bits de entrada para generar bits de paridad; un permutador de paridad configurado para ejecutar permutación de paridad mediante la intercalación de los bits de paridad y la intercalación a nivel de grupo de una pluralidad de grupos de bits incluyendo los bits de paridad intercalados; y una perforadora configurada para perforar algunos de los bits de paridad en los grupos de bits intercalados a nivel de grupo, en donde el permutador de paridad intercala a nivel de grupo los grupos de bits de manera que algunos de los grupos de bits son colocados en posiciones predeterminadas, respectivamente, y un remanente de los grupos de bits es colocado sin un orden dentro de los grupos de bits intercalados a nivel de grupo.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562127022P | 2015-03-02 | 2015-03-02 | |
| KR1020150137182A KR102426419B1 (ko) | 2015-03-02 | 2015-09-27 | 송신 장치 및 그의 패리티 퍼뮤테이션 방법 |
| PCT/KR2016/002094 WO2016140516A2 (en) | 2015-03-02 | 2016-03-02 | Transmitter and parity permutation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2017011146A true MX2017011146A (es) | 2017-11-28 |
| MX367265B MX367265B (es) | 2019-08-12 |
Family
ID=56950308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2017011146A MX367265B (es) | 2015-03-02 | 2016-03-02 | Transmisor y metodo de permutacion de paridad del mismo. |
Country Status (4)
| Country | Link |
|---|---|
| KR (1) | KR102426419B1 (es) |
| CN (1) | CN107408950A (es) |
| CA (1) | CA2977948C (es) |
| MX (1) | MX367265B (es) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10644835B1 (en) * | 2018-10-12 | 2020-05-05 | Samsung Electronics Co., Ltd. | System and method for interleaving distributed CRC in polar codes for early termination |
| CN112367088B (zh) * | 2020-10-27 | 2023-03-21 | 上海宇航系统工程研究所 | 一种基于索引矩阵的编码方法及装置 |
| CN113595563B (zh) * | 2021-08-02 | 2024-03-29 | 上海金卓科技有限公司 | 一种ldpc译码的方法、装置、设备及存储介质 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110055410A (ko) * | 2009-11-18 | 2011-05-25 | 삼성전자주식회사 | 통신 시스템에서 데이터 송수신 방법 및 장치 |
| CN102394660B (zh) * | 2011-08-24 | 2017-06-13 | 中兴通讯股份有限公司 | 分组交织的准循环扩展并行编码ldpc码的编码方法和编码器 |
| KR102104937B1 (ko) * | 2013-06-14 | 2020-04-27 | 삼성전자주식회사 | Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법 |
| KR20150005853A (ko) * | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
| KR20150005426A (ko) * | 2013-07-05 | 2015-01-14 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
-
2015
- 2015-09-27 KR KR1020150137182A patent/KR102426419B1/ko active Active
-
2016
- 2016-03-02 CA CA2977948A patent/CA2977948C/en active Active
- 2016-03-02 CN CN201680013552.3A patent/CN107408950A/zh active Pending
- 2016-03-02 MX MX2017011146A patent/MX367265B/es active IP Right Grant
Also Published As
| Publication number | Publication date |
|---|---|
| KR102426419B1 (ko) | 2022-07-29 |
| CN107408950A (zh) | 2017-11-28 |
| MX367265B (es) | 2019-08-12 |
| KR20160106471A (ko) | 2016-09-12 |
| CA2977948C (en) | 2023-11-07 |
| CA2977948A1 (en) | 2016-09-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG | Grant or registration |