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MX2019012060A - Un dise?o de intercalador eficiente para codigos polares. - Google Patents

Un dise?o de intercalador eficiente para codigos polares.

Info

Publication number
MX2019012060A
MX2019012060A MX2019012060A MX2019012060A MX2019012060A MX 2019012060 A MX2019012060 A MX 2019012060A MX 2019012060 A MX2019012060 A MX 2019012060A MX 2019012060 A MX2019012060 A MX 2019012060A MX 2019012060 A MX2019012060 A MX 2019012060A
Authority
MX
Mexico
Prior art keywords
rows
columns
interleaver
polar codes
interleaver design
Prior art date
Application number
MX2019012060A
Other languages
English (en)
Other versions
MX377310B (es
Inventor
Wei Chao
Li Jian
Xu Changlong
Hou Jilei
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of MX2019012060A publication Critical patent/MX2019012060A/es
Publication of MX377310B publication Critical patent/MX377310B/es

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707Simple row-column interleaver, i.e. pure block interleaving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2732Convolutional interleaver; Interleavers using shift-registers or delay lines like, e.g. Ramsey type interleaver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2742Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2757Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • H03M13/296Particular turbo code structure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • H04L1/0058Block-coded modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Toys (AREA)

Abstract

Los aspectos de la descripción se refieren a dispositivos de comunicación inalámbrica configurados para codificar bloques de información para producir bloques de códigos e intercalar los bloques de códigos utilizando un intercalador que incluye una pluralidad de filas y una pluralidad de columnas, donde el número de columnas del intercalador varía entre las filas. En algunos ejemplos, el intercalador incluye una matriz recta con forma de triángulo isósceles de filas y columnas. En otros ejemplos, el intercalador incluye una matriz con forma de trapecio de filas y columnas.
MX2019012060A 2017-04-10 2018-03-09 Un diseño de intercalador eficiente para códigos polares. MX377310B (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/CN2017/079903 WO2018187902A1 (en) 2017-04-10 2017-04-10 An efficient interleaver design for polar codes
PCT/CN2018/078555 WO2018188439A1 (en) 2017-04-10 2018-03-09 An efficient interleaver design for polar codes

Publications (2)

Publication Number Publication Date
MX2019012060A true MX2019012060A (es) 2019-11-11
MX377310B MX377310B (es) 2025-03-07

Family

ID=63792196

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2019012060A MX377310B (es) 2017-04-10 2018-03-09 Un diseño de intercalador eficiente para códigos polares.

Country Status (27)

Country Link
US (5) US10404413B2 (es)
EP (5) EP4135228A1 (es)
JP (1) JP7102437B2 (es)
KR (2) KR102180855B1 (es)
CN (2) CN110521150B (es)
AR (1) AR111366A1 (es)
AU (1) AU2018252604B2 (es)
BR (1) BR112019021069A2 (es)
CA (1) CA3055439C (es)
CL (1) CL2019002870A1 (es)
CO (1) CO2019011181A2 (es)
DK (1) DK3610592T3 (es)
ES (3) ES2927818T3 (es)
HU (2) HUE059986T2 (es)
IL (2) IL269072B (es)
MX (1) MX377310B (es)
NZ (1) NZ756924A (es)
PH (1) PH12019502015A1 (es)
PL (1) PL4135229T3 (es)
PT (1) PT3720024T (es)
RU (1) RU2753575C2 (es)
SA (1) SA519410196B1 (es)
SG (1) SG11201908068TA (es)
SI (1) SI3720024T1 (es)
TW (1) TWI745579B (es)
WO (2) WO2018187902A1 (es)
ZA (1) ZA201906664B (es)

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CA3067724C (en) * 2017-08-04 2024-10-29 Qualcomm Incorporated RECTANGULAR INTERLACER DESIGN FOR POLAR CODES
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CN115622572A (zh) * 2020-04-22 2023-01-17 华为技术有限公司 编码、译码方法、装置及设备
CN118489223A (zh) * 2022-01-05 2024-08-13 Oppo广东移动通信有限公司 交织方法、解交织方法和设备

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Also Published As

Publication number Publication date
CN112039636A (zh) 2020-12-04
BR112019021069A2 (pt) 2020-05-12
SI3720024T1 (sl) 2022-11-30
CN110521150A (zh) 2019-11-29
AU2018252604B2 (en) 2022-05-05
PL4135229T3 (pl) 2025-12-22
RU2019131688A3 (es) 2021-06-28
IL269072A (en) 2019-11-28
DK3610592T3 (da) 2022-10-03
PT3720024T (pt) 2022-10-03
EP3610592A4 (en) 2020-09-30
EP3610592A1 (en) 2020-02-19
CA3055439A1 (en) 2018-10-18
CA3055439C (en) 2021-08-24
KR20200130524A (ko) 2020-11-18
ES2928290T3 (es) 2022-11-16
EP4622120A3 (en) 2025-11-26
EP4135229A1 (en) 2023-02-15
ZA201906664B (en) 2023-05-31
US11558149B2 (en) 2023-01-17
EP4135229B1 (en) 2025-09-03
MX377310B (es) 2025-03-07
US20180294922A1 (en) 2018-10-11
US20230095580A1 (en) 2023-03-30
RU2753575C2 (ru) 2021-08-17
EP4135229C0 (en) 2025-09-03
HUE060061T2 (hu) 2023-01-28
US12081333B2 (en) 2024-09-03
EP3610592B1 (en) 2022-09-07
AU2018252604A1 (en) 2019-09-26
US20230109472A1 (en) 2023-04-06
NZ756924A (en) 2025-08-29
US10404413B2 (en) 2019-09-03
ES2927818T3 (es) 2022-11-11
JP2020517149A (ja) 2020-06-11
EP3720024B1 (en) 2022-09-07
HUE059986T2 (hu) 2023-01-28
EP4622120A2 (en) 2025-09-24
SG11201908068TA (en) 2019-10-30
US20250105944A1 (en) 2025-03-27
KR102642376B1 (ko) 2024-02-28
JP7102437B2 (ja) 2022-07-19
EP4135228A1 (en) 2023-02-15
IL269072B (en) 2020-03-31
WO2018188439A1 (en) 2018-10-18
CN110521150B (zh) 2020-10-09
WO2018187902A1 (en) 2018-10-18
TW201842742A (zh) 2018-12-01
CO2019011181A2 (es) 2019-10-21
SA519410196B1 (ar) 2025-01-13
US11996940B2 (en) 2024-05-28
ES3045611T3 (en) 2025-11-28
CL2019002870A1 (es) 2020-02-21
PH12019502015A1 (en) 2020-06-01
EP3720024A1 (en) 2020-10-07
US20190372716A1 (en) 2019-12-05
AR111366A1 (es) 2019-07-03
KR102180855B1 (ko) 2020-11-19
KR20190129134A (ko) 2019-11-19
IL272812A (en) 2020-04-30
TWI745579B (zh) 2021-11-11
CN112039636B (zh) 2023-05-09
RU2019131688A (ru) 2021-05-11

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