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MX2019009820A - Metodo para realizar la codificacion sobre la base de la matriz de verificacion de paridad del codigo de verificacion de paridad de baja densidad (ldpc) en el sistema de comunicacion inalambrico y terminal que usa el mismo. - Google Patents

Metodo para realizar la codificacion sobre la base de la matriz de verificacion de paridad del codigo de verificacion de paridad de baja densidad (ldpc) en el sistema de comunicacion inalambrico y terminal que usa el mismo.

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Publication number
MX2019009820A
MX2019009820A MX2019009820A MX2019009820A MX2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A MX 2019009820 A MX2019009820 A MX 2019009820A
Authority
MX
Mexico
Prior art keywords
parity check
matrix
terminal
check matrix
low density
Prior art date
Application number
MX2019009820A
Other languages
English (en)
Other versions
MX386564B (es
Inventor
Shin Jongwoong
Kim Jinwoo
Kim Bonghoe
Byun Ilmu
Noh Kwangseok
Original Assignee
Lg Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Electronics Inc filed Critical Lg Electronics Inc
Publication of MX2019009820A publication Critical patent/MX2019009820A/es
Publication of MX386564B publication Critical patent/MX386564B/es

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615Use of computational or mathematical techniques
    • H03M13/616Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/118Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/6306Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6362Error control coding in combination with rate matching by puncturing
    • H03M13/6368Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393Rate compatible low-density parity check [LDPC] codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • H04L1/0042Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)

Abstract

Un método para realizar la codificación sobre la base de una matriz de verificación de paridad de un código de verificación de paridad de baja densidad de acuerdo con la presente modalidad, que comprende las etapas de: generar una matriz de verificación de paridad por medio de una terminal, en donde la matriz de verificación de paridad corresponde a una matriz característica, cada componente de la matriz característica corresponde a un valor de índice de desplazamiento determinado a través de una operación de módulo entre un componente correspondiente en una matriz básica y Zc, que es un valor de elevación, y la matriz básica es una matriz de 42 x 52; y realizar la codificación de datos de entrada, por medio de la terminal, usando la matriz de verificación de paridad, en donde el valor de elevación está asociado con la longitud de los datos de entrada.
MX2019009820A 2017-03-30 2018-03-30 Método para realizar la codificación sobre la base de la matriz de verificación de paridad del código de verificación de paridad de baja densidad (ldpc) en el sistema de comunicación inalámbrico y terminal que usa el mismo. MX386564B (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762479253P 2017-03-30 2017-03-30
US201762479420P 2017-03-31 2017-03-31
US201762525219P 2017-06-27 2017-06-27
PCT/KR2018/003798 WO2018182369A1 (ko) 2017-03-30 2018-03-30 무선 통신 시스템에서 ldpc 부호의 패리티 검사 행렬을 기반으로 부호화를 수행하는 방법 및 이를 이용한 단말

Publications (2)

Publication Number Publication Date
MX2019009820A true MX2019009820A (es) 2019-11-28
MX386564B MX386564B (es) 2025-03-11

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US (2) US11211951B2 (es)
EP (1) EP3605894B1 (es)
JP (1) JP6974493B2 (es)
KR (1) KR102065427B1 (es)
CN (1) CN110402554B (es)
AU (1) AU2018246848B2 (es)
BR (1) BR112019019253B1 (es)
CA (1) CA3057817C (es)
CL (1) CL2019002497A1 (es)
MX (1) MX386564B (es)
PH (1) PH12019502212A1 (es)
RU (1) RU2719688C1 (es)
SG (1) SG11201907654TA (es)
WO (1) WO2018182369A1 (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG11201907654TA (en) * 2017-03-30 2019-09-27 Lg Electronics Inc Method for performing encoding on basis of parity check matrix of low density parity check (ldpc) code in wireless communication system and terminal using same
WO2018202143A1 (en) * 2017-05-05 2018-11-08 Mediatek Inc. Improved qc-ldpc codes
CN116896426A (zh) * 2017-07-21 2023-10-17 三星电子株式会社 用于在通信或广播系统中编码和解码信道的装置和方法
CN109391367B (zh) * 2017-08-11 2022-12-30 华为技术有限公司 通信方法和装置
WO2019033422A1 (en) 2017-08-18 2019-02-21 Nokia Solutions And Networks Oy USE OF BASIC GRAPHICS LDPC FOR NR
TWI757609B (zh) * 2018-08-03 2022-03-11 日商索尼股份有限公司 用於通訊的傳輸設備和方法、接收設備和方法
US11581907B2 (en) * 2020-12-18 2023-02-14 Sr Technologies, Inc. System and method for reception of wireless local area network packets with bit errors
WO2024130465A1 (zh) * 2022-12-19 2024-06-27 华为技术有限公司 数据传输的方法和装置
CN120500824A (zh) * 2023-01-20 2025-08-15 华为技术有限公司 一种基于ldpc码的通信方法和通信装置
WO2025155121A1 (ko) * 2024-01-18 2025-07-24 삼성전자 주식회사 통신 또는 방송 시스템에서 데이터의 부호화 및 복호화 방법 및 장치

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6751769B2 (en) 2000-06-06 2004-06-15 International Business Machines Corporation (146,130) error correction code utilizing address information
US7170849B1 (en) 2001-03-19 2007-01-30 Cisco Systems Wireless Networking (Australia) Pty Limited Interleaver, deinterleaver, interleaving method, and deinterleaving method for OFDM data
WO2004012346A2 (en) * 2002-07-30 2004-02-05 Cognio, Inc. System and method for multiple-input multiple-output (mimo) radio communication
US7334181B2 (en) 2003-09-04 2008-02-19 The Directv Group, Inc. Method and system for providing short block length low density parity check (LDPC) codes
KR100922956B1 (ko) 2003-10-14 2009-10-22 삼성전자주식회사 저밀도 패리티 검사 코드의 부호화 방법
US7581157B2 (en) * 2004-06-24 2009-08-25 Lg Electronics Inc. Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system
DE602006011240D1 (de) 2005-06-21 2010-02-04 Samsung Electronics Co Ltd Vorrichtung und Methode zum Übermitteln/Empfangen von Daten in einem Mehrantennenkommunikationssystem unter Verwendung eines strukturierten Low Density Parity Check (LDPC) Codes
KR101119111B1 (ko) 2006-05-04 2012-03-16 엘지전자 주식회사 Ldpc 부호를 이용한 데이터 재전송 방법
KR101191196B1 (ko) 2006-06-07 2012-10-15 엘지전자 주식회사 패리티 검사 행렬을 이용하여 부호화 및 복호화하는 방법
KR101128804B1 (ko) * 2006-06-07 2012-03-23 엘지전자 주식회사 참조 행렬을 이용한 lpdc 부호화 및 복호화 방법
CN100423454C (zh) * 2006-06-14 2008-10-01 北京新岸线移动多媒体技术有限公司 一类低密度奇偶校验码的实现方法
US20100122143A1 (en) * 2007-03-27 2010-05-13 Hughes Network Systems, Llc Method and system for providing low density parity check (ldpc) coding for scrambled coded multiple access (scma)
KR101405969B1 (ko) 2007-06-28 2014-06-13 엘지전자 주식회사 디지털 방송 시스템 및 데이터 처리 방법
KR101502623B1 (ko) 2008-02-11 2015-03-16 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 방법 및 장치
KR20090093778A (ko) 2008-02-29 2009-09-02 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 장치 및 방법
KR20090131230A (ko) 2008-06-17 2009-12-28 삼성전자주식회사 적어도 두 개의 주파수 대역들을 이용하는 저 밀도 패리티코드 인코딩 장치 및 디코딩 장치
JP2010114862A (ja) 2008-10-10 2010-05-20 Panasonic Corp 符号化器、送信装置及び符号化方法
EP2536030A1 (en) 2011-06-16 2012-12-19 Panasonic Corporation Bit permutation patterns for BICM with LDPC codes and QAM constellations
US9246634B2 (en) 2013-02-10 2016-01-26 Hughes Network Systems, Llc Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems
WO2014200303A1 (en) 2013-06-14 2014-12-18 Samsung Electronics Co., Ltd. Apparatuses and methods for encoding and decoding of parity check codes
KR102104937B1 (ko) 2013-06-14 2020-04-27 삼성전자주식회사 Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법
WO2015141903A1 (ko) 2014-03-17 2015-09-24 엘지전자 주식회사 무선 통신 시스템에서의 순방향 에러 정정을 위한 저밀도 패리티 체크 코드의 디코딩 방법 및 장치
US9787326B2 (en) * 2015-05-19 2017-10-10 Samsung Electronics Co., Ltd. Method and apparatus for encoding and decoding low density parity check codes
US9584158B2 (en) 2015-07-24 2017-02-28 Tidal Systems, Inc. Unified H-encoder for a class of multi-rate LDPC codes
KR102227250B1 (ko) 2016-07-20 2021-03-12 후아웨이 테크놀러지 컴퍼니 리미티드 코드를 인코딩 및 디코딩하기 위한 방법과 시스템
SG11201907654TA (en) * 2017-03-30 2019-09-27 Lg Electronics Inc Method for performing encoding on basis of parity check matrix of low density parity check (ldpc) code in wireless communication system and terminal using same
JP6970210B2 (ja) 2017-06-25 2021-11-24 エルジー エレクトロニクス インコーポレイティドLg Electronics Inc. 無線通信システムにおいてldpc符号のパリティ検査行列に基づいて符号化を行う方法及びそれを用いる端末

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WO2018182369A1 (ko) 2018-10-04
KR102065427B1 (ko) 2020-01-13
PH12019502212A1 (en) 2020-12-07
CN110402554A (zh) 2019-11-01
AU2018246848A1 (en) 2019-09-26
US11211951B2 (en) 2021-12-28
BR112019019253B1 (pt) 2020-11-10
EP3605894A1 (en) 2020-02-05
AU2018246848B2 (en) 2020-08-13
CA3057817A1 (en) 2018-10-04
CA3057817C (en) 2022-06-14
US20190268092A1 (en) 2019-08-29
CL2019002497A1 (es) 2019-12-20
RU2719688C1 (ru) 2020-04-21
SG11201907654TA (en) 2019-09-27
EP3605894A4 (en) 2020-11-25
JP2020517140A (ja) 2020-06-11
US10484132B2 (en) 2019-11-19
CN110402554B (zh) 2022-02-22
EP3605894B1 (en) 2025-03-05
KR20190006568A (ko) 2019-01-18
US20210203356A1 (en) 2021-07-01
JP6974493B2 (ja) 2021-12-01
BR112019019253A2 (pt) 2019-12-17
MX386564B (es) 2025-03-11

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