MX2019010683A - Transmisor y metodo de acortamiento del mismo. - Google Patents
Transmisor y metodo de acortamiento del mismo.Info
- Publication number
- MX2019010683A MX2019010683A MX2019010683A MX2019010683A MX2019010683A MX 2019010683 A MX2019010683 A MX 2019010683A MX 2019010683 A MX2019010683 A MX 2019010683A MX 2019010683 A MX2019010683 A MX 2019010683A MX 2019010683 A MX2019010683 A MX 2019010683A
- Authority
- MX
- Mexico
- Prior art keywords
- bits
- ldpc
- zero
- transmitter
- groups
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1157—Low-density generator matrices [LDGM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/155—Shortening or extension of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1191—Codes on graphs other than LDPC codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
- H04L1/0063—Single parity check
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
- H04L1/0069—Puncturing patterns
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Algebra (AREA)
- Pure & Applied Mathematics (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- General Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- Burglar Alarm Systems (AREA)
Abstract
Se proporciona un transmisor. El transmisor incluye: un codificador exterior configurado para codificar bits de entrada para generar bits codificados exteriores incluyendo los bits de entrada y los bits de paridad; un rellenador de ceros configurado para constituir bits de información de Comprobación de Paridad de Baja Densidad (LDPC) incluyendo los bits codificados exteriores y los bits cero; y un codificador LDPC configurado para codificar los bits de información LDPC, en donde los bits de información LDPC son divididos en una pluralidad de grupos de bits, y en donde el rellenador de ceros rellena bits cero para al menos algunos de la pluralidad de grupos de bits, cada uno de los cuales está formado de un cierto número de bits, para constituir los bits de información LDPC con base en un patrón de acortamiento predeterminado que establece que algunos de la pluralidad de grupos de bits no están colocados en secuencia en los bits de información LDPC.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562126999P | 2015-03-02 | 2015-03-02 | |
| KR1020150137181A KR101800424B1 (ko) | 2015-03-02 | 2015-09-27 | 송신 장치 및 그의 쇼트닝 방법 |
| PCT/KR2016/002074 WO2016140504A1 (en) | 2015-03-02 | 2016-03-02 | Transmitter and shortening method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2019010683A true MX2019010683A (es) | 2019-10-24 |
| MX388473B MX388473B (es) | 2025-03-20 |
Family
ID=56849009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2019010683A MX388473B (es) | 2015-03-02 | 2016-03-02 | Transmisor y método de acortamiento del mismo. |
Country Status (7)
| Country | Link |
|---|---|
| US (5) | US10141951B2 (es) |
| KR (1) | KR102411614B1 (es) |
| CN (2) | CN112234999B (es) |
| CA (1) | CA3206325A1 (es) |
| MX (1) | MX388473B (es) |
| MY (2) | MY182481A (es) |
| WO (1) | WO2016140504A1 (es) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101776267B1 (ko) | 2015-02-24 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 리피티션 방법 |
| WO2016137234A1 (en) * | 2015-02-24 | 2016-09-01 | Samsung Electronics Co., Ltd. | Transmitter and repetition method thereof |
| US10098172B2 (en) * | 2015-05-15 | 2018-10-09 | Qualcomm Incorporated | Techniques for managing communication links of a plurality of radio access technologies (RATS) |
| CN112671688B (zh) * | 2015-07-23 | 2024-04-05 | 三星电子株式会社 | 发送方法和接收方法 |
| US10560218B2 (en) * | 2017-01-05 | 2020-02-11 | Huawei Technologies Co., Ltd. | Apparatus and methods for decoding assistant bit-based polar code construction |
| US10484019B2 (en) * | 2017-10-30 | 2019-11-19 | Western Digital Technologies, Inc. | Adaptive encoder/decoder |
| KR20250011884A (ko) | 2023-07-12 | 2025-01-22 | 한국과학기술연구원 | 조직 재생을 위한 전기 자극 세포 활성 및 활성산소 제거 복합 디바이스 |
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| JP3606412B2 (ja) * | 1996-09-02 | 2005-01-05 | ソニー株式会社 | データ受信装置および方法 |
| DE10030407B4 (de) * | 1999-07-14 | 2011-09-01 | Lg Electronics Inc. | Verfahren zur optimalen Ratenanpassung in einem Mobilkommunikationssystem |
| JP4045521B2 (ja) * | 1999-08-02 | 2008-02-13 | ソニー株式会社 | 符号化装置および方法 |
| EP2293452B1 (en) * | 2000-07-05 | 2012-06-06 | LG ELectronics INC. | Method of puncturing a turbo coded data block |
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2016
- 2016-03-02 MY MYPI2017702836A patent/MY182481A/en unknown
- 2016-03-02 CN CN202011130638.9A patent/CN112234999B/zh active Active
- 2016-03-02 WO PCT/KR2016/002074 patent/WO2016140504A1/en not_active Ceased
- 2016-03-02 US US15/058,365 patent/US10141951B2/en active Active
- 2016-03-02 MX MX2019010683A patent/MX388473B/es unknown
- 2016-03-02 CN CN202011130746.6A patent/CN112235000B/zh active Active
- 2016-03-02 MY MYPI2020006557A patent/MY199294A/en unknown
- 2016-03-02 CA CA3206325A patent/CA3206325A1/en active Pending
- 2016-04-15 US US15/130,181 patent/US10277251B2/en active Active
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2019
- 2019-01-09 US US16/243,591 patent/US10862510B2/en active Active
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2020
- 2020-10-29 US US17/083,636 patent/US11522561B2/en active Active
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2021
- 2021-03-08 KR KR1020210030281A patent/KR102411614B1/ko active Active
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2022
- 2022-12-05 US US18/075,226 patent/US12074613B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20190149171A1 (en) | 2019-05-16 |
| US12074613B2 (en) | 2024-08-27 |
| KR102411614B1 (ko) | 2022-06-22 |
| MY199294A (en) | 2023-10-24 |
| US10862510B2 (en) | 2020-12-08 |
| CN112234999A (zh) | 2021-01-15 |
| CA3206325A1 (en) | 2016-09-09 |
| US20210044304A1 (en) | 2021-02-11 |
| KR20210029757A (ko) | 2021-03-16 |
| US20160261374A1 (en) | 2016-09-08 |
| US20160261285A1 (en) | 2016-09-08 |
| MX388473B (es) | 2025-03-20 |
| CN112235000B (zh) | 2023-09-01 |
| US10141951B2 (en) | 2018-11-27 |
| US11522561B2 (en) | 2022-12-06 |
| CN112235000A (zh) | 2021-01-15 |
| WO2016140504A1 (en) | 2016-09-09 |
| CN112234999B (zh) | 2023-08-29 |
| US10277251B2 (en) | 2019-04-30 |
| MY182481A (en) | 2021-01-25 |
| US20230109262A1 (en) | 2023-04-06 |
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