MX2017010818A - Transmisor y metodo para generar paridad adicional del mismo. - Google Patents
Transmisor y metodo para generar paridad adicional del mismo.Info
- Publication number
- MX2017010818A MX2017010818A MX2017010818A MX2017010818A MX2017010818A MX 2017010818 A MX2017010818 A MX 2017010818A MX 2017010818 A MX2017010818 A MX 2017010818A MX 2017010818 A MX2017010818 A MX 2017010818A MX 2017010818 A MX2017010818 A MX 2017010818A
- Authority
- MX
- Mexico
- Prior art keywords
- parity
- pattern
- bits
- transmitter
- group
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3761—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using code combining, i.e. using combining of codeword portions which may have been transmitted separately, e.g. Digital Fountain codes, Raptor codes or Luby Transform [LT] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3769—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using symbol combining, e.g. Chase combining of symbols received twice or more
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0079—Formats for control data
- H04L1/008—Formats for control data where the control data relates to payload of a different packet
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2032—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
- H04L27/2053—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases
- H04L27/206—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
Abstract
Se proporciona un transmisor. El transmisor incluye: un codificador de Comprobación de Paridad de Baja Densidad (LDPC) configurado para codificar bits de entrada para generar una palabra código LDPC incluyendo los bits de entrada y bits de paridad que van a ser transmitidos en una trama actual; un permutador de paridad configurado para intercalar los bits de paridad e intercalar a nivel de grupo una pluralidad de grupos de bits de paridad configurando los bits de paridad intercalados con base en un patrón de intercalación a nivel de grupo incluyendo un primer patrón y un segundo patrón para ejecutar permutación de paridad; una perforadora configurada para perforar al menos algunos de los grupos de bits de paridad intercalados a nivel de grupo; y un generador de paridad adicional configurado para seleccionar al menos algunos de los grupos de bits de paridad perforados para generar bits de paridad adicionales que van a ser transmitidos en una trama previa de la trama actual, con base en el primer patrón y el segundo patrón.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562120560P | 2015-02-25 | 2015-02-25 | |
| KR1020150137180A KR102426771B1 (ko) | 2015-02-25 | 2015-09-27 | 송신 장치 및 그의 부가 패리티 생성 방법 |
| PCT/KR2016/001885 WO2016137259A1 (en) | 2015-02-25 | 2016-02-25 | Transmitter and method for generating additional parity thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2017010818A true MX2017010818A (es) | 2017-12-07 |
| MX368002B MX368002B (es) | 2019-09-13 |
Family
ID=56943091
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2017010818A MX368002B (es) | 2015-02-25 | 2016-02-25 | Transmisor y método para generar paridad adicional del mismo. |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US11044041B2 (es) |
| KR (3) | KR102426771B1 (es) |
| CN (3) | CN111884763B (es) |
| CA (2) | CA2975992C (es) |
| MX (1) | MX368002B (es) |
| MY (2) | MY209689A (es) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102426380B1 (ko) * | 2015-02-25 | 2022-07-29 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
| US10142055B2 (en) | 2015-02-25 | 2018-11-27 | Samsung Electronics Co., Ltd. | Transmitter and method for generating additional parity thereof |
| KR102426771B1 (ko) | 2015-02-25 | 2022-07-29 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
| JP6885027B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
| JP6885028B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
| CN111418160B (zh) * | 2017-09-12 | 2023-12-15 | 瑞典爱立信有限公司 | 用于极化码的crc交织模式 |
| US11165443B2 (en) * | 2018-10-01 | 2021-11-02 | Microchip Technology Incorporated | Burst error tolerant decoder and related systems, methods, and devices |
Family Cites Families (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DK2190123T3 (da) * | 2002-07-03 | 2012-05-29 | Dtvg Licensing Inc | Fremgangsmåde og system til generering af Low Density Parity Check (LDPC) koder |
| KR100659266B1 (ko) * | 2004-04-22 | 2006-12-20 | 삼성전자주식회사 | 다양한 코드율을 지원하는 저밀도 패러티 검사 코드에 의한데이터 송수신 시스템, 장치 및 방법 |
| US7783952B2 (en) * | 2006-09-08 | 2010-08-24 | Motorola, Inc. | Method and apparatus for decoding data |
| US8266508B2 (en) | 2007-06-08 | 2012-09-11 | Telefonaktiebolaget L M Ericsson (Publ) | Computational efficient convolutional coding with rate matching |
| WO2009028886A2 (en) | 2007-08-28 | 2009-03-05 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in a communication system using low density parity check codes |
| PL2056510T3 (pl) | 2007-10-30 | 2013-08-30 | Sony Corp | Urządzenie i sposób przetwarzania danych |
| CN102282845B (zh) | 2009-01-14 | 2014-12-17 | Lg电子株式会社 | 用于发送和接收信号的装置以及用于发送和接收信号的方法 |
| KR101691841B1 (ko) * | 2009-02-12 | 2017-01-02 | 엘지전자 주식회사 | 신호 송신 장치 및 방법 |
| TWI427936B (zh) | 2009-05-29 | 2014-02-21 | Sony Corp | 接收設備,接收方法,程式,及接收系統 |
| US8495450B2 (en) * | 2009-08-24 | 2013-07-23 | Samsung Electronics Co., Ltd. | System and method for structured LDPC code family with fixed code length and no puncturing |
| WO2011062424A2 (en) * | 2009-11-18 | 2011-05-26 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving data in a communication system |
| JP5505725B2 (ja) | 2010-09-16 | 2014-05-28 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| KR101702358B1 (ko) | 2011-01-06 | 2017-02-03 | 삼성전자주식회사 | 저밀도 패리티 검사 코드를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치 |
| KR101611169B1 (ko) | 2011-01-18 | 2016-04-11 | 삼성전자주식회사 | 통신/방송 시스템에서 데이터 송수신 장치 및 방법 |
| US8769370B2 (en) | 2011-01-21 | 2014-07-01 | Panasonic Corporation | Encoding method, decoding method, encoder, and decoder |
| EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
| KR101791477B1 (ko) * | 2011-10-10 | 2017-10-30 | 삼성전자주식회사 | 통신/방송 시스템에서 데이터 송수신 장치 및 방법 |
| CN107566089B (zh) * | 2013-01-11 | 2020-08-21 | 太阳专利托管公司 | 发送装置、发送方法、接收装置及接收方法 |
| WO2014123018A1 (ja) | 2013-02-08 | 2014-08-14 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| US9450704B2 (en) * | 2013-04-08 | 2016-09-20 | Samsung Electronics Co., Ltd. | Transmitting apparatus, interleaving method thereof, receiving apparatus, and deinterleaving method thereof |
| KR102104937B1 (ko) * | 2013-06-14 | 2020-04-27 | 삼성전자주식회사 | Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법 |
| US10382059B2 (en) * | 2013-07-03 | 2019-08-13 | Samsung Electronics Co., Ltd. | Transmitting apparatus, encoding method thereof, receiving apparatus, and decoding method thereof |
| KR20150005426A (ko) * | 2013-07-05 | 2015-01-14 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
| KR20150005853A (ko) | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
| WO2015041475A1 (ko) | 2013-09-17 | 2015-03-26 | 삼성전자 주식회사 | 송신 장치 및 그의 펑처링 방법 |
| US20150082118A1 (en) | 2013-09-18 | 2015-03-19 | Samsung Electronics Co., Ltd. | Transmitting apparatus and puncturing method thereof |
| WO2016137234A1 (en) * | 2015-02-24 | 2016-09-01 | Samsung Electronics Co., Ltd. | Transmitter and repetition method thereof |
| KR101776273B1 (ko) * | 2015-02-25 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
| US10142055B2 (en) * | 2015-02-25 | 2018-11-27 | Samsung Electronics Co., Ltd. | Transmitter and method for generating additional parity thereof |
| MY189607A (en) * | 2015-02-25 | 2022-02-20 | Samsung Electronics Co Ltd | Transmitter and method for generating additional parity thereof |
| KR102426771B1 (ko) * | 2015-02-25 | 2022-07-29 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
| US10355814B2 (en) * | 2015-02-25 | 2019-07-16 | Samsung Electronics Co., Ltd. | Transmitter and method for generating additional parity thereof |
| CA3209954A1 (en) * | 2015-03-02 | 2016-09-09 | Samsung Electronics Co., Ltd. | Transmitter and parity permutation method thereof |
| CA3214526A1 (en) * | 2015-03-02 | 2016-09-09 | Samsung Electronic Co., Ltd. | Transmitter and parity permutation method thereof |
| US10326474B2 (en) * | 2015-03-02 | 2019-06-18 | Samsung Electronics Co., Ltd. | Transmitter and parity permutation method thereof |
| KR101800415B1 (ko) * | 2015-03-02 | 2017-11-23 | 삼성전자주식회사 | 송신 장치 및 그의 패리티 퍼뮤테이션 방법 |
-
2015
- 2015-09-27 KR KR1020150137180A patent/KR102426771B1/ko active Active
-
2016
- 2016-02-25 CA CA2975992A patent/CA2975992C/en active Active
- 2016-02-25 MX MX2017010818A patent/MX368002B/es active IP Right Grant
- 2016-02-25 CN CN202010716626.8A patent/CN111884763B/zh active Active
- 2016-02-25 CA CA3084931A patent/CA3084931C/en active Active
- 2016-02-25 MY MYPI2020006603A patent/MY209689A/en unknown
- 2016-02-25 CN CN202010717119.6A patent/CN111884764B/zh active Active
- 2016-02-25 MY MYPI2017702573A patent/MY192123A/en unknown
- 2016-02-25 CN CN201680012352.6A patent/CN107431565B/zh active Active
-
2019
- 2019-05-20 US US16/417,110 patent/US11044041B2/en active Active
-
2021
- 2021-05-19 US US17/324,545 patent/US11658770B2/en active Active
-
2022
- 2022-07-25 KR KR1020220092033A patent/KR102554358B1/ko active Active
-
2023
- 2023-04-20 US US18/304,029 patent/US12021616B2/en active Active
- 2023-07-06 KR KR1020230087817A patent/KR102770687B1/ko active Active
Also Published As
| Publication number | Publication date |
|---|---|
| KR20160103907A (ko) | 2016-09-02 |
| US12021616B2 (en) | 2024-06-25 |
| MX368002B (es) | 2019-09-13 |
| MY209689A (en) | 2025-07-30 |
| US20190280812A1 (en) | 2019-09-12 |
| KR102426771B1 (ko) | 2022-07-29 |
| CA2975992A1 (en) | 2016-09-01 |
| US20230299877A1 (en) | 2023-09-21 |
| CN111884763B (zh) | 2023-06-20 |
| KR102770687B1 (ko) | 2025-02-24 |
| CA3084931A1 (en) | 2016-09-01 |
| CA3084931C (en) | 2023-02-28 |
| CA2975992C (en) | 2020-09-15 |
| MY192123A (en) | 2022-07-28 |
| KR20220110686A (ko) | 2022-08-09 |
| KR20230107771A (ko) | 2023-07-18 |
| US11044041B2 (en) | 2021-06-22 |
| CN111884764B (zh) | 2023-07-21 |
| KR102554358B1 (ko) | 2023-07-11 |
| US20210351866A1 (en) | 2021-11-11 |
| US11658770B2 (en) | 2023-05-23 |
| CN111884763A (zh) | 2020-11-03 |
| CN107431565A (zh) | 2017-12-01 |
| CN111884764A (zh) | 2020-11-03 |
| CN107431565B (zh) | 2020-08-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| MY195547A (en) | Transmitter and Method for Generating Additional Parity Thereof | |
| MX394364B (es) | Transmisor y metodo para generar paridad adicional del mismo | |
| MX2017010906A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
| MX2017010818A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
| MX391728B (es) | Transmisor y metodo de permutacion de paridad del mismo | |
| MX2019015600A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX2020011644A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX2017010821A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
| MX2016010776A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2020004307A (es) | Transmisor y metodo de generacion de paridad adicional del mismo. | |
| MX2019008372A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2019014455A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2019014466A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2020003926A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
| MY191567A (en) | Transmitter and repetition method thereof | |
| MX367265B (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX394361B (es) | Transmisor y metodo para generar paridad adicional del mismo | |
| MX376908B (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX373036B (es) | Transmisor y metodo de generacion de paridad adicional del mismo. |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG | Grant or registration |