MX2017008942A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents
Dispositivo de procesamiento de datos y metodo de procesamiento de datos.Info
- Publication number
- MX2017008942A MX2017008942A MX2017008942A MX2017008942A MX2017008942A MX 2017008942 A MX2017008942 A MX 2017008942A MX 2017008942 A MX2017008942 A MX 2017008942A MX 2017008942 A MX2017008942 A MX 2017008942A MX 2017008942 A MX2017008942 A MX 2017008942A
- Authority
- MX
- Mexico
- Prior art keywords
- data processing
- ldpc codes
- interleaving
- modcod
- type
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Computer Networks & Wireless Communication (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
La presente tecnología se refiere a un dispositivo de procesamiento de datos y un método de procesamiento de datos que realiza una coexistencia eficiente de una pluralidad de sistemas de intercalación de bloques en la transmisión de datos utilizando un código LDPC. Para la intercalación en forma de grupos, la intercalación en forma de grupos en un código LDPC de MODCOD se realiza de modo tal que sea obtenible un resultado de intercalación de bloques idéntico a un resultado de intercalación de bloques de un tipo B al momento de la ejecución de un tipo A para la intercalación de bloques del código LDPC de la MODCOD-B, o la intercalación en forma de grupos en un código LDPC de la MODCOD-A se realiza de modo tal que sea obtenible un resultado de intercalación de bloques idéntico al resultado de intercalación de bloques del tipo A al momento de la ejecución del tipo B para la intercalación de bloques del código LDPC de la MODCOD-A. La presente tecnología es aplicable por ejemplo a la transmisión de datos utilizando un código LDPC.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562102941P | 2015-01-13 | 2015-01-13 | |
| US201562105494P | 2015-01-20 | 2015-01-20 | |
| US14/840,888 US20160204804A1 (en) | 2015-01-13 | 2015-08-31 | Data processing apparatus and method |
| PCT/JP2016/050017 WO2016114156A1 (ja) | 2015-01-13 | 2016-01-04 | データ処理装置、及び、データ処理方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX2017008942A true MX2017008942A (es) | 2017-09-28 |
Family
ID=56368265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2017008942A MX2017008942A (es) | 2015-01-13 | 2016-01-04 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US20160204804A1 (es) |
| EP (1) | EP3247043A4 (es) |
| JP (1) | JP6601688B2 (es) |
| KR (1) | KR102521809B1 (es) |
| CA (1) | CA2973181C (es) |
| MX (1) | MX2017008942A (es) |
| WO (1) | WO2016114156A1 (es) |
Families Citing this family (77)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9253518B2 (en) | 2012-11-09 | 2016-02-02 | Sony Corporation | On-demand access to scheduled content |
| KR102104937B1 (ko) * | 2013-06-14 | 2020-04-27 | 삼성전자주식회사 | Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법 |
| US9543982B2 (en) | 2014-02-13 | 2017-01-10 | Electronics And Telecommunications Research Institute | Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 2/15 code rate |
| KR101775704B1 (ko) | 2014-05-21 | 2017-09-19 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
| US9780808B2 (en) * | 2014-05-21 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitter apparatus and bit interleaving method thereof |
| US9800269B2 (en) | 2014-05-21 | 2017-10-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US9602245B2 (en) | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| KR101785692B1 (ko) | 2014-05-21 | 2017-10-16 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
| KR101775703B1 (ko) * | 2014-05-21 | 2017-09-06 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
| US10326471B2 (en) * | 2014-05-22 | 2019-06-18 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same |
| US10361720B2 (en) * | 2014-05-22 | 2019-07-23 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same |
| KR102240745B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240750B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240748B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240741B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240744B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240728B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240740B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102240736B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102287629B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102287620B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102287627B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| KR102287637B1 (ko) * | 2015-02-17 | 2021-08-10 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 4/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
| CN111245574B (zh) * | 2015-03-06 | 2022-11-15 | 韩国电子通信研究院 | 使用引导码和前导码的广播信号帧生成方法 |
| US20160336968A1 (en) * | 2015-05-11 | 2016-11-17 | Comtech Ef Data Corp. | System and method for encoding and decoding using a plurality of constellations within a single fec block |
| US9912356B2 (en) | 2015-05-18 | 2018-03-06 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| US9748975B2 (en) * | 2015-05-19 | 2017-08-29 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US9780917B2 (en) | 2015-05-19 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| US9800365B2 (en) | 2015-05-19 | 2017-10-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| US9787422B2 (en) | 2015-05-19 | 2017-10-10 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| WO2016185911A1 (ja) * | 2015-05-19 | 2016-11-24 | ソニーセミコンダクタソリューションズ株式会社 | 符号化装置及び符号化方法 |
| US9762346B2 (en) * | 2015-05-19 | 2017-09-12 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| US9780916B2 (en) | 2015-05-19 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitting apparatus and mapping method thereof |
| JP6965104B2 (ja) * | 2016-12-28 | 2021-11-10 | 日本放送協会 | 送信装置、受信装置及びチップ |
| JP6852428B2 (ja) * | 2017-02-06 | 2021-03-31 | ソニー株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6891519B2 (ja) * | 2017-02-06 | 2021-06-18 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
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| JP6601688B2 (ja) | 2019-11-06 |
| JPWO2016114156A1 (ja) | 2017-10-19 |
| CA2973181A1 (en) | 2016-07-21 |
| EP3247043A4 (en) | 2018-10-03 |
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