[go: up one dir, main page]

Mukherji et al., 2010 - Google Patents

An Approach to Implement AMBA APB Timer IP Using SystemC

Mukherji et al., 2010

View PDF
Document ID
9463233828141698417
Author
Mukherji R
Choudhary T
CHATTERJEE A
Publication year
Publication venue
Journal of Computer and Mathematical Sciences Vol

External Links

Snippet

The ever growing complexity and heterogeneity of System on Chip designs demands early consideration and exploration of architectural alternatives, w hich is hardly practicable on the low abstraction level of implementation models. In this paper, a system level design …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • G06F17/5022Logic simulation, e.g. for logic circuit operation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/5054Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • G06F17/5036Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
    • G06F1/3237Power saving by disabling clock generation or distribution
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/505Logic synthesis, e.g. technology mapping, optimisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/68Processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/86Hardware-Software co-design
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/16Constructional details or arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/78Architectures of general purpose stored programme computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements

Similar Documents

Publication Publication Date Title
Chou et al. The chinook hardware/software co-synthesis system
Grüttner et al. The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration
Pimentel The artemis workbench for system-level performance evaluation of embedded systems
CN110785761B (en) Compression method of simulation time line in dynamic reprogramming of clock
Liang et al. FlexCL: A model of performance and power for OpenCL workloads on FPGAs
Qamar et al. LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow
Škuta et al. Automation of dynamic power management in FPGA-based energy-constrained systems
Lajolo et al. Cosimulation-based power estimation for system-on-chip design
Lemaire et al. A flexible modeling environment for a NoC-based multicore architecture
Rykunov Design of asynchronous microprocessor for power proportionality
Bansal et al. Automatic power modeling of infrastructure ip for system-on-chip power analysis
JP2008299464A (en) Power consumption calculation method, power consumption calculation program, and power consumption calculation device
Mukherji et al. An Approach to Implement AMBA APB Timer IP Using SystemC
Ahuja et al. Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Ammar et al. The performance-energy tradeoff in embedded systems design: A survey of existing design space exploration tools and trends
Ducroux et al. Fast and accurate power annotated simulation: Application to a many-core architecture
Coussy et al. GAUT–a free and open source high-level synthesis tool
Grüttner et al. Towards an esl framework for timing and power aware rapid prototyping of hw/sw systems
Shaout et al. Specification and modeling of hw/sw co-design for heterogeneous embedded systems
Dömer Transaction level modeling of computation
Shah et al. A lightweight-system-level power and area estimation methodology for application specific instruction set processors
Zhang Power Profiling Model for RISC-V Core
Khan et al. A HW/SW co-design methodology: An accurate power efficiency model and design metrics for embedded system
Aditya et al. Algorithmic synthesis using PICO: An integrated framework for application engine synthesis and verification from high level C algorithms
Lakshminarayana et al. Common-case computation: A high-level energy and performance optimization technique