Activity for Holger Vogt
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Holger Vogt posted a comment on discussion ngspice-users
This one does show the bug (ngspice-45.2 and older): Test call to subcircuit within subcircuit ***************************************************************************** * AMC1351 SUBCIRCUIT * Precision, 5-V Input, Reinforced Isolated Amplifier * source AMC1351 .SUBCKT AMC1351_kicad VDD1 INP INN GND1 GND2 OUTN OUTP VDD2 .include AMC1351.lib XDEVICE VDD1 INP GND1 GND2 OUTN OUTP VDD2 AMC1351 .ENDS X1 v1 in gnd gnd gnd outn outp v2 AMC1351_kicad Vd1 v1 0 5 Vin in 0 2.5 Vd2 v2 0 5 .control op print...
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What library are you refering to? I guess you have to google for 6AN8t and 6AN8p spice models.
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No problem to run this (with set ngbehavior=ltpsa in .spiceinit): Test ***************************************************************************** * AMC1351 SUBCIRCUIT * Precision, 5-V Input, Reinforced Isolated Amplifier * source AMC1351 .include AMC1351.lib *.SUBCKT AMC1351 VDD1 IN GND1 GND2 OUTN OUTP VDD2 X1 v1 in gnd gnd outn outp v2 AMC1351 Vd1 v1 0 5 Vin in 0 2.5 Vd2 v2 0 5 .control op print in outp-outn .endc .end with output (amplification 0.4V/V) No. of Data Rows : 1 in = 2.500000e+00...
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The ngspice manual, chapter 11.3.2 list the items which may be swept with a .dc command: voltage or current sources, resistors, or the temperature. If you want to sweep something else, e.g. parameters, you have to resort to the ngspice control language and create a script. Please have a look at https://ngspice.sourceforge.io/ngspice-control-language-tutorial.html#step for an intro and examples.
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The ngspice manual, chapter 11.3.2 list the item which may be swept with a .dc command: voltage or current sources, resistors, or the temperature. If you want to sweep something else, e.g. parameters, you have to resort to the ngspice control language and create a script. Please have a look at https://ngspice.sourceforge.io/ngspice-control-language-tutorial.html#step for an intro and examples.
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You might want to understand how a behavioral capacitor is modelled: Cxxx n1 n2 C = {equation} or Cxxx n1 n2 {equation} --> Exxx n-aux 0 n2 n1 1 Cxxx n-aux 0 1 Bxxx n1 n2 I = i(Exxx) * equation or Cxxx n1 n2 Q = {equation} --> Gxxx n1 n2 n-aux 0 1 Lxxx n-aux 0 1 Bxxx 0 n-aux I = equation
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Your circuit is violating a basic spice rule: each node has to have a dc path to ground. Otherwise the operating point solution may become impossible. Node 2 is floating dc-wise. Place a 1G resistor from 2 to gnd, and op is available without warnings.
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Thanks for the report. I have pushed a fix to git branch pre-master-46.
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Unfortunately your setup information is scarce. I will try again with ../configure --disable-debug --disable-openmp --disable-xspice -with-readline=no Indeed, when removing XSPICE pre-processor directive, I can reproduce the error.
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Just checked it out: Mac mini, Apple M2, Sequoia 15.6.1 git branch pre-master-46 compile command: sudo ./compile_macos_clang_M2.sh No problem to compile ngspice-45+. Of course also no problem with Cygwin, MINGW, VS2022, Linux gcc.
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Unfortunately your setup information is scarce. I will try again with ../configure --disable-debug --disable-openmp --disable-xspice -with-readline=no
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Unfortunately your setup information is scarse. I will try again with ../configure --disable-debug --disable-openmp --disable-xspice -with-readline=no
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Just checked it out: Mac mini, Apple M2, Sequoia 15.6.1 git branch pre-master-46 compile command: sudo ./compile_macos_clang_M2.sh No problem to compile ngspice-45+
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Scripting with the ngspice control language seems somewhat special. But it is powerful if you know what to do. See this: * support request 83 * create legends *.lib D:\Spice_general\IHP-Open-PDK\ihp-sg13g2\libs.tech\ngspice\models\cornerMOSlv.lib mos_tt R2 1 0 1 TC1=1e-3 TC2=1e-5 VDD 1 0 1 .save all .probe I(r2) .control set myplot = ( ) ; create a variable later used in the plot command foreach operating_temprature 27 127 227 set temp = $operating_temprature DC VDD 0 1.2 0.1 let curr{$operating_temprature}=I(r2)...
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Scripting with the ngspice control language seems somewhat special. But it is powerful if you know what to do. See this: * support request 83 * create legends *.lib D:\Spice_general\IHP-Open-PDK\ihp-sg13g2\libs.tech\ngspice\models\cornerMOSlv.lib mos_tt R2 1 0 1 TC1=1e-3 TC2=1e-5 VDD 1 0 1 .save all .probe I(r2) .control set myplot = ( ) ; create a variable later used in the plot command foreach operating_temprature 27 127 227 set temp = $operating_temprature DC VDD 0 1.2 0.1 let curr{$operating_temprature}=I(r2)...
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I have pushed a fix removing the IPC stuff to git branch pre-master-46. All my test on MS Windows have been o.k. (CYGWIN, MINGW, VS 2022, exe and shared library). More tests are need on Linux. And there has been code for the shared ngspice, concerning event data, which probably have never worked, as it has been buried in the IPC code. I have to check my previous intentions and run some tests.
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optran may be deselected by adding command optran 1 1 1 0 0 0 to .spinit, .spiceinit, or the top of the .control section. Raw files cannot be re-loaded for use in a simulation. However there is the command wrnodev to write out all node voltages in form of initial conditions (see manual chapter 13.5.108). The resulting file may be included by .include, and the initial conditions used (see manual chapter 11.2.2). You may give a user-defined optran command, e.g. as optran 0 0 0 1u 100u 80u where all...
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Next step, as described in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvaf-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as described in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvaf-r -o psp103_nqs.osdi psp103_nqs.va Put...
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In ngspice there are two different ancient (more than 20 years old) code sections on inter process communication (search for CLUSTER or g_ipc.enabled). I have never heard of anybody using these features, nor if they are working. And there is no documentation available. So I intend to remove them, as they clutter the code at various positions. Please comment.
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Next step, as described in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as descfribed in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as descfribed in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as descfribed in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as descfribed in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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Next step, as descfribed in the ngspice manual, chapter 9: the transistor models named PSP103.6 are coded in Verilog-A, not being part of the ngspice distribution. So you have to add them manually. Download the Verilog-A code from https://github.com/dwarning/VA-Models/tree/main/code/psp103/vacode103p6 Download the OpenVAF compiler from https://fides.fe.uni-lj.si/openvaf/download/openvaf-reloaded-osdi_0.4-75-g05415bc-linux_x64.tar.gz Compile the model ./openvar-r -o psp103_nqs.osdi psp103_nqs.va Put...
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ngspice-36 is not suited for this simulation. Please upgrade to ngspice-45.2.
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First of all, this is not a ngspice problem, but a problem of installing the IHP PDK in a non-standard environment. Thus you should not expect that somebody here is going to install colab or a jupiter notebook just to follow your issue. Typically it is not a good idea to tinker around with PDK files, as you need to understand in detail their interdependencies. However you might have a look at "IHP-Open-PDK\ihp-sg13g2\libs.tech\ngspice.spiceinit", drawn from a standard clone of the IHP PDK to directory...
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Giles, nice feature: global symbol definitions: ---> oscompiled = 8 ---> pi = 3.14159 ---> e = 2.71828 ---> echarge = 1.60218e-19 ---> boltz = 1.38065e-23 ---> kelvin = -273.15 ---> planck = 6.62607e-34 Global temperature does not do, as it is set long after parameter evaluation. But the user may set the global temperature by a parameter anyway .param newtemp=111 .temp {newtemp} so does not need to read it again.
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Giles, nice feature: ~~~ global symbol definitions: ---> oscompiled = 8 ---> pi = 3.14159 ---> e = 2.71828 ---> echarge = 1.60218e-19 ---> boltz = 1.38065e-23 ---> kelvin = -273.15 ---> planck = 6.62607e-34 Global temperature does not do, as it is set long after parameter evaluation. But the user may set the global temperature by a parameter anyway .param newtemp=111 .temp {newtemp} ~~~ so does not need to read it again.
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Giles, nice feature: ~~~ global symbol definitions: ---> oscompiled = 8 ---> pi = 3.14159 ---> e = 2.71828 ---> echarge = 1.60218e-19 ---> boltz = 1.38065e-23 ---> kelvin = -273.15 ---> planck = 6.62607e-34 Global temperature does not do, as it is set long after parameter evaluation. But the user may set the global temperature by a parameter anyway .param newtemp=111 .temp {newtemp} ~~~ so does not need to read it again.
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Giles, nice feature: ~~~ global symbol definitions: ---> oscompiled = 8 ---> pi = 3.14159 ---> e = 2.71828 ---> echarge = 1.60218e-19 ---> boltz = 1.38065e-23 ---> kelvin = -273.15 ---> planck = 6.62607e-34 Global temperature does not do, as it is set long after parameter evaluation. But the user may set the global temperature by a parameter anyway .param newtemp=111 .temp {newtemp} ~~~ so does not need to read it again.
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Still a would prefer having more info for the user, why opening a file is failing. I have added some perror() to fopen(), perhaps wecan do more during our file path evaluation.
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pi, echarge, boltz, and even initial temperature might be possible. vt is not any standard, there should be no restriction on using it in .param statements (the right hand side being your own definition). The simulation executes as a sequence of events: 1) read the netlist, prepare and flatten it (subcircuit evaluation) 2) parse this intermediate netlist, prepare the matrix 3) run the simulation 4) save and/or plot the data .param evaluation is done during step 1). So changing and evaluating a param...
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pi, echarge, boltz, and even initial temperature might be possible. vt is not any standard, there should be no restriction on using it in .param statements (the right hand side being your own definition). The simulation executes as a sequence of events: 1) read the netlist, prepare and flatten it (subcircuit evaluation) 2) parse this intermediate netlist, prepare the matrix 3) run the simulation 4) save and/or plot the data .param evaluation is done during step 1). So changing and eveluating a param...
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What is the exact ngspice error message?
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Same for me! But searching again for the keyword initial_step in the OpenVAF sources: It is there. So there is some hope to understand what is going on and to find a solution.
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Just checked the *.va device models I have used (translated) so far. There is no @(initial_step) . Then I have scanned the source code cloned from https://github.com/OpenVAF/OpenVAF-Reloaded.git . Again no @(initial_step) . Maybe it is not supported by OpenVAF. Hopefully Arpad is listening. He might give a more concise answer.
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Just checked the *va device models I have used (translated) so far. There is no @(initial_step) . Then I have scanned the source code cloned from https://github.com/OpenVAF/OpenVAF-Reloaded.git . Again no @(initial_step) . Maybe it is not supported by OpenVAF. Hopefully Arpad is listening. He might give a more concise answer.
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My tests are o.k. as well. Let's puit this fix onto pre-master-46 (via ga_dev?).
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Some test cases.
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Not yet. f and h sources fail, as number of terminals returns already 2, and controlling source is 1. If you restrict your recent patch to E, G sources, it might be o.k. No, now k is failing. If I add k to the restriction e, g, k and to the f, h sources when doing the translation, it is o.k. again. Now what about w switches (not to talk about s switches not mentioned here so far)? Do we need to separate translating 'normal' nodes and controlling nodes? I assume yes only for the poly sources, not...
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Not yet. f and h sources fail, as number of terminals returns already 2, and controlling source is 1. If you restrict your recent patch to E, G sources, it might be o.k.
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Not yet. f and h sources fail, as number of terminals returns already 2, and controlling source ar 1. If you restrict your recent patch to E, G sources, it might be o.k.
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I will have a look as well. Your patch is a real cleanup. That's what I like. Unfortunately, when running the 'paranoia' test, I get a lot of error messages Circuit: test opamp Error: too few devs: g12 1 0 62 0 1m line no. 68 from file MCP6041.txt Simulation interrupted due to error! or similar.
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I will have a look as well. Your patch is a real cleanup. That's what I like. Unfortumnately, when running the 'paranoia' test, I get a lot of error messages Circuit: test opamp Error: too few devs: g12 1 0 62 0 1m line no. 68 from file MCP6041.txt Simulation interrupted due to error! or similar.
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I will have a look as well. Your patch is a real cleanup. That's what I like.
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Yes please move on, Giles, that would be great!
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Indeed there is a difference after subcircuit expansion. m.xu1.m.xinv.mp1 xu1.35 xu1.30 xu1.50 xu1.50 xu1.xinv.mpen xu1.xinv.w=30u xu1.xinv.l=0.8u ad=35p as=35p pd=35u ps=30u results when there is the .model MR1 R r=10 definition at top level. m.xu1.m.xinv.mp1 xu1.35 xu1.30 xu1.50 xu1.50 xu1:mpen w=30u l=0.8u ad=35p as=35p pd=35u ps=30u is the result when there in no .model MR1 R r=10. The model is stored as xu1:mpen, which is correct, in both cases. But xu1.xinv.mpen from case 1 will then not be...
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I will have a look. First of all I have made a somewhat simpler example input file: .title vdmos_bug .param tp = 100 .temp {tp} .model nmos vdmos rthjc=1 VG1 g1 0 10 ID1 0 d1 1 M1 d1 g1 0 nmos temp={tp} VG2 g2 0 10 ID2 0 d2 1 *VTJ2 tj2 0 {tp} VTC2 tc2 0 0 ; {tp} M2 d2 g2 0 tj2 tc2 nmos thermal Rcool tc2 amb 1 vamb amb 0 {tp} .control op print d1 d2 print tj2 .endc .end
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Wildcard handling is disabled, not working in ngspice. The command listing e > listfile.txt will save the expanded netlist to a file named listfile.txt. You then may scan the list for the appropriate device and its full name.
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Please see ngspice manual chapter 13.6.4 Foreach - End, e.g.: foreach val -40 -20 0 20 40 echo var is $val end The 'dc' command does not have an option of different step sizes.
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Please see ngspice manual chapter 13.6.4 Foreach - End, e.g.: foreach val -40 -20 0 20 40 echo var is $val end
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Condidering https://ngspice.sourceforge.io/ngspice-control-language-tutorial.html#step, you might try the following: ... while w_act <= stop_w * alterparam wx = $&w_act let m_act = start_m print ' >> Inner loop initialized. Initial m_act:' $&m_act while m_act <= stop_m * alterparam mx = $&m_act let vds_act = start_vdsx print ' >> Inner loop initialized. Initial vds_act:' $&vds_act while vds_act <= stop_vdsx alterparam wx = $&w_act alterparam mx = $&m_act alterparam vdsx = $&vds_act reset save all...
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Can't reproduce your error message. The transistor XM1 D G S B sky130_fd_pr__nfet_01v8 L=0.94 W=3.2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' + ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 which is used in your setup, simulates well. However there is a discrepancy: Your error message deals with a model xdut.xi.xm1:sky130_fd_pr__nfet_01v8__model.23 of the transistor. When I do the simulation...
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What is the channel length you have given to the NMOS transistors?
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I am not aware of any simulator supporting E1 outp outn nc1 nc2 TABLE {V(inp, inn)} = (-5mV, 0) (5mV, 1) PSPICE is using E1 outp outn TABLE {V(inp, inn)} = (-5mV, 0) (5mV, 1) with V(inp, inn) be any suitable function. This is offered by current ngspice-45.2. LTSPICE is using E1 outp outn nc1 nc2 TABLE = (-5mV, 0, 5mV, 1) with nc1, nc2 is the control voltage input. This is currently not supported by ngspice. I will make this available in upcoming ngspice-46.
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I am not aware of any simulator supporting E1 outp outn nc1 nc2 TABLE {V(inp, inn)} = (-5mV, 0) (5mV, 1) PSPICE is using E1 outp outn TABLE {V(inp, inn)} = (-5mV, 0) (5mV, 1) with V(inp, inn) be any suitable function. This is offered by current ngspice-45.2. LTSPICE is using E1 outp outn nc1 nc2 TABLE = (-5mV, 0, 5mV, 1) This is currently not supported by ngspice. I will make this available in upcoming ngspice-46.
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option xspüice is included as standard
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Good suggestion and tried that... My original discovery as in the copied netlist exactly declares the way you suggest. Yet, still does not parse without error (missing symbol) and fails to simulate. From the original report E1 /20 0 /10 0 TABLE {V(/10,0)} = (-5mV, 0) (5mV,1) KiCad appends '/' to the node name
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The netlist is generated in KiCAD
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Thank you Volger Your suggestion does have one drawback. This workaround would require every user to edit every netlist using TABLE after generating the netlist. The particular simulation I am working with has 4 E TABLE source 3 E VALUE and 2 G VALUE sources. Besides E VALUE simulates using 4 nodes following the "symbol" E only the TABLE is broken. I have reached out to Kicad and asked them to look into correcting the parsing of the symbol. However, many different schematic capture programs use a...
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Make problem, unable to find numeric literal operator 'operator"" _e'
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Please allow to configure the whole project with a single target
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Behavioural resistor silently gives incorrect result
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Invalid -version-info (Typo)
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"strict_errorhandling" does not seem to work
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Crash when loading an Infineon model: IR4427S
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Fixes are applies to inpptree.c adding a controlled_exit. Original line numbers are availabler, where possible. ngspice-45.2
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Configure file empty
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No further reply or interest from OP, so close it.
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double free or corruption (out)
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No more crash in ngspice-45.2
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Incorrect simulation results on aarch64
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.fourier does not work in a netlist (ngspice vsn 40)
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Visual Studio configuration: KLU_COMPLEX.lib for console_debug not found
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fixed
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.trans behaviour change due to separate signal source
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Analog delay line (cm_delay) issue
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I have uploaded a fix to the ngspice development git branch pre-master-42.
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Irrelevant "unknown controlling source" error with behavioral inductor
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typo in error message (and internal variables)
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Thanks fixed.
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An unusual phenomenon occurred during the simulation of 1N3491
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Cannot Install Ngspice 44.2
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Adding a Parallel Branch with No Current Flow to the VCC Pin Causes NGspice Simulation Failure
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nonsense circuit
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simulation cannot be completed
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No simulation command is given in the example files.
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NGspice Simulation Failed
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nonsense circuit
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First parameter in OSDI model is zero in LTA and PSA modes
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NGspice crashes with "Fatal error" when netlist contains undefined parameters
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There is no 'graceful' recovery for this user bug. You will have to correct the netlist and restart ngspice.
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DC simulation convergence issue
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Checking the dc command is done in ngspice-45.2
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./tests/bin/check.sh src/ngspice tests/sensitivity/diffpair.cir failure
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code model with filesoruce
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Reading a file by a script may fail in MS Windows buils
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Fixed in pre-master-46.
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