WO2026014096A1 - Semiconductor module - Google Patents

Abstract

This semiconductor module comprises: first and second power semiconductor elements; a lead frame to which a source electrode of the first power semiconductor element is connected and to which a drain electrode of the second power semiconductor element is connected; a substrate unit to which a drain electrode of the first power semiconductor element is connected and to which a source electrode of the second power semiconductor element is connected; and a cooler which dissipates heat of the substrate unit. The lead frame is thermally connected to the substrate unit. The function of the source electrode of the first power semiconductor element differs from the function of the drain electrode of the second power semiconductor element.

Description

Semiconductor Module

This disclosure relates to a semiconductor module.

In recent years, attention has been focused on power functional elements that handle large currents of electricity. Power functional elements generate a large amount of heat due to the magnitude of the current they handle. Therefore, discharging the generated heat from power functional elements is an important issue when handling power functional elements.

Patent Documents 1, 2, and 3 disclose technologies related to cooling power functional elements. Patent Document 1 discloses a semiconductor device with high heat dissipation properties. The semiconductor device in Patent Document 1 has a lead frame connected to a semiconductor element. The lead frame is connected to separate coolers that are electrically insulated from each other. Patent Document 2 discloses a highly reliable semiconductor device that can withstand high temperatures. The semiconductor device in Patent Document 2 has a lead frame connected to electrodes of the semiconductor element. The lead frame is in contact with a coating that covers the circuit surface. Patent Document 3 also discloses a semiconductor device. The semiconductor device in Patent Document 3 has a bus bar connected to a semiconductor element. One end of the bus bar is connected to a connection terminal of the semiconductor element. The other end of the bus bar is connected to a metal layer provided on a substrate.

JP 2013-214549 A JP 2015-115382 A International Publication No. 2017/017901

Semiconductor modules are made up of multiple power functional elements. As output power increases, semiconductor modules are required to have the desired cooling capacity. Semiconductor modules interconnect multiple power functional elements to achieve the desired circuit function. This means that the number of components, such as lead frames for connecting multiple power semiconductors, also increases. As a result, it has been difficult to miniaturize semiconductor modules.

This disclosure describes a semiconductor module that has the desired cooling capacity and allows for miniaturization of electrical circuits.

A semiconductor module according to one embodiment of the present disclosure comprises: a first functional element including a first electrode and a second electrode provided opposite the first electrode; a second functional element including a third electrode and a fourth electrode provided opposite the third electrode; a lead frame to which the first electrode of the first functional element is connected and to which the third electrode of the second functional element is connected; a substrate unit to which the second electrode of the first functional element is connected and to which the fourth electrode of the second functional element is connected; and a heat dissipation unit attached to the substrate unit and dissipates heat generated by the substrate unit. The lead frame is thermally connected to the substrate unit. The function of the first electrode of the first functional element connected to the lead frame differs from the function of the third electrode of the second functional element connected to the lead frame.

In a semiconductor module, heat generated by the first and second functional elements is dissipated from the heat dissipation unit via a substrate unit connected to the first and second functional elements. The lead frames connected to the first and second functional elements are thermally connected to the substrate unit. Therefore, heat generated by the first and second functional elements is transferred to the substrate unit via the lead frames. The heat transferred to the substrate unit is dissipated from the heat dissipation unit connected to the substrate unit. Therefore, heat generated by the functional elements is dissipated by a single heat dissipation unit, achieving the desired cooling capacity with a simple configuration. The function of the first electrode of the first functional element connected to the lead frame is different from the function of the third electrode of the second functional element connected to the lead frame. This arrangement of functional elements makes it possible to form circuit elements that perform the desired functions. As a result, the number of connecting parts required to form the circuit elements can be reduced. Therefore, a semiconductor module can achieve the desired cooling capacity while also miniaturizing electrical circuits.

The above-mentioned semiconductor module may further include a heat transfer stand that thermally connects the lead frame and the substrate unit to each other. With this configuration, the lead frame can be thermally connected to the substrate unit via the heat transfer stand.

In the above-described semiconductor module, the lead frame may include a rear surface to which the first electrode and the third electrode are connected. The heat transfer plate may be in contact with the rear surface of the lead frame. This configuration can promote heat transfer from the lead frame to the substrate unit.

In the above-described semiconductor module, the main surface of the substrate unit may include a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-placement region sandwiched between the first element connection region and the second element connection region, and a second non-placement region not sandwiched between the first element connection region and the second element connection region. The heat transfer stand may be placed in the first non-placement region. With this configuration, the path from the functional element via the heat transfer stand to the heat dissipation unit can be configured as desired.

In the above-described semiconductor module, the main surface of the substrate unit may include a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-placement region sandwiched between the first element connection region and the second element connection region, and a second non-placement region not sandwiched between the first element connection region and the second element connection region. The heat transfer stand may be placed in the second non-placement region. This configuration also allows the path from the functional element via the heat transfer stand to the heat dissipation unit to be configured as desired.

In the above semiconductor module, the first functional element may include a first main surface on which a first electrode is provided. A first additional electrode may further be provided on the first main surface. The lead frame may include a lead frame opening that exposes the first additional electrode. With this configuration, desired circuit elements can be formed even when multiple electrodes that perform different functions are present on the first main surface.

The above-mentioned semiconductor module may constitute an electrical circuit with a predetermined circuit function by electrically connecting the first and second functional elements to each other via a lead frame and a substrate unit. With this configuration, a semiconductor module with a predetermined circuit function can be obtained.

In the above-described semiconductor module, the first functional element may be either a unipolar transistor, bipolar transistor, or diode with a vertical structure, mounted in a conventional manner. The second functional element may be either a unipolar transistor, bipolar transistor, or diode with a vertical structure, mounted in an inverted manner. This semiconductor module also has the desired cooling capacity and can achieve miniaturization of electrical circuits.

In the above-mentioned semiconductor module, a first spacer may be interposed between the first functional element and the lead frame. A second spacer may be interposed between the second functional element and the substrate unit. This semiconductor module also has the desired cooling capacity and can achieve miniaturization of the electrical circuitry.

In the above-described semiconductor module, the first functional element may be one selected from a normally mounted unipolar transistor, a bipolar transistor, and a diode having a vertical structure. The second functional element may be one selected from an inverted mounted unipolar transistor, a bipolar transistor, and a diode having a vertical structure. This semiconductor module also has the desired cooling capacity and can achieve miniaturization of the electrical circuit.

In the above semiconductor module, a first spacer may be interposed between the first functional element and the lead frame. A second spacer may be interposed between the second functional element and the substrate unit. This semiconductor module also has the desired cooling capacity and can achieve miniaturization of the electrical circuitry.

The semiconductor module disclosed herein allows for the miniaturization of electrical circuits with the desired cooling capacity.

FIG. 1 is a cross-sectional view of a semiconductor module according to a first embodiment. FIG. 2 is a diagram showing a circuit configured by the semiconductor module of the first embodiment. FIG. 3 is a plan view of the semiconductor module of the first embodiment. FIG. 4 is a cross-sectional view for explaining the heat dissipation function of the semiconductor module of the first embodiment. FIG. 5 is a cross-sectional view showing a first modification of the semiconductor module according to the first embodiment. FIG. 6 is a cross-sectional view showing a second modification of the semiconductor module according to the first embodiment. FIG. 7 is a cross-sectional view showing a third modification of the semiconductor module according to the first embodiment. FIG. 8 is a cross-sectional view showing a fourth modification of the semiconductor module according to the first embodiment. FIG. 9 is a cross-sectional view showing a fifth modification of the semiconductor module according to the first embodiment. FIG. 10 is a plan view showing a sixth modified example of the semiconductor module according to the first embodiment. FIG. 11 is a plan view showing a seventh modification of the semiconductor module according to the first embodiment. FIG. 12 is a plan view showing an eighth modification of the semiconductor module according to the first embodiment. FIG. 13 is a cross-sectional view of a semiconductor module according to the second embodiment. FIG. 14 is a cross-sectional view showing a modified example of the semiconductor module according to the second embodiment. FIG. 15 is a cross-sectional view of a semiconductor module according to the third embodiment. FIG. 16 is a cross-sectional view showing a modification of the semiconductor module according to the third embodiment. FIG. 17 is a cross-sectional view of a semiconductor module according to the fourth embodiment. FIG. 18 is a cross-sectional view showing a first modification of the semiconductor module according to the fourth embodiment. FIG. 19 is a cross-sectional view showing a second modification of the semiconductor module according to the fourth embodiment. FIG. 20 is a cross-sectional view showing a third modification of the semiconductor module according to the fourth embodiment. FIG. 21 is a diagram showing a circuit configured by the semiconductor module of the fifth embodiment. FIG. 22 is a cross-sectional view of a semiconductor module according to the fifth embodiment. FIG. 23 is a cross-sectional view showing a modification of the semiconductor module according to the fifth embodiment. FIG. 24 is a diagram showing a circuit configured by the semiconductor module of the sixth embodiment. FIG. 25 is a plan view of a semiconductor module according to the sixth embodiment. FIG. 26 is a plan view of a semiconductor module according to the seventh embodiment. FIG. 27 is a plan view of a semiconductor module according to the eighth embodiment. FIG. 28 is a plan view of a semiconductor module according to the ninth embodiment. FIG. 29 is a plan view of a semiconductor module according to the tenth embodiment.

Below, a detailed description of an embodiment of the present invention will be given with reference to the accompanying drawings. In the description of the drawings, identical elements will be given the same reference numerals, and duplicate explanations will be omitted.

[First embodiment]
The semiconductor module 1A shown in FIG. 1 is, for example, a component of an inverter that supplies three-phase AC power to a motor. The semiconductor module 1A has power semiconductor elements 20A and 20B (first functional element and second functional element) as functional elements. The number of functional elements constituting the semiconductor module 1A needs to be at least two, and may be three or more. As will be described later, the semiconductor module 1A may be composed of all functional elements of the same type. The semiconductor module 1A may also be composed of functional elements of different types.

Semiconductor module 1A includes power semiconductor elements 20A and 20B, a substrate unit 3, a lead frame 4, and a cooler 30 (heat dissipation unit). The power semiconductor elements 20A and 20B are arranged on the main substrate surface 3a of the substrate unit 3 so as to form an electrical circuit that performs the desired function.

An example of an electrical circuit that performs the desired function is circuit element 10A shown in FIG. 2. Semiconductor module 1A constitutes circuit element 10A shown in FIG. 2. Circuit element 10A functions as a so-called half-bridge circuit. Circuit element 10A corresponds to one leg of a power conversion circuit. Circuit element 10A has a first terminal P10a, a second terminal P10b, and an output terminal P10s. The first terminal P10a corresponds to element pad 91A, which will be described later. The second terminal P10b corresponds to element pad 91B, which will be described later. The output terminal P10s corresponds to heat transfer pad 90A, which will be described later.

The drain of power semiconductor element 20A is connected to first terminal P10a. The source of power semiconductor element 20A is connected to power semiconductor element 20B and output terminal P10s. The source of power semiconductor element 20B is connected to second terminal P10b. The drain of power semiconductor element 20B is connected to the source of power semiconductor element 20A and output terminal P10s. The operation of circuit element 10A is controlled by voltage signals applied to the gates of power semiconductor elements 20A and 20B.

Referring again to Figure 1, the power semiconductor elements 20A and 20B are connected to each other by a wiring pattern provided on the substrate unit 3. The power semiconductor elements 20A and 20B are also connected to each other by the lead frame 4. The heat generated by the power semiconductor elements 20A and 20B is transferred to the substrate unit 3. The heat transferred to the substrate unit 3 is dissipated to the outside by the cooler 30.

[Functional element]
The power semiconductor elements 20A, 20B receive electrical signals from the outside and perform desired electrical functions. An example of the power semiconductor elements 20A, 20B is a transistor. The power semiconductor elements 20A, 20B shown in FIG. 1 are MOSFETs, which are a combination of a field-effect transistor and a metal oxide semiconductor. A MOSFET controls the current flowing between the source and drain by controlling the voltage between the gate and source. A MOSFET is a switching element. A MOSFET has a gate, a source, and a drain as input/output terminals for electrical signals from the outside. Note that the functional elements that are the power semiconductor elements 20A, 20B may be insulated gate bipolar transistors (IGBTs) or gallium nitride (GaN) devices. Furthermore, the functional elements may be diode elements.

The functional elements that make up semiconductor module 1A have a so-called vertical structure. Elements with a vertical structure have a structure in which current flows between the front and back surfaces of the element. The direction of current flow may be from the front surface to the back surface, or from the back surface to the front surface. The direction of current flow may also be in both directions, from the front surface to the back surface and from the back surface to the front surface.

Each of the power semiconductor elements 20A and 20B has an element principal surface 20a and an element rear surface 20b. The element principal surface 20a is provided with, for example, a source electrode 21S that functions as a source. The element rear surface 20b is provided with, for example, a drain electrode 21D that functions as a drain.

As described above, power semiconductor elements 20A and 20B are the same type of element, but are implemented in different ways. The source electrode 21S (first electrode) of power semiconductor element 20A is connected to the lead frame 4. The drain electrode 21D (second electrode) of power semiconductor element 20A is connected to the substrate unit 3. The source electrode 21S (fourth electrode) of power semiconductor element 20B is connected to the substrate unit 3. The drain electrode 21D (third electrode) of power semiconductor element 20B is connected to the lead frame 4. In the following description, a mounting configuration such as power semiconductor element 20A is referred to as "normal mounting." A mounting configuration such as power semiconductor element 20B is referred to as "inverted mounting." The semiconductor module 1A includes a normally mounted power semiconductor element 20A and an inverted mounted power semiconductor element 20B.

The definitions of "normal mounting" and "inverted mounting" are not limited to those described above. For example, a mounting form such as power semiconductor element 20A could be defined as "inverted mounting," and a mounting form such as power semiconductor element 20B could be defined as "normal mounting."

If the functional element is an electrical component other than a MOSFET, the definition may be appropriate depending on the component configuration. For example, if a unipolar transistor, not limited to a MOSFET, is used as the functional element, a configuration in which the drain electrode is connected to the substrate unit 3 may be defined as "normal implementation," and a configuration in which the source electrode is connected to the substrate unit 3 may be defined as "inverted implementation." If the functional element is a bipolar transistor, including an IGBT, a configuration in which the collector electrode is connected to the substrate unit 3 may be defined as "normal implementation," and a configuration in which the emitter electrode is connected to the substrate unit 3 may be defined as "inverted implementation." If the functional element is a diode, a configuration in which the cathode electrode is connected to the substrate unit 3 may be defined as "normal implementation," and a configuration in which the anode electrode is connected to the substrate unit 3 may be defined as "inverted implementation." Normal implementation and inverted implementation may be combined for different types of elements, not limited to the same type of elements as in this embodiment. For example, power semiconductor element 20A may be replaced with a normally implemented MOSFET, and power semiconductor element 20B may be replaced with an inverted implemented IGBT or diode.

In this way, by combining "normal mounting" and "inverted mounting" to position functional elements, the number of lead frames 4 can be reduced. As a result, the wiring required to configure the semiconductor module 1A can be simplified.

[Board unit]
The substrate unit 3 has a substrate main surface 3a. A plurality of wiring patterns, pads, lands, etc. are provided on the substrate main surface 3a. These are connected by a plurality of power semiconductor elements 20A, 20B, a plurality of lead frames 4, and a plurality of bonding wires to form a circuit element 10A shown in FIG. 2.

Several regions are defined on the substrate main surface 3a. In Figure 3, the substrate main surface 3a is shown to have a first element connection region 20AS, a second element connection region 20BS, and a first non-placement region 3aN1. The first element connection region 20AS and the second element connection region 20BS may be set as appropriate depending on the placement of functional elements determined to configure the circuit elements. A power semiconductor element 20A is placed in the first element connection region 20AS. A power semiconductor element 20B is placed in the second element connection region 20BS.

The first non-placement region 3aN1 is defined as the region sandwiched between the first element connection region 20AS and the second element connection region 20BS. Power semiconductor elements 20A, 20B are not placed in the first non-placement region 3aN1. A heat transfer stand 50A, described below, is placed in the first non-placement region 3aN1. In addition to the first non-placement region 3aN1, a second non-placement region 3aN2 may be set on the substrate main surface 3a as a region where no functional element is placed and where the heat transfer stand 50A is placed. The second non-placement region 3aN2 is defined as the region not sandwiched between the first element connection region 20AS and the second element connection region 20BS. The second non-placement region 3aN2 will be illustrated in the sixth modified example (FIG. 10), seventh modified example (FIG. 11), and eighth modified example (FIG. 12), described below.

The metal layer 31 is the base material of the substrate unit 3. By using the metal layer 31 as the base material of the substrate unit 3, the heat dissipation properties of the substrate unit 3 can be improved. As an example, the metal layer 31 may be a copper plate or an aluminum plate. An insulating layer 32 is provided on the main surface 31a of the metal layer 31. The back surface 32b of the insulating layer 32 is in contact with the main surface 31a of the metal layer 31. The main surface 32a of the insulating layer 32 is the aforementioned substrate main surface 3a. As an example, the material that constitutes the insulating layer 32 may be silicon nitride, aluminum nitride, resin, or the like.

Several metal layers are provided on the substrate main surface 3a. Figure 1 shows two element pads 91A, 91B and one heat transfer pad 90A. Each of these is made of copper, aluminum, or the like. In the example shown in Figure 1, the one heat transfer pad 90A is positioned between the two element pads 91A, 91B.

The drain electrode 21D of the power semiconductor element 20A is connected to the element pad 91A. The source electrode 21S of the power semiconductor element 20B is connected to the element pad 91B. The heat transfer stand 50A, which will be described later, is connected to the heat transfer pad 90A. A gap is provided between the element pad 91A and the heat transfer pad 90A. A gap is also provided between the element pad 91B and the heat transfer pad 90A. The element pads 91A and 91B are not electrically connected to the heat transfer pad 90A. The element pads 91A and 91B are electrically insulated from the heat transfer pad 90A.

The board unit 3 may have a heat spreader 36. The main surface 36a of the heat spreader 36 is in contact with the back surface 31b of the metal layer 31. The back surface 36b of the heat spreader 36 is in contact with the cooler 30. The heat spreader 36 assists in the transfer of heat from the metal layer 31 to the cooler 30. The back surface 36b of the heat spreader 36 is the aforementioned back surface 3b of the board.

[Cooler]
The cooler 30 dissipates heat generated by the power semiconductor elements 20. An example of the cooler 30 is a heat sink provided with a plurality of fins. The cooler 30 may be any other device having a heat dissipation function. The cooler 30 may be a water-cooled device. The main surface 30a of the cooler 30 is in contact with the back surface 36b of the heat spreader 36. The semiconductor module 1A has the cooler 30 only on the back surface 3b side of the board unit 3.

[Lead frame]
The lead frame 4 is connected to the source electrode 21S of the power semiconductor element 20A. The lead frame 4 is also connected to the drain electrode 21D of the power semiconductor element 20B. The power semiconductor elements 20A and 20B receive electrical signals from the outside via the lead frame 4. Therefore, the lead frame 4 is a conductive conductor. The outer shape of the lead frame 4 is a thin plate. The cross-sectional shape of the lead frame 4 is rectangular. The cross-sectional shape of the lead frame 4 has a large width relative to its thickness. Therefore, the lead frame 4 has a larger cross-sectional area than so-called bonding wires, which are thin metal wires. Therefore, it is possible to supply a large current to the source electrode 21S of the power semiconductor element 20A and the drain electrode 21D of the power semiconductor element 20B. The lead frame 4 has an element connection portion 4cA that contacts the power semiconductor element 20A and an element connection portion 4cB that contacts the power semiconductor element 20B. The lead frame 4 has a portion that contacts another functional element, etc. (not shown). Such a lead frame 4 may be formed from a copper plate, an aluminum plate, or the like.

As shown in Figure 3, the lead frame 4 covers a portion of the power semiconductor elements 20A and 20B. Some power semiconductor elements, like the power semiconductor elements 20A and 20B, have multiple electrodes exposed on one surface. In such cases, the lead frame 4 is positioned so that it overlaps only the electrodes that are to be electrically connected. For example, in the example shown in Figure 3, the lead frame 4 overlaps the source electrode 21S of the power semiconductor element 20A. The lead frame 4 does not overlap the gate electrode 21G of the power semiconductor element 20A. The lead frame 4 also does not overlap the Kelvin electrode 21K.

As an example of a configuration in which the lead frame 4 is not connected to the gate electrode 21G, etc., the eighth embodiment and others illustrate a configuration in which an opening (such as lead frame opening 4H1) is provided in the plate-shaped lead frame 4.

The connection configuration of power semiconductor elements 20A and 20B will now be explained further.

A normally mounted power semiconductor element 20A has a source electrode 21S, a gate electrode 21G, and a Kelvin electrode 21K exposed on the element principal surface 20a. The source electrode 21S overlaps the lead frame 4 and is connected to it. The gate electrode 21G and the Kelvin electrode 21K do not overlap the lead frame 4. Therefore, the gate electrode 21G and the Kelvin electrode 21K are not connected to the lead frame 4. A connection element (such as a bonding wire) separate from the lead frame 4 is connected to the gate electrode 21G and the Kelvin electrode 21K. The Kelvin electrode 21K receives a gate voltage via the connection element. A Kelvin terminal may be connected to the Kelvin electrode 21K. This configuration suppresses the influence of the main current on the gate signal applied to the gate electrode 21G. As a result, heat dissipation is ensured and noise resistance is improved.

A normally mounted power semiconductor element 20A includes a drain electrode 21D exposed on the element back surface 20b. The drain electrode 21D is connected to the element pad 91A, which is the P electrode.

The drain electrode 21D of the inverted-mounted power semiconductor element 20B overlaps with the lead frame 4. The drain electrode 21D of the power semiconductor element 20B is connected to the lead frame 4. The source electrode 21S of the inverted-mounted power semiconductor element 20B is connected to the element pad 91B, which is the N electrode. As with the normally-mounted power semiconductor element 20A, the source electrode 21S is connected to the element pad 91B. However, the source electrode 21S, the gate electrode 21G, and the Kelvin electrode 21K do not overlap with the element pad 91B. The source electrode 21S is not connected to the element pad 91B.

Refer to Figure 4. The lead frame 4 is in contact with the power semiconductor elements 20A and 20B. Therefore, the lead frame 4 receives the heat generated by the power semiconductor elements 20A and 20B. For example, the lead frame 4 may be connected to a power semiconductor element other than the power semiconductor elements 20A and 20B shown in the figure. However, because the other power semiconductor element is also a heat source, heat does not transfer from the lead frame 4 to the other power semiconductor element through the part that is in contact with the other power semiconductor element. If the heat transferred to the lead frame 4 does not transfer from the lead frame 4 to another component, the heat remains in the lead frame 4. As a result, the temperature of the lead frame 4 rises. If the temperature of the lead frame 4 rises and becomes equal to the temperature of the power semiconductor elements 20A and 20B, the transfer of heat from the power semiconductor elements 20A and 20B to the lead frame 4 stops. This is because heat transfer is caused by a temperature difference. In this state, the heat generated by the power semiconductor element 20A transfers only from the drain electrode 21D. The heat generated by power semiconductor element 20B will only transfer from source electrode 21S. This may result in the heat generated by power semiconductor elements 20A and 20B not being sufficiently dissipated.

Therefore, in order to continue to maintain heat dissipation via the lead frame 4, a mechanism has been provided to actively transfer heat from the lead frame 4. In the example shown in FIG. 1, the lead frame 4 is connected to the board unit 3 via a heat transfer stand 50A. The heat transfer stand 50A functions to transfer heat from the lead frame 4 to the board unit 3. As a result, heat from the lead frame 4 can be sufficiently dissipated, thereby preventing the temperature of the lead frame 4 from rising. This also ensures a desired temperature difference between the lead frame 4 and the power semiconductor element 20A. As a result, heat dissipation from the power semiconductor element 20A via the source electrode 21S can be maintained. Similarly, a desired temperature difference between the lead frame 4 and the power semiconductor element 20B can be maintained. As a result, heat dissipation from the power semiconductor element 20B via the drain electrode 21D can be maintained.

The semiconductor module 1A of this embodiment has several heat paths as shown in FIG. 4. The first heat path HP1 leads to the cooler 30 via the drain electrode 21D of the power semiconductor element 20A and the substrate unit 3. The second heat path HP2 leads to the cooler 30 via the source electrode 21S of the power semiconductor element 20A and the lead frame 4. The third heat path HP3 leads to the cooler 30 via the source electrode 21S of the power semiconductor element 20B and the substrate unit 3. The fourth heat path HP4 leads to the cooler 30 via the drain electrode 21D of the power semiconductor element 20B and the lead frame 4. Therefore, the power semiconductor elements 20A and 20B have a double-sided cooling configuration in which heat is discharged from both sides. This cooling configuration has better heat dissipation properties than a single-sided cooling configuration. The semiconductor module 1A equipped with the power semiconductor elements 20A and 20B has a single-sided cooling configuration. This configuration allows for a simpler overall configuration of the semiconductor module 1A.

The heat transfer vertical plate 50A is made of a material that easily transfers heat. Examples of materials that can be used to make the heat transfer vertical plate 50A include copper, aluminum, graphite, and heat dissipation sheets. The heat transfer vertical plate 50A has an upper end surface 50a that contacts the lead frame 4 and a lower end surface 50b that contacts the board unit 3. The upper end surface 50a contacts the back surface 4b of the lead frame 4 (the back surface of the lead frame). The upper end surface 50a contacts the upper end connection portion 4d on the back surface 4b of the lead frame 4. From the perspective of ensuring heat transfer, if the upper end surface 50a is made of a metal material such as copper or aluminum, the upper end surface 50a may be fixed to the lead frame 4 by soldering or the like. The lower end surface 50b contacts the heat transfer pad 90A of the board unit 3. The lower end surface 50b of the standing plate contacts the main surface 90a of the heat transfer pad 90A. The lower end surface 50b of the standing plate may also be fixed to the lead frame 4 by soldering or the like. Unlike the lead frame 4, the heat transfer standing plate 50A may or may not be conductive.

As mentioned above, the heat transfer pad 90A, to which the lower end surface 50b of the heat transfer stand 50A is fixed, is electrically insulated from the element pad 91. Therefore, the potential of the heat transfer stand 50A, which is made of a metal material, is the same as the potential of the lead frame 4. However, the potential of the heat transfer stand 50A is different from the potential of the element pad 91.

In the example shown in Figure 1, the heat transfer stand 50A has a wall-like shape. A wall-like shape allows the side surface 50c of the heat transfer stand 50A to function as a heat dissipation surface. The shape of the heat transfer stand 50A is not limited to a wall-like shape. For example, a rectangular pillar or a cylindrical shape may also be used. Figure 1 shows an example in which one heat transfer stand 50A is connected to one lead frame 4. As will be illustrated later, only multiple heat transfer stand plates may be connected to one lead frame 4. This configuration reduces the mechanical constraint points on the lead frame 4. As a result, it is possible to prevent unnecessary stress from acting on the lead frame 4 due to thermal deformation of the elements that make up the semiconductor module 1A.

<Action and effect>
The semiconductor module 1A includes a power semiconductor element 20A including a source electrode 21S and a drain electrode 21D provided at a position opposite the source electrode 21S, a power semiconductor element 20B including a drain electrode 21D and a source electrode 21S provided at a position opposite the drain electrode 21D, a lead frame 4 to which the source electrode 21S of the power semiconductor element 20A is connected and to which the drain electrode 21D of the power semiconductor element 20B is also connected, a substrate unit 3 to which the drain electrode 21D of the power semiconductor element 20A is connected and to which the source electrode 21S of the power semiconductor element 20B is also connected, and a cooler 30 attached to the substrate unit 3 and dissipates heat generated by the substrate unit 3. The lead frame 4 is thermally connected to the substrate unit 3. The function of the source electrode 21S of the power semiconductor element 20A connected to the lead frame 4 is different from the function of the drain electrode 21D of the power semiconductor element 20B connected to the lead frame 4.

In the semiconductor module 1A, heat generated by the power semiconductor elements 20A, 20B is released from the cooler 30 via the board unit 3 connected to the power semiconductor elements 20A, 20B. The lead frame 4 connected to the power semiconductor elements 20A, 20B is thermally connected to the board unit 3. Therefore, the heat generated by the power semiconductor elements 20A, 20B is conducted to the board unit 3 via the lead frame 4, and is then released from the cooler 30 connected to the board unit 3. Therefore, the heat generated by the power semiconductor elements 20A, 20B is discharged by a single cooler 30. As a result, the desired cooling capacity can be achieved with a simple configuration.

When semiconductor module 1A includes multiple functional elements such as power semiconductor elements 20A and 20B, the number of connection elements, such as lead frames 4 and heat transfer stand plates 50A, required to electrically connect the functional elements to each other increases. As the number of connection elements increases, the wiring becomes more complex. Therefore, this semiconductor module 1A reduces the number of connection elements and prevents the wiring from becoming too complicated by using the following configuration.

In the semiconductor module 1A, the source electrode 21S of the power semiconductor element 20A connected to the lead frame 4 has a different function than the drain electrode 21D of the power semiconductor element 20B connected to the lead frame 4. This arrangement of the power semiconductor elements 20A, 20B makes it possible to form a circuit element 10A that performs the desired function. As a result, the number of connecting parts required to form the circuit element 10A can be reduced. Therefore, this semiconductor module 1A has the desired cooling capacity and can achieve miniaturized electrical circuits.

The semiconductor module 1A includes a heat transfer stand 50A that thermally connects the lead frame 4 and the substrate unit 3 to each other. With this configuration, the lead frame 4 can be thermally connected to the substrate unit 3 via the heat transfer stand 50A.

The lead frame 4 includes a back surface 4b to which the source electrode 21S and drain electrode 21D are connected. The heat transfer stand 50A contacts the back surface of the lead frame 4. This configuration promotes heat transfer from the lead frame 4 to the substrate unit 3.

The main surface of the substrate unit 3 includes a first element connection region 20AS to which the power semiconductor element 20A is connected, a second element connection region 20BS to which the power semiconductor element 20B is connected, a first non-arrangement region 3aN1 sandwiched between the first element connection region 20AS and the second element connection region 20BS, and a second non-arrangement region 3aN2 not sandwiched between the first element connection region 20AS and the second element connection region 20BS. The heat transfer stand 50A is disposed in the first non-arrangement region 3aN1. With this configuration, the path from the power semiconductor elements 20A, 20B via the heat transfer stand 50A to the cooler 30 can be configured as desired.

In the semiconductor module 1A, the power semiconductor elements 20A and 20B are electrically connected to each other via the lead frame 4 and the substrate unit 3, thereby forming a circuit element 10A with a predetermined circuit function. This configuration makes it possible to obtain a semiconductor module 1A with a predetermined circuit function.

Below, several variations of the first embodiment are described.

<First Modification of First Embodiment>
5 is a cross-sectional view of a semiconductor module 1Aa according to a first modification of the first embodiment. The substrate unit 3Aa of the semiconductor module 1Aa differs from the substrate unit 3 of the semiconductor module 1A of the first embodiment. The other components of the semiconductor module 1Aa are the same as those of the semiconductor module 1A of the first embodiment. The substrate unit 3Aa includes a metal layer 31, an insulating layer 32, one heat transfer pad 90A, and two element pads 91A and 91B. The substrate unit 3Aa does not include a heat spreader 36. The back surface 31b of the metal layer 31 is the substrate back surface 3b of the substrate unit 3Aa. The back surface 31b of the metal layer 31 contacts the main surface 30a of the cooler 30. A semiconductor module 1Aa including such a substrate unit 3Aa can achieve the same effects as the semiconductor module 1A of the first embodiment.

<Second Modification of First Embodiment>
FIG. 6 is a cross-sectional view of a semiconductor module 1Ab, which is a second modified example of the first embodiment. The substrate unit 3Ab of the semiconductor module 1Ab also differs from the substrate unit 3 of the semiconductor module 1A of the first embodiment. Other components of the semiconductor module 1Ab are the same as those of the semiconductor module 1A of the first embodiment. The substrate unit 3Ab has an insulating layer 32, one heat transfer pad 90A, and two element pads 91A and 91B. The substrate unit 3Ab does not include a metal layer 31 or a heat spreader 36. The back surface 32b of the insulating layer 32 is the substrate back surface 3b of the substrate unit 3Ab. The back surface 32b of the insulating layer 32 contacts the main surface 30a of the cooler 30. The semiconductor module 1Ab including such a substrate unit 3Ab can also achieve the same effects as the semiconductor module 1A of the first embodiment.

<Third Modification of First Embodiment>
FIG. 7 is a cross-sectional view of a semiconductor module 1Ac, a third modification of the first embodiment. In the semiconductor module 1Ac, bonding materials such as solder and sintered materials and thermal interface materials (TIMs) are used as necessary. The bonding materials and TIMs are not shown in FIG. 1. FIG. 7 clearly shows examples of locations where bonding materials 22T1, 22B1, 52T, 52B, 22T2, 22B2, 31B, and TIM 36B are used.

The bonding material 22T1 is provided between the element main surface 20a of the power semiconductor element 20A and the back surface 4b of the lead frame 4. The bonding material 22T1 bonds the power semiconductor element 20A to the lead frame 4. The bonding material 22B1 is provided between the element back surface 20b of the power semiconductor element 20A and the main surface 91a of the element pad 91A. The bonding material 22B1 bonds the power semiconductor element 20A to the element pad 91A. The bonding material 52T is provided between the standing plate upper end surface 50a of the heat transfer standing plate 50A and the back surface 4b of the lead frame 4. The bonding material 52T bonds the heat transfer standing plate 50A to the lead frame 4. The bonding material 52B is provided between the standing plate lower end surface 50b of the heat transfer standing plate 50A and the main surface 90a of the heat transfer pad 90A. The bonding material 52B bonds the heat transfer standing plate 50A to the heat transfer pad 90A. The bonding material 22T2 is provided between the element back surface 20b of the power semiconductor element 20B and the back surface 4b of the lead frame 4. The bonding material 22T2 bonds the power semiconductor element 20B to the lead frame 4. The bonding material 22B2 is provided between the element main surface 20a of the power semiconductor element 20B and the main surface 91a of the element pad 91B. The bonding material 22B2 bonds the power semiconductor element 20B to the element pad 91B. The bonding material 31B is provided between the back surface 31b of the metal layer 31 and the main surface 36a of the heat spreader 36. The bonding material 31B bonds the metal layer 31 to the heat spreader 36. The TIM 38B is provided between the back surface 36b of the heat spreader 36 and the main surface 30a of the cooler 30. The TIM 38B bonds the heat spreader 36 to the cooler 30. Semiconductor module 1Ac with this configuration can also achieve the same effects as semiconductor module 1A of the first embodiment.

<Fourth Modification of First Embodiment>
FIG. 8 is a cross-sectional view of a semiconductor module 1Ad according to a fourth modification of the first embodiment. The semiconductor module 1Ad according to the fourth modification adds a bonding material and a TIM to the semiconductor module 1Aa according to the first modification. The semiconductor module 1Ad according to the fourth modification includes bonding materials 22T1, 22B1, 52T, 52B, 22T2, and 22B2 and a TIM 38B. The bonding materials 22T1, 22B1, 52T, 52B, 22T2, and 22B2 are the same as those in the third modification, and therefore will not be described here. The TIM 38B is provided between the rear surface 31b of the metal layer 31 and the main surface 30a of the cooler 30. The TIM 38B bonds the metal layer 31 to the cooler 30. The semiconductor module 1Ad having such a configuration can also achieve the same effects as the semiconductor module 1A according to the first embodiment.

<Fifth Modification of First Embodiment>
FIG. 9 is a cross-sectional view of a semiconductor module 1Ae according to a fifth modification of the first embodiment. The semiconductor module 1Ae according to the fifth modification adds a bonding material and a TIM to the semiconductor module 1Ab according to the second modification. The semiconductor module 1Ae according to the fifth modification includes bonding materials 22T1, 22B1, 52T, 52B, 22T2, and 22B2 and a TIM 38B. The bonding materials 22T1, 22B1, 52T, 52B, 22T2, and 22B2 are the same as those in the third modification, and therefore will not be described here. The TIM 38B is provided between the back surface 32b of the insulating layer 32 and the main surface 30a of the cooler 30. The TIM 38B bonds the insulating layer 32 to the cooler 30. The semiconductor module 1Ae having such a configuration can also achieve the same effects as the semiconductor module 1A according to the first embodiment.

Sixth Modification of First Embodiment
10 is a plan view of a semiconductor module 1Af according to a sixth modification of the first embodiment. The heat-transfer stand 50B and the heat-transfer pad 90B of the semiconductor module 1Af differ from the heat-transfer stand 50A and the heat-transfer pad 90A of the semiconductor module 1A according to the first embodiment. Specifically, the positions of the heat-transfer stand 50B and the heat-transfer pad 90B on the substrate main surface 3a differ from the positions of the heat-transfer stand 50A and the heat-transfer pad 90A on the substrate main surface 3a.

The substrate main surface 3a includes a first element connection region 20AS, a second element connection region 20BS, a first non-placement region 3aN1, and a second non-placement region 3aN2. A power semiconductor element 20A is connected to the first element connection region 20AS. A power semiconductor element 20B is connected to the second element connection region 20BS. The first non-placement region 3aN1 is sandwiched between the first element connection region 20AS and the second element connection region 20BS. No power semiconductor elements 20A, 20B are placed in the first non-placement region 3aN1. The second non-placement region 3aN2 is not sandwiched between the first element connection region 20AS and the second element connection region 20BS. No power semiconductor elements 20A, 20B are placed in the second non-placement region 3aN2 either.

As shown in FIG. 10, the heat transfer stand 50B and heat transfer pad 90B are provided in the second non-placement area 3aN2. The second non-placement area 3aN2 extends along the direction in which the power semiconductor elements 20A, 20B are aligned. This arrangement allows the distance from the power semiconductor element 20A to the heat transfer stand 50B to be the same as the distance from the power semiconductor element 20B to the heat transfer stand 50B. The position on the heat transfer stand 50B that receives heat from the power semiconductor element 20A can be made different from the position that receives heat from the power semiconductor element 20B. A semiconductor module 1Af having this configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

<Seventh Modification of First Embodiment>
11 is a plan view of a semiconductor module 1Ag according to a seventh modification of the first embodiment. In the semiconductor module 1Ag, the positions of the heat transfer stand 50B and the heat transfer pads 90B are also different from the positions of the heat transfer stand 50A and the heat transfer pads 90A in the first embodiment.

11, the heat transfer stand 50B and the heat transfer pad 90B are provided in the second non-placement area 3aN2. The second non-placement area 3aN2 extends perpendicular to the direction in which the power semiconductor elements 20A, 20B are arranged. With this arrangement, the distance from the power semiconductor element 20A to the heat transfer stand 50A can be made different from the distance from the power semiconductor element 20B to the heat transfer stand 50A. In the example of FIG. 11, the second non-placement area 3aN2, the first element connection area 20AS, the first non-placement area 3aN1, and the second element connection area 20BS are arranged in this order. The second non-placement area 3aN2 is adjacent to the first element connection area 20AS but not adjacent to the second element connection area 20BS. The distance from the power semiconductor element 20A to the heat transfer stand 50B is shorter than the distance from the power semiconductor element 20B to the heat transfer stand 50B. A semiconductor module 1Ag having such a configuration can achieve the same effects as the semiconductor module 1A of the first embodiment.

Eighth Modification of First Embodiment
12 is a plan view of a semiconductor module 1Ah according to an eighth modification of the first embodiment. In the semiconductor module 1Ah, the positions of the heat transfer stand 50B and the heat transfer pads 90B are also different from the positions of the heat transfer stand 50A and the heat transfer pads 90A in the first embodiment.

12, the heat transfer stand 50B and heat transfer pad 90B are provided in the second no-placement area 3aN2. Unlike the seventh modification, the second no-placement area 3aN2 in the eighth modification is adjacent to the second element connection area 20BS. Specifically, in the example of FIG. 12, the first element connection area 20AS, the first no-placement area 3aN1, the second element connection area 20BS, and the second no-placement area 3aN2 are arranged in this order. The second no-placement area 3aN2 is adjacent to the second element connection area 20BS but not to the first element connection area 20AS. The distance from the power semiconductor element 20A to the heat transfer stand 50B is longer than the distance from the power semiconductor element 20B to the heat transfer stand 50B. A semiconductor module 1Ah having such a configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

Second Embodiment
13 is a cross-sectional view of a semiconductor module 1B according to the second embodiment. The lead frame 4B included in the semiconductor module 1B according to the second embodiment is different from the lead frame 4 included in the semiconductor module 1A according to the first embodiment. The other components of the semiconductor module 1B are the same as those of the semiconductor module 1A according to the first embodiment.

The lead frame 4B includes a frame main body 41 and a heat transfer stand 42. The frame main body 41 is connected to the power semiconductor elements 20A and 20B. The frame main body 41 corresponds to the lead frame 4 in the first embodiment. The heat transfer stand 42 extends from the back surface 41b of the frame main body 41 toward the board unit 3. The heat transfer stand 42 corresponds to the heat transfer stand 50A in the first embodiment. In the first embodiment, the lead frame 4 and the heat transfer stand 50A were joined together, but were originally separate components. The lead frame 4B in the second embodiment integrates the lead frame 4 and the heat transfer stand 50A of the first embodiment. This lead frame 4B eliminates the need for assembly work, such as joining the lead frame 4 and the heat transfer stand 50A, and therefore reduces the need for bonding material 52T (see Figure 7, etc.). This improves the heat dissipation of the power semiconductor elements 20A and 20B.

<Modification of the second embodiment>
As illustrated in the third, fourth, and fifth modifications of the first embodiment, the semiconductor module 1B of the second embodiment may also use a bonding material and a TIM. Figure 14 is a cross-sectional view of a semiconductor module 1Ba, a modification of the second embodiment. The semiconductor module 1Ba, a modification of the second embodiment, includes bonding materials 22T1, 22B1, 52B, 22T2, 22B2, 31B, and a TIM 36B in addition to the configuration of the semiconductor module 1B of the second embodiment. In the second embodiment, the frame main body 41 and the heat transfer standing plate 42 are integrated, so there is no bonding material 52T between the lead frame 4 and the heat transfer standing plate 50A. The bonding materials 22T1, 22B1, 52B, 22T2, 22B2, 31B, and the TIM 36B are similar to those in the third modification, and therefore will not be described here.

Third Embodiment
FIG. 15 is a cross-sectional view of a semiconductor module 1C according to a third embodiment. The semiconductor module 1C according to the third embodiment differs from the semiconductor module 1A according to the first embodiment in that it includes spacers 6SA and 6SB. The other components of the semiconductor module 1C are the same as those of the semiconductor module 1A according to the first embodiment. The spacers 6SA and 6SB constitute a current path and a heat dissipation path. Therefore, the spacers 6SA and 6SB are formed from a conductive material. From the perspective of forming a current path and a heat dissipation path, it is desirable that the material forming the spacers 6SA and 6SB have both high electrical conductivity and high thermal conductivity.

The spacer 6SA is disposed between the power semiconductor element 20A and the lead frame 4. If the material of the spacer 6SA is the same as that of the lead frame 4, the spacer 6SA may be integrated with the lead frame 4. The main surface 6Sa of the spacer 6SA contacts the back surface 4b of the lead frame 4. The back surface 6Sb of the spacer 6SA contacts the element main surface 20a of the power semiconductor element 20A. With this arrangement, the distance from the lead frame 4 to the power semiconductor element 20A can be increased. The insulation distance from the lead frame 4 to the power semiconductor element 20A can be increased.

The spacer 6SB is disposed between the power semiconductor element 20B and the element pad 91B. If the material of the spacer 6SB is the same as the material of the element pad 91B, the spacer 6SB may be integrated with the element pad 91B. The main surface 6Sa of the spacer 6SB contacts the element main surface 20a of the power semiconductor element 20B. The back surface 6Sb of the spacer 6SB contacts the main surface 91a of the element pad 91B. With this arrangement, the distance from the element pad 91B to the power semiconductor element 20B can be increased. The insulation distance from the element pad 91B to the power semiconductor element 20B can be increased.

The semiconductor module 1C having this configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

<Modification of the third embodiment>
The semiconductor module 1C of the third embodiment may also use a bonding material and a TIM. FIG. 16 is a cross-sectional view of a semiconductor module 1Ca, which is a modification of the third embodiment. The semiconductor module 1Ca, which is a modification of the third embodiment, further includes bonding materials 22T1, 22M1, 22B1, 52T, 52B, 22T2, 22M2, 22B2, 31B, and a TIM 36B in addition to the configuration of the semiconductor module 1C of the third embodiment. The semiconductor module 1C of the third embodiment includes spacers 6SA and 6SB. The semiconductor module 1C includes a bonding material 22M1 disposed between the spacer 6SA and the power semiconductor element 20A. The semiconductor module 1C includes a bonding material 22M2 disposed between the spacer 6SB and the power semiconductor element 20B. The bonding materials 22T1, 22B1, 52B, 22T2, 22B2, 31B, and the TIM 36B are the same as those in the third modification, and therefore will not be described here. The semiconductor module 1Ca having such a configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

Fourth Embodiment
17 is a cross-sectional view of a semiconductor module 1D according to the fourth embodiment. The semiconductor module 1D according to the fourth embodiment further includes a high-thermal-conductivity component 45 in addition to the components of the semiconductor module 1A according to the first embodiment. The other components of the semiconductor module 1D are the same as those of the semiconductor module 1A according to the first embodiment.

Examples of the high thermal conductivity component 45 include a graphite sheet or a copper composite. The back surface 45b of the high thermal conductivity component 45 formed from such a material is disposed, joined, or adhered to the main surface 4a of the lead frame 4. By providing the high thermal conductivity component 45 on the main surface 4a of the lead frame 4, heat transferred from the power semiconductor elements 20A, 20B to the lead frame 4 is more likely to diffuse over a wider area on the lead frame 4. As a result, heat from the power semiconductor elements 20A, 20B can be dissipated more efficiently. A semiconductor module 1D having such a configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

<First Modification of Fourth Embodiment>
The semiconductor module 1D of the fourth embodiment may also use a bonding material and a TIM. Figure 18 is a cross-sectional view of a semiconductor module 1Da, a first modification of the fourth embodiment. The semiconductor module 1D of the fourth embodiment is configured by adding a high-thermal-conductivity component 45 to the semiconductor module 1A of the first embodiment. Therefore, the semiconductor module 1Da, a first modification of the fourth embodiment, includes bonding materials 22T1, 22B1, 52T, 52B, 22T2, 22B2, 31B, and a TIM 36B, similar to the semiconductor module 1Ac, a third modification of the first embodiment. Since these components are the same as those in the third modification, detailed description thereof will be omitted. The semiconductor module 1Da having such a configuration can also achieve the same effects as the semiconductor module 1A of the first embodiment.

<Second Modification of Fourth Embodiment>
In the semiconductor module 1D of the fourth embodiment, the linear expansion coefficient of the lead frame 4 may differ from the linear expansion coefficient of the high thermal conductive component 45. The difference in linear expansion coefficients generates thermal stress, which may cause deformation of the lead frame 4 and the high thermal conductive component 45. Deformation of the lead frame 4 and the high thermal conductive component 45 may affect the heat dissipation performance of the lead frame 4 and the high thermal conductive component 45. Therefore, as in the semiconductor module 1Db of the second modification of the fourth embodiment shown in FIG. 19 , a member 46 for alleviating thermal stress may be further provided. The member 46 for alleviating thermal stress prevents deformation of the lead frame 4 and the high thermal conductive component 45 due to thermal stress, thereby preventing a decrease in heat dissipation performance.

The thermal stress relief member 46 is provided on the upper surface 45a of the high thermal conductivity component 45. The thermal stress relief member 46 may be, for example, a plate-shaped component made of the same material as the lead frame 4. As long as it can suppress deformation of the lead frame 4 and the high thermal conductivity component 45, the material of the thermal stress relief member 46 may be different from the material of the lead frame 4.

<Third Modification of Fourth Embodiment>
FIG. 20 illustrates a semiconductor module 1Dc according to a third modification of the fourth embodiment, which includes a high-thermal-conductivity component 47 and a thermal stress relief member 46. The high-thermal-conductivity component 45 included in the semiconductor module 1D of the fourth embodiment has isotropic thermal conductivity. In the high-thermal-conductivity component 45, the thermal conductivity in the X-axis direction in a plan view, the thermal conductivity in the Y-axis direction in a plan view, and the thermal conductivity in the thickness direction (Z-axis direction) are consistent. In contrast, the high-thermal-conductivity component 47 included in the semiconductor module 1Dc, which is a third modification of the fourth embodiment, has anisotropic thermal conductivity. In the high-thermal-conductivity component 47, the thermal conductivity in the X-axis direction in a plan view, the thermal conductivity in the Y-axis direction in a plan view, and the thermal conductivity in the thickness direction (Z-axis direction) are not consistent. An example of a material with such anisotropic thermal conductivity is graphite.

The thermal conductivity in the X-axis direction when viewed from above is higher than the thermal conductivity in the Y-axis direction when viewed from above. The X-axis direction can also be defined as the direction from the power semiconductor element 20B toward the heat transfer stand 50A. The high thermal conductivity in the X-axis direction of the high thermal conductive component 47 promotes heat transfer via the thermal path HP6 shown in Figure 20. As a result, heat dissipation is improved. The thermal conductivity in the thickness direction (Z-axis direction) is also higher than the thermal conductivity in the Y-axis direction. The high thermal conductivity in the Z-axis direction of the high thermal conductive component 47 promotes heat transfer via the thermal path HP7 shown in Figure 20. As a result, heat dissipation is further improved.

Fifth Embodiment
In the first to fourth embodiments, the number of functional elements included in the semiconductor modules 1A to 1D is two. As shown in Fig. 22, the fifth embodiment illustrates a semiconductor module 1E that includes four functional elements.

The semiconductor module 1E has two power semiconductor elements 20A, 20B and two diodes 80A, 80B as functional elements. The semiconductor module 1E constitutes a circuit element 10E that functions as a half-bridge circuit shown in FIG. 21. The circuit element 10E is the circuit element 10A of the first embodiment shown in FIG. 2, with two diodes 80A, 80B added. Therefore, the connection configuration of the two power semiconductor elements 20A, 20B is the same as that of the circuit element 10A of the first embodiment, and detailed description will be omitted. The cathode of the diode 80A is connected to the drain of the power semiconductor element 20A. The anode of the diode 80A is connected to the source of the power semiconductor element 20A. The cathode of the diode 80B is connected to the drain of the power semiconductor element 20B. The anode of the diode 80B is connected to the source of the power semiconductor element 20B.

The electrical connection configuration of the semiconductor module 1E illustrated in FIG. 22 is equivalent to that of the circuit element 10E shown in FIG. 21. The principal surface 80a of the diode 80A contacts the principal surface 91a of the element pad 91A. As a result, the cathode electrode 81K of the diode 80A is connected to the drain electrode 21D of the power semiconductor element 20A via the element pad 91A. The back surface 80b of the diode 80A contacts the back surface 4b of the lead frame 4. As a result, the anode electrode 81A of the diode 80A is connected to the source electrode 21S of the power semiconductor element 20A via the lead frame 4. The principal surface 80a of the diode 80B contacts the back surface 4b of the lead frame 4. As a result, the cathode electrode 81K of the diode 80B is connected to the drain electrode 21D of the power semiconductor element 20B via the lead frame 4. The back surface 80b of the diode 80A contacts the principal surface 91a of the element pad 91B. As a result, the anode electrode 81A of the diode 80A is connected to the source electrode 21S of the power semiconductor element 20B via the element pad 91B.

As described above, the semiconductor module 1E of the fifth embodiment can realize a circuit element 10E that functions as a half-bridge circuit. The circuit element 10E that functions as a half-bridge circuit is configured to include two power semiconductor elements 20A, 20B and two diodes 80A, 80B, using a lead frame 4 and two element pads 91A, 91B.

<Modification of the Fifth Embodiment>
The semiconductor module 1E of the fifth embodiment may also use a bonding material and a TIM. FIG. 23 is a cross-sectional view of a semiconductor module 1Ea, which is a modification of the fifth embodiment. The semiconductor module 1Ea, which is a modification of the fifth embodiment, includes bonding materials 22T1, 22B1, 52B, 22T2, 22B2, 31B, and a TIM 36B. The bonding materials 22T1, 22B1, 52B, 22T2, 22B2, 31B, and a TIM 36B are the same as those described above, and therefore their description will be omitted. The semiconductor module 1Ea includes bonding materials 82T1, 82B1, 82T2, and 82B2. The bonding material 82T1 is disposed between the diode 80A and the lead frame 4. The bonding material 82T1 bonds the diode 80A to the lead frame 4. The bonding material 82B1 is disposed between the diode 80A and the element pad 91A. The bonding material 82B1 bonds the diode 80A to the element pad 91A. The bonding material 82T2 is disposed between the diode 80B and the lead frame 4. The bonding material 82T2 bonds the diode 80B to the lead frame 4. The bonding material 82B2 is disposed between the diode 80B and the element pad 91B. The bonding material 82B2 bonds the diode 80B to the element pad 91B.

Sixth Embodiment
It is also possible to configure a more complex circuit as shown in Figure 24. The circuit element 10F shown in Figure 24 is part of a three-level inverter circuit of the neutral point clamped type (NPC type).

Circuit element 10F has a first terminal P11a, a neutral terminal P11c, a second terminal P11b, and an output terminal P11s. Circuit element 10F has six power semiconductor elements 20A1, 20A2, 20A3, 20B1, 20B2, and 20B3. The drain of power semiconductor element 20A1 is connected to the first terminal P11a. The source of power semiconductor element 20A1 is connected to the drain of power semiconductor element 20B2 and the drain of power semiconductor element 20B3. The source of power semiconductor element 20B3 is connected to the neutral terminal P11c and the drain of power semiconductor element 20A3. The source of power semiconductor element 20B2 is connected to the output terminal P11s and the drain of power semiconductor element 20A2. The source of power semiconductor element 20B1 is connected to the second terminal P11b. The drain of power semiconductor element 20B1 is connected to the source of power semiconductor element 20A3 and the source of power semiconductor element 20A2.

The circuit element 10F shown in FIG. 24 is realized by the semiconductor module 1F shown in FIG. 25. The semiconductor module 1F includes the six power semiconductor elements 20A1, 20A2, 20A3, 20B1, 20B2, and 20B3 described above. The semiconductor module 1F also includes four element pads 91A, 91B, 92, and 93, and two lead frames 4F1 and 4F2.

The element pad 91A corresponds to the first terminal P11a of the circuit element 10F. A power semiconductor element 20A1 is disposed on the element pad 91A. The drain electrode 21D of the power semiconductor element 20A1 is connected to the element pad 91A. The element pad 91B corresponds to the second terminal P11b of the circuit element 10F. A power semiconductor element 20B1 is disposed on the element pad 91B. The source electrode 21S of the power semiconductor element 20B1 is connected to the element pad 91B.

The element pad 92 corresponds to the neutral terminal P11c in the circuit element 10F. Power semiconductor elements 20B3 and 20A3 are arranged on the element pad 92. The source electrode 21S of power semiconductor element 20B3 and the drain electrode 21D of power semiconductor element 20A3 are connected to the element pad 92. The element pad 92 corresponds to the line 92L that interconnects the power semiconductor elements 20B3 and 20A3 in the circuit element 10F. The element pad 93 corresponds to the output terminal P11s in the circuit element 10F. Power semiconductor elements 20B2 and 20A2 are arranged on the element pad 93. The source electrode 21S of power semiconductor element 20B2 and the drain electrode 21D of power semiconductor element 20A2 are connected to the element pad 93. The element pad 93 corresponds to the line 93L that interconnects the power semiconductor elements 20B2 and 20A2 in the circuit element 10F.

Lead frame 4F1 is arranged so as to overlap element pads 91A, 92, and 93 in plan view. Lead frame 4F1 is arranged on top of power semiconductor elements 20A1, 20B2, and 20B3. Lead frame 4F1 is connected to source electrode 21S of power semiconductor element 20A1, drain electrode 21D of power semiconductor element 20B2, and drain electrode 21D of power semiconductor element 20B3. Lead frame 4F1 corresponds to line 4L1 that interconnects power semiconductor elements 20A1, 20B2, and 20B3 in circuit element 10F.

Lead frame 4F2 is arranged so as to overlap element pads 91B, 92, and 93 in plan view. Lead frame 4F2 is arranged on top of power semiconductor elements 20B1, 20A2, and 20A3. Lead frame 4F2 is connected to drain electrode 21D of power semiconductor element 20B1, source electrode 21S of power semiconductor element 20A2, and source electrode 21S of power semiconductor element 20A3. Lead frame 4F2 corresponds to line 4L2 that interconnects power semiconductor elements 20B1, 20A2, and 20A3 in circuit element 10F.

A heat transfer pad 90A1 is provided between element pad 91A and element pad 92. The heat transfer pad 90A1 includes a portion sandwiched between element pad 91A and element pad 92 and a portion adjacent to element pad 93. The heat transfer pad 90A1 is provided across the first non-placement area 3aN1 and the second non-placement area 3aN2. Therefore, the heat transfer stand 50A1 arranged on the heat transfer pad 90A1 includes a portion arranged in the first non-placement area 3aN1 and a portion arranged in the second non-placement area 3aN2. A heat transfer stand 50A1 is arranged on the heat transfer pad 90A1. The heat transfer stand 50A1 is connected to the lead frame 4F1. The portion of the heat transfer stand 50A1 arranged in the first non-placement area 3aN1 can dissipate heat from the power semiconductor elements 20A1, 20B3. The portion of the heat transfer vertical plate 50A1 located in the second non-placement area 3aN2 can dissipate heat from the power semiconductor element 20B2.

A heat transfer pad 90A2 is provided between element pad 91B and element pad 92. The heat transfer pad 90A2 includes a portion sandwiched between element pad 91B and element pad 92 and a portion adjacent to element pad 93. The heat transfer pad 90A2 is also provided across the first non-placement area 3aN1 and the second non-placement area 3aN2. Therefore, the heat transfer stand 50A2 arranged on the heat transfer pad 90A2 includes a portion arranged in the first non-placement area 3aN1 and a portion arranged in the second non-placement area 3aN2. A heat transfer stand 50A2 is arranged on the heat transfer pad 90A2. The heat transfer stand 50A2 is connected to the lead frame 4F2. The portion of the heat transfer stand 50A2 arranged in the first non-placement area 3aN1 can dissipate heat from the power semiconductor elements 20B1 and 20A3. The portion of the heat transfer vertical plate 50A2 located in the second non-placement area 3aN2 can dissipate heat from the power semiconductor element 20A2.

In the semiconductor module 1F of the sixth embodiment, the line 92L constituting the circuit element 10F is realized by an element pad 92, the line 93L is realized by an element pad 93, the line 4L1 is realized by a lead frame 4F1, and the line 4L2 is realized by a lead frame 4F2. Therefore, the semiconductor module 1F of the sixth embodiment can also achieve the desired cooling capacity with a simple configuration.

Seventh Embodiment
A semiconductor module 1G according to the seventh embodiment shown in FIG. 26 includes eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4.

Normally mounted power semiconductor elements 20A1, 20A2, 20A3, and 20A4 are arranged on element pad 91A. Element pad 91A connects the drain electrodes 21D of power semiconductor elements 20A1, 20A2, 20A3, and 20A4 in parallel. Therefore, element pad 91A functions as a P electrode.

The inverted-mounted power semiconductor elements 20B1, 20B2, 20B3, and 20B4 are placed on element pad 91B. Element pad 91B connects the source electrodes 21S of each of the power semiconductor elements 20B1, 20B2, 20B3, and 20B4 in parallel. Therefore, element pad 91B functions as an N electrode.

Lead frame 4G is arranged so as to overlap eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4. Lead frame 4G connects the source electrodes 21S of each of power semiconductor elements 20A1, 20A2, 20A3, and 20A4 in parallel with the drain electrodes 21D of each of power semiconductor elements 20B1, 20B2, 20B3, and 20B4. Therefore, lead frame 4G functions as an output electrode.

A first non-placement area 3aN1 is provided between element pad 91A and element pad 91B. A heat transfer stand 50A is arranged in first non-placement area 3aN1. With this configuration, heat transfer stand 50A is adjacent to each of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4. Therefore, heat can be dissipated from each of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4.

Eighth Embodiment
The semiconductor module 1H of the eighth embodiment shown in Figure 27 also includes eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4. The eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4 are connected by element pads 91A and 91B and a lead frame 4H. In terms of electrical connection, the connection configuration of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4 in the eighth embodiment is the same as that in the seventh embodiment. Therefore, detailed description of this point will be omitted.

In the eighth embodiment, the first non-placement area 3aN1 is not simply sandwiched between the element pads 91A and 91B; a pair of short sides of the first non-placement area 3aN1 are also sandwiched between the extensions 91Aa of the element pad 91A. All four sides of the rectangular first non-placement area 3aN1 are adjacent to either the element pads 91A or 91B. Therefore, when viewed in plan, the heat transfer vertical plate 50A placed in the first non-placement area 3aN1 is also surrounded by the element pads 91A and 91B.

The lead frame 4H of the eighth embodiment covers the entire surface of the power semiconductor element 20A1, etc. The lead frame 4H is also connected to the gate electrode 21G of the power semiconductor element 20A1, etc. The lead frame 4H includes lead frame openings 4H1, 4H2, 4H3, and 4H4 for exposing the gate electrode 21G and Kelvin electrode 21K. The lead frame openings 4H1, 4H2, 4H3, and 4H4 prevent the gate electrode 21G and Kelvin electrode 21K from coming into contact with the plate-shaped lead frame 4H. Therefore, the gate electrode 21G and Kelvin electrode 21K are not electrically connected to the lead frame 4H.

In the semiconductor module 1H, the power semiconductor element 20A includes an element main surface 20a on which a source electrode 21S is provided. A gate electrode 21G (first additional electrode) is further provided on the element main surface 20a. The lead frame 4H includes lead frame openings 4H1, 4H2, 4H3, and 4H4 that expose the gate electrode 21G. Even if the element main surface 20a of the power semiconductor element 20A has multiple electrodes that perform different functions, it is possible to form a desired electrical circuit.

Even with this configuration, heat can be dissipated from each of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4.

Ninth Embodiment
28 also includes eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4. In terms of electrical connection, the connection configuration of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4 in the eighth embodiment is the same as that in the seventh embodiment.

The semiconductor module 1K of the ninth embodiment has two heat transfer stand plates 50A1 and 50A2 arranged in the first non-placement area 3aN1 sandwiched between element pads 91A and 91B. The heat transfer stand plate 50A1 is adjacent to the power semiconductor elements 20A1, 20A2, 20B1, and 20B2. The heat transfer stand plate 50A2 is adjacent to the power semiconductor elements 20A3, 20A4, 20B3, and 20B4. The heat transfer stand plates 50A1 and 50A2 of the eighth embodiment are formed by dividing the heat transfer stand plate 50A of the seventh embodiment into two pieces longitudinally. The divided heat transfer stand plates 50A1 and 50A2 make it easier to fix each of the heat transfer stand plates 50A1 and 50A2 to the board unit 3.

The semiconductor module 1K of the ninth embodiment has multiple heat transfer standing plates 50B1, 50B2, 50B3, 50B4, 50B5, and 50B6 provided in the second non-placement area 3aN2 that is not surrounded by the element pads 91A and 91B. The heat transfer standing plates 50B1 and 50B2 are adjacent to the element pad 91A along the longitudinal direction of the element pad 91A. The heat transfer standing plates 50B3 and 50B4 are adjacent to the element pad 91B along the longitudinal direction of the element pad 91B. The heat transfer standing plate 50B5 is adjacent to the element pad 91A along the lateral direction of the element pad 91A. The heat transfer standing plate 50B6 is adjacent to the element pad 91B along the lateral direction of the element pad 91B.

Even with this configuration, heat can be dissipated from each of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4.

Tenth Embodiment
The semiconductor module 1P of the tenth embodiment shown in Figure 29 also includes eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4. In terms of electrical connection, the connection configuration of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4 in the eighth embodiment is the same as that in the seventh embodiment. The semiconductor module 1P of the tenth embodiment also includes two heat transfer vertical plates 50A1 and 50A2 arranged in the first non-placement area 3aN1. The semiconductor module 1P of the tenth embodiment includes six heat transfer vertical plates 50B1, 50B2, 50B3, 50B4, 50B5, and 50B6 surrounding the element pad 91A, which is U-shaped in plan view. Even with this configuration, heat can be dissipated from each of the eight power semiconductor elements 20A1, 20A2, 20A3, 20A4, 20B1, 20B2, 20B3, and 20B4.

The semiconductor module disclosed herein is not limited to the first to tenth embodiments and their modifications described above, and various modifications are possible without departing from the spirit of the present invention.

For example, examples of combinations of the first and second functional elements and combinations of mounting forms are as follows.
First configuration: A unipolar transistor having a vertical structure as a first functional element is normally mounted, and a unipolar transistor having a vertical structure as a second functional element is invertedly mounted.
Second configuration: A unipolar transistor having a vertical structure as the first functional element is normally mounted, and a bipolar transistor as the second functional element is invertedly mounted.
Third configuration: A unipolar transistor having a vertical structure as the first functional element is normally mounted, and a diode as the second functional element is inverted mounted.
Fourth configuration: A bipolar transistor as a first functional element is normally mounted, and a unipolar transistor having a vertical structure as a second functional element is invertedly mounted.
Fifth configuration: The bipolar transistor serving as the first functional element is normally mounted, and the bipolar transistor serving as the second functional element is inverted mounted.
Sixth configuration: A bipolar transistor as a first functional element is normally mounted, and a diode as a second functional element is inverted mounted.
Seventh configuration: A diode as the first functional element is normally mounted, and a unipolar transistor having a vertical structure as the second functional element is invertedly mounted.
Eighth configuration: A diode as a first functional element is normally mounted, and a bipolar transistor as a second functional element is inverted mounted.
Ninth configuration: The diode as the first functional element is normally mounted, and the diode as the second functional element is inverted mounted.

[Note]
The present disclosure includes the following contents.

The present disclosure provides a first functional element including: [1] a first electrode and a second electrode provided at a position opposite to the first electrode;
a second functional element including a third electrode and a fourth electrode provided at a position opposite to the third electrode;
a lead frame to which the first electrode of the first functional element and the third electrode of the second functional element are connected;
a substrate unit to which the second electrode of the first functional element and the fourth electrode of the second functional element are connected;
a heat dissipation unit attached to the board unit to dissipate heat generated by the board unit,
the lead frame is thermally connected to the substrate unit;
The function of the first electrode of the first functional element connected to the lead frame is
A semiconductor module having a function different from that of the third electrode of the second functional element connected to the lead frame.

The present disclosure is [2] "the semiconductor module described in [1] above, further comprising a heat transfer stand that thermally connects the lead frame and the substrate unit to each other."

The present disclosure states, [3] "the lead frame includes a rear surface to which the first electrode and the third electrode are connected,
The semiconductor module according to the above [2], wherein the heat transfer stand is in contact with the rear surface of the lead frame.

The present disclosure provides a method for manufacturing a substrate unit, comprising: [4] "a main surface of the substrate unit including a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-arrangement region sandwiched between the first element connection region and the second element connection region, and a second non-arrangement region not sandwiched between the first element connection region and the second element connection region;
The semiconductor module according to the above [2] or [3], wherein the heat transfer standing plate is arranged in the first non-arrangement area.

The present disclosure further provides [5] "the main surface of the substrate unit includes a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-arrangement region sandwiched between the first element connection region and the second element connection region, and a second non-arrangement region not sandwiched between the first element connection region and the second element connection region,
The semiconductor module according to the above [2] or [3], wherein the heat transfer standing plate is arranged in the second non-arrangement area.

The present disclosure further provides a method for manufacturing a semiconductor device, comprising: [6] "the first functional element including a first main surface on which the first electrode is provided;
a first additional electrode is further provided on the first major surface;
The semiconductor module according to any one of the above [1] to [5], wherein the lead frame includes a lead frame opening that exposes the first additional electrode.

The present disclosure is [7] "a semiconductor module according to any one of [1] to [6] above, in which the first functional element and the second functional element are electrically connected to each other by the lead frame and the substrate unit, thereby forming an electric circuit having a predetermined circuit function."

The present disclosure states that [8] "the first functional element is one selected from a unipolar transistor, a bipolar transistor, and a diode having a vertical structure, which are normally implemented;
The semiconductor module according to the above [1], wherein the second functional element is one selected from a unipolar transistor, a bipolar transistor, and a diode, which are invertedly mounted and have a vertical structure.

The present disclosure provides a method for manufacturing a semiconductor device including the steps of: [9] "a first spacer is interposed between the first functional element and the lead frame;
The semiconductor module according to the above item [8], wherein a second spacer is interposed between the second functional element and the substrate unit.

1A, 1Aa, 1Ab, 1Ac, 1Ad, 1Ae, 1Af, 1Ag, 1Ah, 1B, 1Ba, 1C, 1Ca, 1D, 1Da, 1E, 1Ea, 1F, 1G, 1H, 1K, 1P Semiconductor modules 10A, 10E, 10F Circuit elements 20A, 20A1, 20A2, 20A3, 20A4 Power semiconductor element (first functional element)
20B, 20B1, 20B2, 20B Power semiconductor element (second functional element)
20AS: First element connection region 20BS: Second element connection region 21D: Drain electrode (second electrode, third electrode)
21G gate electrode (first additional electrode)
21K Kelvin electrode 21S Source electrode (first electrode, fourth electrode)
3 Board unit 3aN1 First non-placement area 3aN2 Second non-placement area 30 Cooler, cooler (heat dissipation unit)
31 Metal layer 32 Insulating layer 4, 4B, 4F1, 4F2, 4G Lead frame 4H1, 4H2, 4H3, 4H4 Lead frame opening 50A, 50A1, 50A2 Heat transfer standing plate 50B, 50B1, 50B2 Heat transfer standing plate 80A, 80B Diode (functional element)
81A Anode electrode 81K Cathode electrode

Claims (9)

a first functional element including a first electrode and a second electrode provided at a position opposite to the first electrode;
a second functional element including a third electrode and a fourth electrode provided at a position opposite to the third electrode;
a lead frame to which the first electrode of the first functional element and the third electrode of the second functional element are connected;
a substrate unit to which the second electrode of the first functional element and the fourth electrode of the second functional element are connected;
a heat dissipation unit attached to the board unit to dissipate heat generated by the board unit,
the lead frame is thermally connected to the substrate unit;
The function of the first electrode of the first functional element connected to the lead frame is
A semiconductor module having a function different from that of the third electrode of the second functional element connected to the lead frame. The semiconductor module of claim 1, further comprising a heat transfer stand that thermally connects the lead frame and the substrate unit to each other. the lead frame includes a rear surface to which the first electrode and the third electrode are connected,
3. The semiconductor module according to claim 2, wherein the heat transfer stand is in contact with a rear surface of the lead frame. a main surface of the substrate unit includes a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-arrangement region sandwiched between the first element connection region and the second element connection region, and a second non-arrangement region not sandwiched between the first element connection region and the second element connection region;
The semiconductor module according to claim 2 , wherein the heat transfer vertical plate is arranged in the first non-arrangement area. a main surface of the substrate unit includes a first element connection region to which the first functional element is connected, a second element connection region to which the second functional element is connected, a first non-arrangement region sandwiched between the first element connection region and the second element connection region, and a second non-arrangement region not sandwiched between the first element connection region and the second element connection region;
The semiconductor module according to claim 2 , wherein the heat transfer vertical plate is arranged in the second non-arrangement area. the first functional element includes a first main surface on which the first electrode is provided,
a first additional electrode is further provided on the first major surface;
The semiconductor module according to claim 1 , wherein the lead frame includes a lead frame opening that exposes the first additional electrode. The semiconductor module of claim 1, wherein the first functional element and the second functional element are electrically connected to each other by the lead frame and the substrate unit, thereby forming an electrical circuit having a predetermined circuit function. the first functional element is one selected from a unipolar transistor, a bipolar transistor, and a diode having a vertical structure, which are normally implemented;
2. The semiconductor module according to claim 1, wherein the second functional element is one selected from the group consisting of a unipolar transistor, a bipolar transistor, and a diode, which are inverted and have a vertical structure. a first spacer is interposed between the first functional element and the lead frame;
9. The semiconductor module according to claim 8, wherein a second spacer is interposed between the second functional element and the substrate unit.