WO2026012899A1 - Method for determining a mapping of a logic quantum circuit onto a qubit arrangement by means of a symbolic solver, system and method for operating a quantum computer - Google Patents

Abstract

The invention relates to a method (100) for determining a mapping of a logical quantum circuit (101) onto a qubit arrangement comprising a number of physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) by means of a symbolic solver, wherein an initial assignment of at least one of the variables of the symbolic solver is carried out  in compliance with the boundary conditions,  in compliance with conflict constraints and  in compliance with the initial constraints of the physical qubits, provided that the initial constraints of the physical qubits are compatible with the boundary conditions and conflict constraints.

Description

Description

Title

Method for determining a mapping of a logical system

quantum circuit to a qubit arrangement by means of a

Solver, system and procedure for operating a quantizer

State of the art

In “On the Qubit Routing Problem”, (Cowtan et al., arXiv:1902.08091 v2, 2019) the mapping problem of logical qubits to a physical qubit platform with limited connectivity is described.

In “Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices” (Li et al.; ASPLOS’19, April 13-17, 2019, Providence, RI, USA) an approach to solving a qubit mapping problem is described, which includes a heuristic search.

Core and advantages of the invention

When mapping a logic quantum circuit onto a real physical quantum computer platform (hereinafter referred to as quantum computer), each logic qubit (quantum bit) of the quantum circuit is assigned a physical qubit of the real quantum computer platform.

Currently, for example, noisy intermediate-scale quantum computers (NISQ) without error correction and with a moderate number of qubits (-100) are available. An NISQ computer typically comprises a small number of qubits, for example, less than or equal to 1000 qubits, especially between 50 and a few hundred qubits. Many currently available quantum computers, in particular NISQ computers have only limited connectivity between physical qubits; that is, not every physical qubit can interact with every other physical qubit. In other words, quantum operations, especially 2-qubit gates, can only be performed between specific physical qubits.

To ensure the correct execution of the logic quantum circuit, it is therefore essential to note that if two logic qubits are to interact with each other, i.e., be part of a common quantum operation (e.g., a 2-qubit gate), they must also reside on physical qubits capable of interaction. If, during the execution of a quantum circuit, after an initial mapping of the logic qubits, it becomes apparent that an interaction between two logic qubits is required that are not currently located on interacting physical qubits, the states of these physical qubits can be swapped through one or more SWAP operations until an interaction between the logic qubits is possible on the physical platform.

The qubits of a real physical quantum computing platform often differ in their quality, particularly with respect to their noise susceptibility. In other words, the qubit array of a real physical quantum computing platform includes, for example, physical qubits with varying fidelities. Specifically, a threshold can be set to indicate which fidelities are still tolerable for quantum circuit execution and to identify low-fidelity physical qubits that should preferably be avoided when executing the quantum circuit.

The invention comprises an improved solution to the problem of mapping quantum logic circuits onto quantum computers with limited connectivity, in particular NISQ computers. Specifically, the invention enables the implementation of quantum logic circuits on quantum computers with limited connectivity, thereby improving the quality of the qubits. to take this into account in such a way as to enable the generation of less error-prone results on the quantum computer.

The invention relates to a method for determining a mapping of a logic quantum circuit onto a qubit arrangement using a symbolic solver, a system comprising a classical computer and a quantum computer, a computer program product and a method for operating a quantum computer.

Algorithms and applications that utilize quantum mechanical resources can be written simply and efficiently in the language of quantum logic circuits. A quantum circuit is a computational routine built from coherent quantum operations. Each horizontal line or wire in a quantum circuit represents a qubit, with the left end of the wire representing the original quantum data and the right end the final quantum data produced by the quantum circuit's computation. Operations on qubits are represented by boxes placed on these wires. Quantum gates are the elementary operations that a quantum computer can perform on its qubits. They are similar to electronic gates, which perform the elementary operations of a classical computer. However, a quantum gate operates with quantum mechanical systems such as spin.

Quantum operations are mathematically realized through matrix multiplication with unitary matrices. Unitary matrices are always reversible, meaning that the input values of a circuit can be reconstructed from its output values. For quantum gates operating on two qubits (2-qubit gates), an interaction between the physical qubits in question is required. For spin qubits, this can occur, among other things, via exchange interactions. Atoms in an ion trap, for example, can exchange photons. For qubits based on superconducting circuits, these qubits can be manipulated, for example, by applying a voltage, a magnetic field, or coupling to microwave resonators. Quantum computers programmed using quantum circuits can, in principle, be constructed from any quantum technology capable of performing single- and multi-qubit gate operations. Currently, architectures based on, for example, superconducting circuits, ion traps, semiconductor quantum dots, photons, and neutral atoms are actively being developed. A quantum computer comprises a qubit array, which includes multiple physical qubits. These qubits can preferably be equipped with devices or units adapted to the technology used to implement them for initializing (e.g., initializing the qubit in a basic state), manipulating (e.g., applying 1-qubit and/or 2-qubit gates), and/or reading the physical qubits.

There are exact methods/solution approaches that can guarantee or prove the optimality of a solution to the mapping problem. For example, there are approaches based on a pseudo-Boolean satisfiability solver (PB-SAT solver) and an answer set solver from the domain of answer set programming (ASP).

An advantage of the invention with the features of the independent claims is that an improved solution for reducing or avoiding errors caused by noise or noisy physical qubits in the execution of quantum algorithms on quantum computers can be provided.

The present method makes it possible to execute logic quantum circuits on quantum computers with limited connectivity, taking into account the heterogeneous noise susceptibility of physical qubits. The method thus enables the use of hardware that was previously unusable or only applicable to a very limited extent.

This is achieved by a method according to claim 1 for determining a mapping of a logic quantum circuit onto a qubit array comprising a number of physical qubits, using a symbolic solver. A symbolic solver is a computer program that performs a A satisfiability or optimization problem, formulated in a suitable modeling language (e.g., Boolean variables and propositional logic formulas), is solved (optimally) or proves that no valid solution exists. The mapping of the logic quantum circuit onto the qubit arrangement includes, in particular, an initial mapping of the logic quantum circuit onto the qubit arrangement and an executable quantum circuit.

The executable quantum circuit takes into account the varying qualities of the physical qubits, as well as the limited connectivity of the physical qubits in the hardware (qubit array of the quantum computer), for example, by introducing swap operations (swap gates). This connectivity of the physical qubits is represented by a hardware-specific connectivity graph. In particular, the executable quantum circuit depicts the operations for the individual physical qubits (specifically, each horizontal line corresponds to a physical qubit, and in the logic quantum circuit, each horizontal line is preferably assigned to a logical qubit), whereas the logic quantum circuit depicts the operations for the individual logical qubits.

The method according to claim 1 comprises the following steps:

• Providing input data, including:

- a hardware-specific connectivity graph of the physical qubits, the quantum logic circuit, and initial constraints of the physical qubits. The connectivity graph includes, in particular, information about the number of physical qubits and their connectivity. In other words, the connectivity graph includes information about which physical qubits can interact with which other physical qubits. Providing the hardware-specific connectivity graph of the physical qubits, the quantum logic circuit, and/or the initial constraints can be done, in particular, by input, by data transmission (wireless or wired data transmission), or by retrieval, for example, from a database, an internal and/or external storage device (cloud) of the device executing the procedure (e.g., a classical computer). By providing the hardware-specific connectivity graph of the physical qubits, the The logic quantum circuit and the initial constraints provide, in particular, the information required for the procedure regarding the physical qubits, their connectivity, and the quantum operations to be applied. Specifically, the physical qubits are represented as nodes in the hardware-specific connectivity graph, and nodes of physical qubits configured to interact with each other are connected in the hardware-specific connectivity graph, especially by edges.

Initial constraints can include information about which physical qubits should be preferentially used or preferably left unused during the execution of the quantum circuit. This information can be obtained, for example, by running a test routine on the quantum computer that characterizes each physical qubit. The result of the test routine can be used to create the initial constraints. The resulting characterization can, for example, be sorted according to preferred criteria/metrics. In particular, initial constraints do not completely exclude any physical qubits from the selection of an executable quantum circuit from the logical quantum circuit; rather, they serve to avoid or at least reduce, where possible, the use of physical qubits with less favorable properties (e.g., qubits with higher noise levels than other physical qubits in the qubit array). In particular, the initial constraints make it possible to promote the use of less noisy qubits, so that when executing the quantum circuit, the susceptibility to errors can be reduced compared to using all physical qubits regardless of their noise behavior.

• Create a task to map the logic quantum circuit to the qubit array in a modeling language of the symbolic solver. In particular, symbolic variables (hereinafter also referred to simply as variables), which preferably encode an assignment of the physical qubits, and symbolic expressions, depending on the symbolic variables, are defined. Specifically, the task includes at least one propositional logic formula that takes the input data into account. It then seeks to assign the values of the qubits to the at least one propositional logic formula. The variables involved are evaluated with the values true or false, so that the propositional logic formula evaluates to true. A propositional logic formula consists of variables, parentheses, and the propositional logic connectives conjunction ("and," often notated with A), disjunction ("or," v), and negation ("not," ^-1 ). Specifically, the creation of the task can be achieved by providing it in the modeling language of the symbolic solver, particularly through input, data transmission, etc. Specifically, a user can transfer the task into the modeling language of the symbolic solver and make it available for the process.

The task formulation further involves creating boundary conditions based on the hardware-specific connectivity graph and the quantum logic circuit. The task includes several variables, where the variables represent an encoding of the allocation of the physical qubits. In other words, the propositional logic formula is specifically formulated based on the connectivity graph and the quantum logic circuit, as these constrain the possibilities for using the physical qubits. Specifically, the task can be formulated as a Boolean satisfiability problem (SAT). The satisfiability problem (SAT problem) specifically involves finding a satisfactory mapping for a given formula in conjunctive normal form (CNF).

• Execute steps 1) to 3) listed below until all variables are assigned. In other words, the variables are initially unassigned or at least assigned independently of the input data. Preferably, the variables are initialized with arbitrary values representing the "unassigned state" of the variables. In particular, the following steps are based on the concept of conflict-driven constraint learning (CDCL). However, according to claim 1, domain knowledge (especially knowledge about the noise behavior of the respective physical qubits) is additionally used, which makes this initially non-deterministic subroutine deterministic. The starting point here is user-defined domain knowledge (in this case, which physical qubits should preferably not be used and/or which physical qubits should preferably be used), which is taken into account insofar as it is not present in any conflict with other (learned) conflict side conditions of the underlying mapping problem may exist.

1) Initial assignment of at least one of the variables of the symbolic solver

■ subject to the boundary conditions; In particular, the boundary conditions encode which physical qubits can interact with each other and which operation should be performed according to the logic quantum circuit.

■ subject to conflict constraints, where the conflict constraints may consist of no constraint, one constraint, or more than one constraint. Compliance with the conflict constraints takes priority over compliance with the initial constraints.

■ subject to the initial constraints of the physical qubits, provided that the initial constraints of the physical qubits are compatible with the boundary conditions and conflict constraints, wherein the initial constraints include, in particular, at least one initial constraint;

When assigning the first variables, there are usually no conflicting constraints. These arise, if at all, only when assigning further variables, particularly if an already assigned variable would have to be set to "true" to satisfy a first statement (i.e., that a statement evaluates to true) and to "false" to satisfy a further statement. The initial constraints, which contain information about whether the respective physical qubit should be preferentially used or not used in the execution of the quantum circuit, can be discarded (in other words, ignored) if a conflicting constraint requires it. In other words, compliance with the initial constraints has a lower priority than compliance with the conflicting constraints.

2) Determining an implication graph for the initial assignment of the at least one variable, taking the input data into account; In this step, another variable is assigned based on the at least one propositional logic formula of the problem, depending on the assignment of the initially assigned variables. In other words, preferably at least one propositional logic formula is used. The formula from the problem is used to define another variable in such a way that the propositional logic formula, which depends on this variable, is evaluated as "true".

3) Check whether a termination criterion is met; In particular, in step 2), a variable may be assigned an initial value when creating the implication graph, for example, "true," but according to another propositional formula of the task, the variable should be assigned the correspondingly different value, in this case, "false." If such a contradictory double assignment of a variable exists, the termination criterion is met. If, according to further propositional formulas of the task, the variable is assigned a consistent value (for example, always "true"), the termination criterion is not met, and the procedure can be continued with step 1) for another unassigned variable.

■ If the termination criterion is not met: Repeat steps 1) and 3) for another variable;

■ Is the termination criterion met?

• Determining a conflict constraint from the variable assignment that led to the fulfillment of the termination criterion; In particular, a conflict constraint can be derived from the propositional logic formulas whose evaluation to "true" caused the conflict and added to the task so that this conflict constraint is taken into account when assigning variables in the next iteration of steps 1) to 3).

• Adding the conflict constraint to the task;

• Return to step 1) of the initial assignment of the first variable involved in fulfilling the termination criterion; preferably, return to a point in the assignment process that led to the conflict. The assignments of all variables assigned after this point are discarded and reassigned, taking the conflict constraint into account.

• Providing the assignment of variables for mapping the logical qubits to the physical qubits of the qubit array; in particular, this is done by storing them on internal data storage and/or external data storage (e.g. cloud), by data transmission or wireless or wired data transmission, etc. • Determining and providing an initial mapping of the logical qubits to the physical qubits of the qubit array and an executable quantum circuit from the variable assignments. In this step, the mapping is determined by decoding the variables. Specifically, the mapping to the physical qubits is derived from the variable assignments. Providing the mapping can be done by storing it on internal and/or external data storage (e.g., cloud storage), by data transmission (wireless or wired), etc.

Advantageously, the proposed procedure can be applied to all symbolic methods that have a subroutine for assigning an initial value to nondeterministic (Boolean) variables. This includes methods that solve problems in decision logic (SAT, SAT solver) or decision logic modulo other theories (SMT).

In particular, the procedure includes executing the symbolic solver.

Since conflict-driven constraint learning (CDCL) is a high-performing and common standard technique in symbolic solvers, our solution utilizes the "decide" subroutine. An example CDCL algorithm is included here. The described procedure utilizes this "decide" subroutine: `loop propagate //computer deterministic consequences if no conflict then if all variables assigned then return variable assignment else decide //non-deterministically assign some literal else if top-level conflict then return unsatisfiable else` analyze //analyze conflict and add a conflict constraint backjump //undo assignments until conflict constraint is unit

Ultimately, the method described in claim 1 enables the following: If there is no induction/proof that the non-preferred (error-prone) qubits must be used to map the quantum circuit, then they should not be used. A significant advantage is reduced noise during the execution of the quantum circuit. Furthermore, domain knowledge can also enable the logic solver to solve the mapping problem more quickly.

In the method described in claim 1, a deterministic selection and assignment of variables based on domain knowledge (which we have from, for example, characterizations of the quantum computer) always takes place, provided that this is available for specific variable assignments.

In other words, the quantum logic circuit and connectivity graph of the quantum computer platform, as well as a list of qubits that should not be used (e.g., from a test routine used to characterize the quantum computer), are provided as input data. This input data is used to create a problem in the language of any symbolic solver (e.g., a SAT/SMT solver or an answer set solver). When the symbolic solver needs to decide on the initial assignment of variables (e.g., if the solver uses CDCL in the `decide` subroutine), the preferred knowledge contained in the input data, or ultimately the preferred non-assignment, is used instead of a non-deterministic assignment. In our proposed solution, this would mean that Boolean variables encoding the assignment of a noisy physical qubit should preferably not be assigned such that a logical qubit is assigned to this noisy qubit in the final mapping solution (including consideration of swaps, which may be added in the executable quantum circuit to transport logical qubits to interacting physical qubits when they are involved in a common quantum operation). Preferred knowledge from the input data is only used if it does not conflict logically with other knowledge or knowledge learned within the CDCL algorithm. The output of the method includes a solution to the mapping problem, where noisy qubits are not used (provided this does not contradict the problem statement).

According to one embodiment, the initial constraint of a physical qubit includes information about its susceptibility to errors, in particular its fidelity. Specifically, the initial constraint includes information on whether the physical qubit is permitted to be assigned a logical qubit. Advantageously, this reduces or eliminates the need to use noisy qubits when mapping logical qubits to physical qubits.

According to one embodiment, the termination criterion is met if a conflict arises when determining the implication graph, in particular if a variable that has already been assigned a value is to be assigned a different value when determining the implication graph.

According to one embodiment, the hardware-specific connectivity graph comprises nodes and edges, wherein the nodes represent physical qubits and nodes of physical qubits that are configured to interact with each other are connected to each other in the hardware-specific connectivity graph by edges.

According to one embodiment, a “decision” subroutine of the symbolic solver is executed to initially assign the variables according to one of the above methods.

The method described above provides a solution to the mapping problem, taking into account the noise susceptibility of the qubits. As mentioned earlier, depending on the logic quantum circuit, the limited connectivity of the physical qubits may necessitate SWAP operations in the executable. To complement the quantum circuit, a SWAP operation is provided to exchange the states of the two qubits involved in a quantum operation. This allows a logical qubit to be exchanged between physical qubits and thus transported to a physical qubit that can interact with the other physical qubit involved in the quantum operation. This makes the quantum circuit executable on the real-world platform. An example of a symbolic solver is an answer set solver.

The method can be used in particular for solving problems in the field of materials development (Variational Hamiltonian Algorithm (VHA)) or binary optimization problems, for example by Quantum Approximate Optimization Algorithm (QAOA).

Ultimately, the goal is to find a valid mapping of the quantum logic circuit onto the physical platform (qubit arrangement), possibly by enriching the original circuit (logic circuit) through swap operations. It is advantageous to keep the number of swap operations as low as possible, both to avoid slowing down the execution of the circuit and to minimize the probability of errors on noisy quantum computers.

According to one embodiment, creating the problem involves dividing the quantum logic circuit into sections, each section comprising a quantum operation. In particular, the sections are chosen such that each logic qubit participates in at most one 2-qubit gate or at most one multi-qubit gate. One-qubit gates preferably play no role in the selection of the sections, since they can be executed independently of the connectivity of the physical qubit to which the logic qubit is mapped in the respective section and can later be easily incorporated into the respective sections. Furthermore, creating the problem involves encoding the division in a modeling language of the symbolic solver. Determining the executable quantum circuit involves assigning the variables for each section and performing the subsequent steps for each section of the quantum logic circuit. This is done for each section of the logic quantum circuit, starting with the first section:

■ Check whether the logical qubits involved in the quantum operation of the section are mapped to physical qubits that are configured to interact with each other. In other words, this step includes a check whether the quantum operation is executable. If so, the quantum operation of the section is adopted into the executable quantum circuit without modification. However, particularly if an optimization criterion exists, one or more swap operations may still be inserted, and consequently, the mapping will be adjusted, especially if this allows swap operations to be avoided in one of the subsequent sections. The mapping is then used as the basis for the next check.

• If no, the following steps will be performed:

1) Defining a stationary qubit from among the logical qubits involved in the quantum operation of the section; in particular, the quantum state remains with the physical qubit associated with the logical qubit selected as the stationary qubit. In other words, the stationary qubit is characterized by the fact that it does not participate in any swap operation in this section.

2) Defining a sink qubit. This step can also be performed implicitly, analogous to step 1). That is: If one qubit is selected as stationary in a 2-qubit gate, the other is automatically the sink qubit; conversely, if one qubit is selected as a sink in a 2-qubit gate, the other is automatically the stationary qubit. Specifically, the sink qubit is the logical qubit involved in the quantum operation to be performed, which is to be transferred, in particular by applying at least one SWAP operation, to a physical qubit configured to interact with the physical qubit of the stationary qubit (i.e., a physical qubit that is connected to the physical qubit of the stationary qubit by an edge in the connectivity graph). This qubit is the first sink. The sequence of swap operations (the swapping) starts from the sink, with the number of swap operations chosen such that these qubits are brought to a physical qubit which is set up to interact with the stationary qubit. 3) Applying a SWAP operation to the sink qubit, whereby the logical qubit of the sink qubit is transferred to a physical qubit involved in the SWAP operation, which then becomes the sink qubit;

4) Transferring the SWAP operation into the executable quantum circuit;

5) If, after applying the SWAP operation, the stationary qubit and the sink qubit are not configured to interact with each other, steps 1) to 4), preferably steps 3) and 4), are repeated until the sink qubit is mapped to a physical qubit that is configured to interact with the stationary qubit. In particular, it is important to use an updated mapping between logical qubits and physical qubits for the verification step after completion of the SWAP operations. This is because the logic quantum circuit only indicates on which logical qubits the quantum operation encompassed by the subsequent section of the logic quantum circuit is to be performed. The updated mapping, extended by the SWAP operations performed in the previous section, provides information on whether the logical qubits involved in the upcoming quantum operation are mapped to physical qubits that can interact with each other. That is to say, During verification, the updated diagram is used to check whether further swap operations are necessary, or whether the section can be incorporated into the executable quantum circuit without adding any swap operations, allowing verification of the subsequent section to proceed. However, a valid solution exists only if the nearest neighbor of the stationary qubit is actually reached. This can be ensured by excluding solutions whose swaps do not extend to the stationary qubit (in the modeling language of response set programming, this is called an "integrity constraint").

6) Adjusting the mapping of logical qubits to physical qubits; In other words, following the computation of the SWAP route, the mapping is managed to account for any changes in the assignment of logical and physical qubits at the output of the section compared to the input, potentially due to SWAP operations. For example, this management might look like this:

• The stationary qubit retains its assignment to the logical qubit • The swapping logical qubit (sink qubit) is mapped to a physical nearest neighbor of the stationary qubit according to the swap operations.

• Physical qubits that are not affected by swaps will “retain” their assigned logical qubits.

• For qubits affected by swap operations: Roughly speaking, two cases must be distinguished: a) a physical qubit to which a logical qubit is assigned is part of a swap operation; b) a physical qubit is initially not assigned a logical qubit, but is now part of a swap operation

• Case (a): according to the calculated SWAP operations, the mapping of the involved logical qubits to the physical qubits is swapped and thus the mapping is adjusted.

• Case (b): This is not an obstacle, but it should be documented that the physical qubits that do not have a logical qubit assigned to them also have a valid quantum mechanical state (e.g., initialized as |0>) before the final circuit (executable circuit) is executed on the real platform. It is important that records are kept of these qubits, as they may also be part of subsequent/further SWAP operations.

- Providing the initial mapping of the logic qubits of the logic quantum circuit to the physical qubits of the qubit array and the executable quantum circuit. In other words, specifically, an initial mapping of the logic qubits to the physical qubits is provided, as well as a circuit for the physical qubits augmented with the added SWAP operations. Specifically, this provisioning is achieved by storing the data on internal and/or external data storage (e.g., a hard drive).

Cloud), through data transmission or wireless or wired data transfer, etc.

One advantage of this embodiment is that not only can a feasible quantum circuit be found that avoids the use of noisy physical qubits where possible, but also that a solution optimized with respect to the number of swap operations can be determined. In other words... This method enables the creation of a valid mapping of the quantum logic circuit onto the physical platform (qubit array), potentially enriching the original circuit (logic circuit) through swap operations. It is advantageous to keep the number of swap operations as low as possible to avoid slowing down the circuit's execution and to minimize the probability of errors on noisy quantum computers. This method is particularly beneficial for tasks involving quantum logic circuits where there are many interactions between (almost all) qubits (e.g., every qubit interacting with every other qubit, and the hardware platform's connectivity is limited).

In particular, the method for mapping a logic quantum circuit onto a qubit array can be designed such that the procedural steps for calculating exact mapping solutions can utilize an answer set solver from the domain of answer set programming. This allows for improved scalability as the number of problem instances to be solved grows. By adapting the method to utilize answer set solvers, it is advantageously exploited that answer set programming, unlike pseudo-Boolean decidability, scales better for platforms with densely connected architectures. Common quantum computers, such as Google's Sycamore quantum computer, exhibit dense connectivity due to their lattice-based topology and can therefore benefit from the use of answer set programming.

One advantage of using response set programming is that properties like reachability can be described directly in the modeling language. The reachability definition is used to calculate the sequence of swap operations required to bring two qubits together locally, enabling interaction. The reachability encoding is preferably The system is designed so that the nearest neighbor in the interaction graph of the physical target qubit is reached through swap operations. Furthermore, a new (intermediate) mapping of logical qubits is dynamically created and maintained as soon as swap operations are performed. This new mapping can involve more physical qubits than in the actual logic circuit. This regrouping is then taken into account in subsequent swap operations. It should also be noted that the cost of a "permutation" of qubits (which corresponds to inserting swap operations after every 2-qubit gate operation (quantum operation)) is not statically pre-calculated. In our proposed solution, the calculation of the permutations or the sequence of swap operations is part of the method. This offers the additional advantage that additional constraints can be considered, such as the requirement that certain physical qubits must not be swapped. Considering that one does not want to pre-calculate this permutation and wants to find and prove mappings that require no/few swaps, the solution we have proposed scales very well in contrast to solutions that statically pre-calculate the costs.

In particular, creating the task can include an initial mapping of the logical qubits of the quantum logic circuit to the physical qubits of the qubit array. Preferably, the logical qubits can be mapped to the physical qubits such that the quantum operation of the first section, i.e., the section comprising the first quantum operation, in particular the 2-qubit gate (2-qubit interaction) encompassed by it, can be executed without swapping (i.e., applying additional swap operations not included in the quantum logic circuit). In particular, they are placed as nearest neighbors in the connectivity graph. If there are multiple possibilities, the method can be carried out for all of these possibilities, and an executable quantum circuit can be determined for each possibility, preferably selecting the executable quantum circuit with the fewest swap operations for execution on the quantum computer comprising the qubit array underlying the method. The first section is preferably chosen such that each logical qubit of the logical The quantum circuit is involved in one or no multi- or two-gate operation. First, however, a mapping is chosen, taking into account the following criteria when assigning the logical and physical qubits:

• Each logical qubit is assigned exactly one physical qubit, and • each physical qubit is assigned at most one logical qubit; that is, in particular, a single physical qubit may not be assigned two or more logical qubits. This last criterion specifically addresses the case where the qubit array comprises more physical qubits than logical qubits. In this case, not every physical qubit is assigned a logical qubit during the initial mapping; however, in subsequent processes, physical qubits that were not previously assigned a logical qubit can become part of a swap operation. In this case, it should be ensured that the physical qubits that were not initially assigned a logical qubit also have a valid quantum mechanical state (e.g., initialized as |0>) before the final (executable) quantum circuit is executed on the real platform (quantum computer). It is important to keep track of these physical qubits, which are not assigned a logical qubit during the initial mapping, as they can also be part of subsequent/further SWAP operations. During each assignment of physical qubits, the assignment of physical qubits with values below a defined threshold is avoided according to the "decision" routine described earlier.

According to one embodiment, the reachability criterion includes the exclusion of solutions where it is not possible to map the logical qubits involved in the quantum operation of the section to physical qubits that are configured to interact with each other, particularly not by applying SWAP operations.

According to one embodiment, when determining the executable quantum circuit, an optimization based on the number of swap operations is performed. Without optimization instructions, the method, or rather the symbolic solver, initially only determines a valid solution that, while avoiding the use of noise-prone physical qubits and being correct, may have too many swap operations. One possibility is to to output all possible valid solutions and then select the solution that has the fewest swap operations overall.

According to one embodiment, the method described above is executed multiple times, wherein several valid solutions, each comprising the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array and the associated executable quantum circuit, are provided, and in a further method step, the solution from the several valid solutions whose executable quantum circuit has the fewest SWAP operations is provided for execution on a quantum computer, comprising the qubit array and the hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph.

According to one embodiment, in the initial mapping, the logical qubits involved in the quantum operation of the first section are mapped to physical qubits that are configured to interact with each other. This advantageously reduces the number of swap operations.

A comprehensive system

• a classical computer to provide the initial mapping of the logic qubits of the logic quantum circuit to the physical qubits of the qubit array and the executable quantum circuit, according to the method described above and

• a quantum computer, in particular a NISQ computer, comprising the qubit array and a hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph used in the method for executing the quantum logic circuit using the initial mapping of the logical qubits of the quantum logic circuit to the physical qubits of the qubit array and the executable quantum circuit provided by the classical computer, The system offers advantages arising from the benefits of the implemented method. In particular, it provides a scalable and efficient way to initially map the logical qubits of the logic quantum circuit to the physical qubits of the qubit array and the executable quantum circuit on a quantum computer, and to execute this mapping on the quantum computer. Specifically, it advantageously determines an optimized executable quantum circuit that reduces the susceptibility to errors by avoiding the insertion of unnecessary swap operations, thus enabling more reliable and robust operation of the quantum computer.

In this context, a classical computer is understood very generally to be a device that can process data using programmable calculation instructions and that is suitable for carrying out the procedure described above, in particular for mapping a logic quantum circuit onto the qubit arrangement of a quantum computer.

The advantages of a computer program product, comprising instructions, in particular instructions written in the modeling language of a symbolic solver, especially an answer set solver, which cause the classical computer of the system to execute the procedural steps of the procedure described above, result from the advantages mentioned above.

A classical computer for executing the above-described method for mapping a logic quantum circuit onto the qubit array of a quantum computer, in particular a NISQ computer, comprising the qubit array underlying the method with restricted connectivity of the physical qubits, which is described by the hardware-specific connectivity graph, has advantages that result from the advantages of the executed method; in particular, it enables a well-scaling, efficient way to provide a quantum computer with an initial mapping of the logic qubits of the logic quantum circuit onto the physical qubits of the qubit array and the executable quantum circuit. A method for operating a quantum computer, comprising a qubit arrangement, having physical qubits and hardware-specific connectivity of the physical qubits, in particular a quantum computer of the system described above, which has the following steps:

• Providing the mapping of the logic qubits of the logic quantum circuit to the physical qubits of the qubit array and the executable quantum circuit, according to the procedure described above;

• Initializing the quantum computer, comprising the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array of the quantum computer;

• Executing the executable quantum circuit on the quantum computer is advantageously particularly efficient, since the mapping is based on a well-scaling, efficient method as described above.

Further advantages arise from the aforementioned advantages of the process.

Brief description of the drawings

Exemplary embodiments of the invention are shown in the drawings and are explained in more detail in the following description. Identical reference numerals in the figures denote identical or equivalently acting elements.

They show

Fig. 1 shows a representation of a hardware-specific connectivity graph of a qubit arrangement comprising eight qubits according to an exemplary embodiment.

Fig. 2 shows a representation of a logic quantum circuit comprising four logic qubits according to an exemplary embodiment. Fig. 3 shows a flowchart of a method for mapping a logic quantum circuit onto a qubit arrangement comprising a number of physical qubits, according to an embodiment;

Fig. 4 is a flowchart of part of the method from Fig. 3 for determining an executable quantum circuit according to an embodiment; Fig. 5 is a representation of an initial mapping of the logic qubits to the physical qubits of the qubit arrangement according to an embodiment; Fig. 6 is a representation of an executable quantum circuit comprising four physical qubits according to an embodiment.

Fig. 7 is a schematic sketch of a system comprising a classical computer and a quantum computer according to an exemplary embodiment, and Fig. 8 is a flowchart of a method for operating a quantum computer.

Exemplary embodiments of the invention

Figure 1 shows an example of a hardware-specific connectivity graph 102 of a quantum computer platform. The quantum computer comprises eight physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, which are represented as nodes on a circle in the connectivity graph 102 and are connected to each other via ring-shaped edges 1020. An edge 1020 always connects two physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and symbolizes a possible interaction between these physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8. In particular, the edge 1020 indicates that a 2-qubit gate quantum operation can be performed on the qubits connected by the edge 1020. Physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are not connected by an edge 1020 cannot interact; that is, in particular, no 2-qubit gate quantum operation can be performed on them together. In the present example, the first physical qubit PQ1 can interact with the eighth physical qubit PQ8 and the second qubit PQ2, the second physical qubit PQ2 can additionally interact with the third physical qubit PQ3, the third physical qubit PQ3 can additionally interact with the fourth physical qubit PQ4, the fourth physical qubit PQ4 can additionally interact with the fifth physical qubit PQ6, the sixth physical qubit PQ6 can additionally interact with the seventh The physical qubits interact, and the seventh physical qubit, PQ7, can additionally interact with the eighth physical qubit, PQ8. Connectivity graph 102 thus shows, in particular, the number and connectivity of the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, and PQ8 of the qubit arrangement of the quantum computer.

Fig. 2 shows an embodiment of a logic quantum circuit 101, which will subsequently be mapped onto the qubit arrangement of the quantum computer, whose hardware-specific connectivity graph 102 is shown in Fig. 1. The first logic qubit LQ1 is represented by the top horizontal line. The quantum operations to be applied to the first logic qubit LQ1 are arranged along the top line, with the quantum operations being executed sequentially from left to right. Similarly, the horizontal lines below represent the second logic qubit LQ2, the third logic qubit LQ3, and the fourth logic qubit LQ4 and their associated quantum operations. A controlled-not (CNOT) operation Q1 is to be performed on the first LQ1 and the third logic qubit LQ3. Furthermore, a CNOT operation Q2 is to be performed on the second logic qubit LQ2 and the fourth logic qubit LQ4. These two 2-qubit gate operations can be combined in a first section 1010, since none of the logic qubits is involved in more than one 2-gate operation. In particular, the two CNOT operations Q1 and Q2 can also be performed simultaneously. That is, the first section 1010 is generally chosen such that each logic qubit LQ1, LQ2, LQ3, LQ4 is involved in one or no multi- or 2-gate operation. A Pauli X gate Q4, i.e., a 1-qubit gate, is then performed on the first logic qubit. This is not considered when choosing the sections for dividing the logic quantum circuit 101. Furthermore, a CNOT gate Q3 is performed on the second logic qubit LQ2 and the third logic qubit LQ3. In the next journal, a CNOT gate Q5 will be performed on the first logic qubit LQ1 and the second logic qubit LQ2. If these quantum operations were combined into one section, the second logical qubit LQ2 would be involved in two 2-qubit gates. Therefore, the second section ends after the CNOT operation Q3 of the second LQ2 and third logical qubit LQ3, and the CNOT operation Q5 of the first LQ1 and second logical qubit LQ2 is included in a third section. Subsequently, a Hadamard gate (1-qubit gate) Q6 and Q7 are applied to the second LQ2 and third logical qubit LQ3, respectively. The operations applied are therefore not considered when dividing the time into sections. In the last time step, a CNOT operation is applied to the first LQ1 and the second logical qubit LQ2, and, in particular, simultaneously, a CNOT operation is applied to the third LQ3 and the fourth logical qubit LQ4. These two CNOT operations can again be combined into a single section, since each qubit participates in only one 2-qubit operation.

Fig. 3 shows a flowchart of a method 100 for mapping a logic quantum circuit, for example the logic quantum circuit 101 shown in Fig. 2, onto a qubit array comprising a number of physical qubits PQ1, PQ, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, wherein the qubit array is represented, for example, by the hardware-specific connectivity graph 102 shown in Fig. 1. Furthermore, information is available that the fifth physical qubit, PQ5, has a lower quality compared to the other physical qubits, i.e., it is more susceptible to noise. This was determined, for example, by executing a test routine on the quantum computer. In other words, it was determined that both 1-qubit and 2-qubit operations involving the fifth physical qubit PQ5 in Fig. 2 are particularly error-prone (or rather, the probability of an error on this qubit is high). Therefore, a mapping of the logic quantum circuit to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, and PQ8 is preferred, in which no logic qubit is assigned to this fifth physical qubit PQ5. Furthermore, no swap operation involving this fifth physical qubit PQ5 should be included.

This information about the fifth physical qubit PQ5 is taken into account as an initial constraint 103 in the procedure 100 described below.

Procedure 100 comprises the following steps: Input data (101, 102, 103) is provided, including:

■ the hardware-specific connectivity graph 102 of the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8,

■ the logical quantum circuit 101 , and

■ the initial constraints 103 of the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 (in this embodiment, that the physical qubit PQ5 should be avoided, as described above).

For example, this information can be retrieved from an internal and/or external storage unit or received from a data transmission unit. In other words, this section compiles the facts about the number of logical qubits LQ1, LQ2, LQ3, LQ4, the number and quality of the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, and the connectivity graph 102. Furthermore, a task 105 is created to map the logical quantum circuit 101 to the qubit arrangement in a modeling language of a symbolic solver. Boundary conditions are created based on the hardware-specific connectivity graph 102 and the logical quantum circuit 101. If the logical quantum circuit 101 is available, it can be divided into sections, as explained in the example of Fig. 2. This can be done, in particular, as part of creating the task 105. In particular, each section comprises a quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, specifically a 2-qubit operation, and may also include multiple 2-qubit operations, provided that each logical qubit participates in at most one of the 2-qubit operations. In other words, the logic circuit 101 is pre-structured into sections (slices), with the requirement that each section contains at most one 2-qubit gate, specifically LQ1, LQ2, LQ3, LQ4 per logical qubit. (1-qubit interactions can be omitted for now; these can be inserted later at the appropriate place in the final executable quantum circuit 1002).

The task comprises several variables, where the variables represent an encoding of an assignment of the physical qubits; in particular, it is encoded here in the modeling language of the symbolic solver that an assignment of the logical qubits LQ1 , LQ2, LQ3, LQ4 and the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is carried out such that logical qubits LQ1 , LQ2, LQ3, LQ4 of a quantum operation are mapped to physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, which can interact with each other (boundary condition). For the first section in Fig. 2, this translates into a propositional logic formula, stating that the first logical qubit LQ1 and the third logical qubit LQ3 can be mapped to all physical qubit pairs which, according to connectivity graph 102, can interact with each other, for example, the first physical qubit PQ1 and the second physical qubit PQ2, the second physical qubit PQ2 and the third physical qubit PQ3, the third and fourth physical qubits PQ3, PQ4, the fourth and fifth physical qubits PQ4, PQ5, the fifth and sixth physical qubits PQ5, PQ6, the sixth and seventh physical qubits PQ6, PQ7, the seventh and eighth physical qubits PQ7, PQ8, and the eighth and first physical qubits PQ8, PQ1. Analogous considerations are made for the second logical qubit LQ2 and the fourth logical qubit LQ3.

Once the task is created (105), i.e., in this example, once all propositional logic formulas relevant to the mapping have been created, the variables are assigned. The following steps are performed (106) until all variables are assigned:

1) Initial assignment of at least one of the variables of the symbolic solver

■ subject to compliance with the boundary conditions (see previous step),

■ subject to compliance with conflict ancillary conditions and

■ subject to the initial constraints of the physical qubits, provided that the initial constraints of the physical qubits are compatible with the

Boundary conditions and conflict-related side conditions are compatible;

2) Determination of an implication graph for the initial assignment of at least one variable, taking into account the input data;

3) Check whether a termination criterion is met;

■ If the termination criterion is not met: Repeat steps 1) and 3) for another variable;

■ Is the termination criterion met?

• Determining a conflict constraint from the variable assignment that led to the fulfillment of the termination criterion;

• Adding the conflict constraint to the task;

• Return to step 1) of the initial assignment of the first variables involved in fulfilling the termination criterion;

• Providing the assignment of variables for mapping 1001 of the logical qubits LQ1 , LQ2, LQ3, LQ4 to the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array;

• Determining and providing 107 an initial mapping 1001 of the logical qubits LQ1 , LQ2, LQ3, LQ4 to the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array and an executable quantum circuit 1002 from the assignment of the variables.

An example of a variable definition for the symbolic solver is outlined as follows: Each logical qubit is assigned a binary variable that indicates which physical qubit the logical qubit is mapped to for each slice of the logic circuit, where Iq represents logical qubit, pq represents physical qubit, and s represents slice: x_lq1_pq1_s1 \in {0,1} (in other words, the variable encodes whether logical qubit 1 is mapped to physical qubit 1 in slice 1 (0=yes/true, 1=no/false)) x_lq1_pq2_s1 \in {0,1} x_lq1_pq3_s1 \in {0,1} etc. x_lq2_pq1_s1 \in {0,1} x_lq2_pq2_s1 \in {0,1} x_lq2_pq3_s1 \in {0,1} etc. x_lq1_pq1_s2 \in {0,1} x_lq1_pq2_s2 \in {0,1} etc. x_lq2_pq1_s2 \in {0,1} x_lq2_pq2_s2 \in {0,1} etc. x_lq1_pq1_sF \in {0,1} x_lq1_pq2_sF \in {0,1} etc. x_lq2_pq1_sF \in {0,1} x_lq2_pq2_sF \in {0,1} etc.

With “F” as the last numbering of the sections.

The initial mapping of the logical qubits to physical qubits in the executable quantum circuit can be read from all variables x_lqX_pqY_s1 that have the value 1 (with "X" representing the number of logical qubits and "Y" representing the number of physical qubits).

The final mapping (before the last step of execution on the quantum computer) is then always via x_lqx_pqx_sF = 1.

If the variable x_lq_pqP_sF' changes in value over the range 2 <= F'<= F for a logical qubit LQ with a fixed initial physical qubit pqP in section 1 of the initial circuit (x_lq_pqP_s1 = 1), then the logical qubit has been swapped at least once. The route/sequence of SWAP operations required for any necessary exchanges of physical qubits in sections of the circuit are accordingly encoded in binary variables.

If one wants to encode initial constraints, e.g., that PQ2 should be avoided if possible, then in the respective modeling language of the preferred symbolic solver, it is encoded that x_lqX_pq2_sY = 0 for all “X” over all logical qubits and for all 1 <= Y <= F.

The method 100 described in Fig. 3 enables a mapping which takes into account the quality of the individual physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, but does not enable optimization of the number of SWAP operations in the executable circuit.

The embodiment shown in Fig. 4 is a further development which, in addition to assigning the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, makes it possible to optimize, in particular to reduce or minimize, the number of SWAP operations inserted to map logical qubits, which in the following section participate in a common quantum operation, to physical qubits that can interact with each other. Fig. 4 shows the determination 107 of the executable circuit 1002 according to an embodiment. For each section, starting with the first section, the following steps are performed:

• A check 1071 is performed to verify whether the logical qubits LQ1, LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8 of the section are mapped to physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are configured to interact with each other. For the first section, this is done using the initial map 1001, which provides information about the mapping of the logical to the physical qubits. After determining a SWAP route for the first section, the mapping of the logical and physical qubits is then checked again and adjusted if necessary, provided it differs from the initial map 1001. This adjusted map is then passed to the check step 1071 for the The following section is used as a basis, after which the illustration may be adjusted again, etc.

■ If yes 1072, i.e., if the logical qubits LQ1, LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 of section 1072 are mapped to physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 which are configured to interact with each other, then preferably no SWAP operation is inserted and the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 can be directly incorporated into the executable quantum circuit 1002. In this case, no adjustment of the mapping of the logical to the physical qubits is necessary. Particularly if an optimization criterion exists, one or more swap operations may still be inserted, consequently requiring an adjustment of the allocation, especially if this can save swap operations in one of the subsequent sections. The allocation will then form the basis of the next check, 1071.

■ If no 1073, i.e., if the logical qubits LQ1 , LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 of the section are mapped to physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 which, according to connectivity graph 102, are not configured to interact with each other, the following steps are carried out:

1) Select the logical qubit LQ1, LQ2, LQ3, LQ4 that should remain physically connected to its physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 (stationary qubit) or select the logical qubit LQ1, LQ2, LQ3, LQ4 that should be swapped (sink qubit). The qubit to be swapped is the first sink.

2) Start the SWAPing from the sink, but ensure that in the final solution the last SWAP operation brings the qubit to be SWAPed as the nearest neighbor to the stationary qubit.

3) After a SWAP operation, a new sink is set, from which the next SWAP is then to be calculated. Then step 2) can again determine the next SWAP operation. In other words, in steps 2) and 3), a SWAP operation is applied to the sink qubit, whereby the logical qubit LQ1, LQ2, LQ3, LQ4 of the sink qubit is transferred to a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 involved in the SWAP operation, which then becomes the sink qubit; 4) Transfer 1074 of the SWAP operation into the executable quantum circuit 1002;

5) We iteratively calculate the respective swaps using the instructions above (i.e., 2) and 3)). However, a valid solution only exists if we actually reach the nearest neighbor of the stationary qubit. We ensure this by specifically excluding solutions whose swaps do not extend to the stationary qubit (in the modeling language, this is called an "integrity constraint").

6) Steps 2) through 5) should now have calculated a swap route. The next step is to manage whether swap operations have changed the mapping of logical qubits to physical qubits.

• The stationary qubit retains its assignment of the logical qubits LQ1, LQ2, LQ3, LQ4.

• The SWAP-ending logical qubit LQ1 , LQ2, LQ3, LQ4 is mapped to a physical nearest neighbor PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the stationary qubit according to the SWAP operations.

• Physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are not affected by SWAPs will “retain” their assigned logical qubits LQ1, LQ2, LQ3, LQ4.

• For qubits affected by swap operations, two essential cases must be distinguished: (a) a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, to which a logical qubit LQ1, LQ2, LQ3, LQ4 is assigned, is part of a swap operation; (b) a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is initially not assigned a logical qubit LQ1, LQ2, LQ3, LQ4, but is now part of a swap operation

• Case (a): according to the calculated SWAP operations, the mapping of the involved logical qubits LQ1, LQ2, LQ3, LQ4 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is swapped.

• Case (b): This is not an obstacle, but it must be ensured that the physical qubits that do not have logical qubits assigned LQ1, LQ2, LQ3, LQ4 also have a valid quantum mechanical state before the execution of the final circuit on the real platform (e.g. initialized as |0>). It is important that records are kept of these qubits, as they can also be part of subsequent/further SWAP operations.

As mentioned previously, optimization criteria can be used:

• Without optimization instructions, the answer set solver initially only produces one valid solution, which assesses the quality of the physical qubits in the

The diagram takes into account which solutions are correct but may contain too many swap operations. Alternatively, you can display all possible valid solutions and then select the one with the fewest swap operations.

• Optimization instructions are added. The first instruction is that the mapping of the logical qubits should initially be done in such a way that NO SWAP operations are necessary. However, it may be that no solution exists that does without SWAPs. Therefore: Try to minimize the total number of SWAP operations in the final circuit 1002.

An initial mapping of the logical qubits LQ1, LQ2, LQ3, LQ4 of the logic quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit arrangement takes place, which takes into account the following rules:

• Each logical qubit LQ1, LQ2, LQ3, LQ4 is assigned exactly one physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and

• Each physical qubit PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is assigned a maximum of one logical qubit LQ1 , LQ2, LQ3, LQ4.

This can be done as described in the embodiment shown in Fig. 3, in order to assign the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 with the logical qubits LQ1 , LQ2, LQ3, LQ4 using the symbolic solver.

Taking into account the connectivity graph 102 from Fig. 1 and the logic quantum circuit 101 from Fig. 2, the initial mapping 1001 comprises the following mapping, which is shown in Fig. 5, where the arrows indicate the mapping: the first logical qubit LQ1 is mapped to the first physical qubit PQ1, the third logical qubit LQ3 is mapped to the second physical qubit PQ2, the second logical qubit LQ2 is mapped to the third physical qubit PQ3, and the fourth logical qubit LQ4 is mapped to the fourth physical qubit. This is a valid initial mapping that results in the quantum operations Q1, Q2 of the The first section 1010 can be executed without inserting a swap operation. Furthermore, the solution is also minimal with respect to the number of swap operations, as will be shown after performing procedure 100. Other valid initial mappings exist that require only one swap operation, but there is no mapping that can function without a swap operation. There are also other mappings that require more than one swap operation to be valid. The solutions exhibiting a minimal number of swap operations are preferred and can be determined, for example, by introducing an optimization criterion and/or by repeatedly performing the procedure and subsequently selecting a solution with a minimal number of swap operations, either per section or globally, counted across the entire executable quantum circuit.

For each section of the logic circuit 101, starting with the first section 1010, the steps shown in Fig. 4 are now performed to determine the executable quantum circuit 1002. In other words, for each section, it is checked whether the included quantum operation (2-qubit gate) can be executed directly by the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, considering their limited connectivity as defined in the connectivity graph 102, or whether the logical qubits LQ1, LQ2, LQ3, LQ4 must first be mapped to another physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 by inserting a swap operation. For each assignment, the embodiment described in Fig. 3 is used to take into account the quality of the physical qubits during the assignment. The exact procedure for determining the executable quantum circuit 1002 according to one embodiment is shown as a flowchart in Fig. 4.

As input data for the procedure 100, the connectivity graph 102 and the logical quantum circuit can be prepared in a manner suitable for the modeling language of an answer set solver and then, together with the encoding (in the modeling language) of a valid mapping solution, given to the answer set solver (e.g., the software dingo [5]). As output, the procedure 100 generates the initial mapping 1001 of the logical qubits LQ1, LQ2, LQ3, LQ4 from the logical quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 before the execution of the circuit (which is executed on the quantum computer platform) and the new circuit (i.e., the executable quantum circuit 1002, based on the original logic circuit 101) which potentially contains SWAP operations. In particular, the method 100 can be an implementation of an optimization criterion for optimizing/minimizing the number of SWAP operations, as explained above.

Fig. 6 shows a valid solution for the executable quantum circuit 1002, which results from the method described in Figures 3 and 4, when the input data shown in Figures 1 and 2 are used for the method 100. In contrast to the logic circuit 101 shown in Fig. 2, the horizontal lines in the executable quantum circuit 1002 represent physical qubits PQ1, PQ2, PQ3, PQ4. In this embodiment, the number of logical LQ1, LQ2, LQ3, LQ4 and physical qubits PQ1, PQ2, PQ3, PQ4 are the same; however, valid solutions can generally be found that use more physical than logical qubits, for example, by assigning logical qubits to physical qubits via swap operations, which did not appear in the initial diagram. In these cases, the executable quantum circuit 1002 can also have more horizontal lines (= number of physical qubits) than the logic circuit 101 (= number of logic qubits). The initial mapping 1001 shown in Fig. 5 provides information about the mapping between the logic qubits and the physical qubits before the first section. In this solution, the fifth physical qubit PQ5 is not used, as required by the initial constraint 103. Note: there are other valid mapping solutions that do not use the fifth physical qubit PQ5. The mapping changes after the second section because a SWAP operation Q0 was inserted into the executable circuit 1002, which did not occur in the logic quantum circuit 1001. This SWAP operation is due to the fact that, according to the second section, i.e., in the third section, an interaction (application of a CNOT gate) between the first logical qubit LQ1 and the second logical qubit LQ2 is provided, but according to the connectivity graph 102 in Fig. 1, they cannot interact with each other, since in the initial mapping the third logical qubit LQ3 is mapped to the second physical qubit PQ2 and the second logical qubit LQ2 to the third physical qubit PQ3. However, there is no edge 1020 between the first PQ1 and the third physical qubit PQ3 in the Connectivity graphs are plotted such that the second physical qubit PQ2 and the third physical qubit PQ3 must exchange their states after the second section via a SWAP operation, and thus the second logical qubit LQ2 is subsequently assigned to the second physical qubit PQ2, and the third logical qubit LQ3 is assigned to the third physical qubit. Since the assignment of the logical and physical qubits in the numbering corresponds to each other from the third section onwards (LQ1->PQ1, LQ2->PQ2, LQ3->PQ3, LQ4->PQ4), the executable quantum circuit 1002 and the logical quantum circuit 101 are identical from the third section onwards.

Fig. 7 shows a schematic sketch of a system comprising a computing device, in particular a classical computer 201, on which the above-described method 100 is executed and which provides the initial diagram 1001 and the executable quantum circuit 1003 for a quantum computer 202, which comprises a qubit arrangement which, at least with respect to the number of physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and their connectivity, is such as is represented by the hardware-specific connectivity graph 102, which is used in the classical computer 201 in the method 100. This allows the quantum logic circuit 101 to be executed on the quantum computer 202, or rather, the quantum logic circuit is executable on the quantum computer 202.

Fig. 8 shows a flowchart of a method 300 for operating a quantum computer 202, for example the quantum computer 202 of the system 200 shown in Fig. 7. The method comprises the following steps:

• Providing the mapping 1001 of the logic qubits LQ1 , LQ2, LQ3, LQ4 of the logic quantum circuit 101 onto the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array and the executable quantum circuit 1002, according to the procedure shown in Figures 3 and/or 4;

• Initializing 301 of the quantum computer 202, comprising the initial mapping of the logical qubits LQ1 , LQ2, LQ3, LQ4 of the logical quantum circuit 101 to the physical qubits PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array of the quantum computer 202; • Executing 302 of the executable quantum circuit (1002) on the quantum computer (201).

Output 303 can be used to provide a result determined by the quantum computer 202 based on the quantum logic circuit 101; in particular, it can be output, stored, transmitted, or displayed. ```

Claims

Claims 1. Method (100) for determining a mapping of a logic quantum circuit (101) onto a qubit arrangement comprising a number of physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) using a symbolic solver, wherein the method comprises the following steps: • Providing input data, including: ■ a hardware-specific connectivity graph (102) of the physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8), ■ the logical quantum circuit (101), and ■ Initial constraints of the physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8); • Creating (105) a task to map the logic quantum circuit (101) onto the qubit array in a modeling language of the symbolic solver, comprising creating boundary conditions based on the hardware-specific Connectivity graphs (102) and the logical quantum circuit (101), wherein the task includes several variables, where the variables represent an encoding of an allocation of the physical qubits; • Perform the following steps until all variables are populated: 1) Initial assignment of at least one of the variables of the symbolic solver ■ subject to compliance with the boundary conditions, ■ subject to compliance with conflict ancillary conditions and ■ subject to the initial constraints of the physical qubits, provided that the initial constraints of the physical qubits are compatible with the boundary conditions and conflict constraints; 2) Determination of an implication graph for the initial assignment of at least one variable, taking into account the input data; 3) Check whether a termination criterion is met; ■ If the termination criterion is not met: Repeat steps 1) and 3) for another variable; ■ Is the termination criterion met? • Determining a conflict constraint from the variable assignment that led to the fulfillment of the termination criterion; • Adding the conflict constraint to the task; • Return to step 1) of the initial assignment of the first variables involved in fulfilling the termination criterion; • Providing the assignment of variables for mapping (1001) the logical qubits (LQ1 , LQ2, LQ3, LQ4) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array; • Determining and providing an initial mapping (1001) of the logical qubits to the physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array and an executable quantum circuit (1002) from the assignment of the variables. 2. Method (100) according to one of the preceding claims, wherein the initial constraint of a physical qubit comprises information about the fault susceptibility of the physical qubit, in particular, wherein the initial constraint comprises information as to whether the physical qubit is cleared for assignment to a logical qubit. 3. Method (100) according to one of the preceding claims, wherein the termination criterion is satisfied if a conflict arises during the determination of the implication graph, in particular if a variable that has already been assigned a value is to be assigned a different value during the determination of the implication graph. 4. Method (100) according to any of the preceding claims, wherein the hardware-specific connectivity graph (102) comprises nodes and edges (1020), wherein the nodes represent physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and nodes of physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which are configured to interact with each other are connected to each other in the hardware-specific connectivity graph (102) by edges (1020). 5. Method (100) according to any of the preceding claims, wherein the creation (105) of the task • a division of the logic quantum circuit (101) into sections, each section comprising a quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8), and • a coding of the partition in a modeling language of the symbolic solver, comprising and wherein, to determine an executable quantum circuit (1002), the variables are assigned for each section and the following steps are performed for each section of the logic quantum circuit (101): ocheck (1071) whether the logic qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8) of the section are mapped to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that are configured to interact with each other, wherein this criterion is provided in particular as an reachability criterion in the modeling language of the symbolic solver; If no (1073), the following steps are performed: 1) Determining (1075) a stationary qubit from the logical qubits (LQ1 , LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8) of the section, 2) Defining (1076) a sink qubit, 3) Applying (1077) a SWAP operation to the sink qubit, wherein the logical qubit (LQ1, LQ2, LQ3, LQ4) of the sink qubit is transferred to a physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) involved in the SWAP operation, which then becomes the sink qubit; 4) Transferring (1074) the SWAP operation into the executable quantum circuit (1002); 5) If the stationary qubit and the sink qubit are not configured to interact after applying (1077) the SWAP operation: ■ Repeat steps 1) to 4) until the sinking qubit is mapped to a physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that is configured to interact with the stationary qubit; 6) Adapting the mapping of the logical qubits (LQ1, LQ2, LQ3, LQ4) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8); • Providing the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) to the physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array and executable quantum circuit (1002). 6. Method (100) according to claim 5, wherein the reachability criterion includes an exclusion of solutions where it is not possible to map the logical qubits (LQ1 , LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) of the section, in particular not by applying (1077) SWAP operations, to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which are configured to interact with each other. 7. Method (100) according to one of the preceding claims, wherein in determining (107) the executable quantum circuit (1002) an optimization is performed with respect to the number of SWAP operations. 8. Method (100) according to claim 5 or 6, wherein the symbolic solver is a response set solver and the method (100) comprises executing the response set solver. 9. Method (100) according to any one of claims 5 to 8, wherein the method (100) according to one of the preceding claims is implemented multiple times, wherein multiple valid solutions comprising the initial mapping (1001) of the logic qubits (LQ1 , LQ2, LQ3, LQ4) of the logic quantum circuit (101) on the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array and the associated executable quantum circuit (1002), and in a further procedure step, from the several valid solutions, the solution whose executable quantum circuit (1002) has the fewest SWAP operations is provided for execution on a quantum computer (202), comprising the qubit array and the hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph (102). 10. System (200), comprehensive ■ a classical computer (201) for providing the initial mapping of the logic qubits of the logic quantum circuit to the physical qubits of the qubit array and the executable quantum circuit, according to the method (100) according to any one of claims 1 to 9, and ■ a quantum computer (202) comprising the qubit array and a hardware-specific connectivity of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) according to the hardware-specific connectivity graph (102), for executing the quantum logic circuit (101) using the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the quantum logic circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array and the executable quantum circuit (1002) provided by the classical computer (201). 11. Computer program product comprising instructions, in particular instructions written in the modeling language of a response set solver, which cause the classical computer (201) of the system (200) according to claim 10 to execute the method steps according to any one of claims 1 to 9. 12. Method (300) for operating a quantum computer (202), comprising a qubit arrangement having physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and hardware-specific connectivity of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8), in particular a quantum computer of a system according to claim 11, comprising the following steps: • Providing the mapping (1001) of the logic qubits (LQ1, LQ2, LQ3, LQ4) of the logic quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit arrangement according to the method of any one of claims 1 to 9; • Initializing (301) the quantum computer (202), comprising the initial mapping of the logical qubits (LQ1 , LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1 , PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array of the quantum computer (202); • Executing (302) the executable quantum circuit (1002) on the quantum computer (201).