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WO2025116818A1 - Methods and systems for decomposing a quantum circuit - Google Patents

Methods and systems for decomposing a quantum circuit Download PDF

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Publication number
WO2025116818A1
WO2025116818A1 PCT/SG2024/050756 SG2024050756W WO2025116818A1 WO 2025116818 A1 WO2025116818 A1 WO 2025116818A1 SG 2024050756 W SG2024050756 W SG 2024050756W WO 2025116818 A1 WO2025116818 A1 WO 2025116818A1
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circuit
processing
unitary operator
quantum
gate
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Ximing Wang
Chengran YANG
Mile GU
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National University of Singapore
Nanyang Technological University
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National University of Singapore
Nanyang Technological University
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/60Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Definitions

  • the present disclosure relates to quantum computing and in particular to decomposing quantum circuits for circuit compilation.
  • Quantum computing promises immense computational benefits from solving classically intractable problems to efficiently simulating quantum interactions. Yet, such tasks typically require the synthesis of complex n-qubit unitary operations using elementary quantum gates. While systematic decomposition techniques exist, all such generic solutions require gate counts that scale exponentially with n. To reduce such intractable realizations into a shallow circuit - even when possible - remains a highly intractable (NP Complete) task.
  • NP Complete highly intractable
  • a method of decomposing a quantum circuit comprises: dividing the quantum circuit into a first sub-circuit and second sub-circuit; determining a pre-processing unitary operator and a postprocessing unitary operator which approximate local evolutions on the first sub-circuit and second sub-circuit; determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and using the gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator to determine a gate decomposition of the quantum circuit.
  • the method may further comprise decomposing the first sub-circuit and the second sub-circuit into smaller sub-circuits.
  • the process may be repeated while limiting a gate depth of the quantum circuit.
  • determining gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator comprises parametrizing the preprocessing unitary operator and the post-processing unitary operator and minimizing a cost function.
  • the cost function may be a global cost function or a sum of local cost functions each restricted to a respective qubit.
  • determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises a gradient descent method.
  • determining decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises controlling a quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring a the cost function and its gradient using a destructive swap test.
  • the entangled qubit pairs may be entangled via a CNOT gate.
  • the destructive swap test may comprise applying CNOT and Hadamard gates.
  • a computer readable medium storing processor executable instructions which when executed on a processor cause the processor to carry out a method as set out above is provided.
  • a system for decomposing a quantum circuit is provided.
  • the system is configured to: divide the quantum circuit into a first sub-circuit and second sub-circuit; determine a pre-processing unitary operator and a post-processing unitary operator which approximate local evolutions on the first sub-circuit and second sub-circuit; determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and use the gate decompositions of the pre-processing unitary operator and the post-processing unitary operator to determine a gate decomposition of the quantum circuit.
  • system is further configured to decompose the first sub-circuit and the second sub-circuit into smaller sub-circuits. In an embodiment, the system is further configured to limit a gate depth of the quantum circuit.
  • the cost function may be a global cost function or a sum of local cost functions each restricted to a respective qubit.
  • system is further configured to determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator by a gradient descent method.
  • the system further comprises a quantum processing unit and is further configured to determine decompositions of the pre-processing unitary operator and the post-processing unitary operator by controlling the quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring the cost function and its gradient using a destructive swap test.
  • the entangled qubit pairs may be entangled via a CNOT gate.
  • the destructive swap test may comprise applying CNOT and Hadamard gates.
  • FIG.1 is a schematic diagram showing quantum circuit decoupling according to an embodiment of the present invention.
  • FIG.2 is block diagram showing a quantum circuit decomposition system according to an embodiment of the present invention
  • FIG.3 is a flow chart showing a method of quantum circuit decomposition according to an embodiment of the present invention
  • FIG.4 is a schematic diagram showing a variational quantum decoupling algorithm according to embodiments of the present invention.
  • FIG.5A shows a general 2-bit unitary circuit and its decomposition
  • FIG.5B is a graph showing results of variational compilation of the general 2-bit unitary circuit shown in FIG.5A;
  • FIG.6A shows a generic 4-bit unitary circuit
  • FIG.6B is a graph showing results of variational compilation of the generic 4-bit unitary circuit shown in FIG.6A;
  • FIG.7A shows a 4-qubit unitary circuit that is generated by a spindle-shaped circuit
  • FIG.7B is a graph showing results of variational compilation of the 4-bit unitary circuit shown in FIG.7A;
  • FIG.8 is a graph showing raw data for the results shown in FIG.7;
  • FIG.9 is a quantum circuit diagram showing a conventional swap test
  • FIG.10 is a quantum circuit diagram showing a destructive swap test
  • FIG.11 is a quantum circuit diagram showing a circuit that prepares Bell state.
  • FIG.12 is a quantum circuit diagram showing the splitting of a parameterized quantum circuit into three parts.
  • Variational circuit decoupling is a divide-and-conquer approach that enhances variational circuit algorithms. The procedure involves designing a variational decoupling algorithm that first breaks a many-qubit interaction into smaller components. We can then optimize these smaller components individually or break them down further via recursive applications of variational decoupling. We demonstrate the method for compiling circuits approximating arbitrary two and four-qubit gates, where it identifies circuits of much higher fidelities than direct variational methods.
  • FIG.1 is a schematic diagram showing quantum circuit decoupling according to an embodiment of the present invention. As shown in FIG.1 , an unknown unitary quantum process U 100 is decoupled into smaller components.
  • the goal is to identify the parameter set 0 so that the corresponding circuit W(0) has a minimal cost.
  • 0 corresponds to easily adjustable parameters of some proposed circuit architectures (e.g. magnitude of rotations on various single-qubit gates), such that knowledge of 6 allows the physical synthesis of the associated quantum circuit W(9).
  • the cost function is generally chosen to be normalized (takes a maximum value of 1 ) with the following properties:
  • 1 - F(u, f/) is a natural candidate for the cost function, where F(u, U ⁇ ) ⁇ s the gate fidelity of the synthesize unitary U with respect to the target unitary U.
  • the decoupling of U involves identifying shallow pre and postprocessing operation Vo and Vi, such that U ⁇ VI(UA ® UB)VO, for some operators UA and UB which act locally on subsystems A and B respectively. This procedure can be repeated recursively, breaking down UA and UB into smaller components, until all subsystems are sufficiently small.
  • the target unitary operator U is first decomposed by Vo and Vi into local operators on subsystems A, B, and the local operator UA (UB) is further decomposed by VXoand VA,I (VB,O and VB,I) into single qubit unitary operators (UAA, UAB, UBA, and UBB).
  • the quantum circuit decomposition system 200 comprises a processor 210, a working memory 212, a user interface 214, a network interface 216, a quantum processing unit interface 218, program storage 220, and a quantum processing unit 230.
  • the processor 210 may be implemented as one or more central processing unit (CPU) chips.
  • the program storage 220 is a non-volatile storage device such as a hard disk drive which stores computer program modules. The computer program modules are loaded into the working memory 212 for execution by the processor 210.
  • the user interface 214 is an interface which allows data and controls to be input by a user and also allows the user to receive outputs such as the results of methods of decomposing a quantum circuit.
  • the network interface 216 is a wired or wireless network interface which allows the quantum circuit decomposition system 200 to send an receive data over a network such as the internet.
  • the quantum processing unit interface 218 controls the quantum processing unit 230.
  • the quantum processing unit 230 allows the quantum circuit decomposition system 200 to manipulate qubits to carryout quantum processing. As shown in FIG.2, the quantum processing unit 230 carries out quantum processing on the quantum circuit 100 which is to decomposed using methods described in the present disclosure.
  • the quantum processing unit 230 may be configured to allow quantum circuits to be attached such that the qubits input into the quantum circuit and output from the quantum circuit can be generated and processed by the quantum processing unit 230.
  • the program storage 220 stores a quantum circuit decomposition program 222.
  • the quantum circuit decomposition program 222 causes the processor 210 to execute various methods of decomposing a quantum circuit which are described in more detail below.
  • the program storage 220 may be referred to in some contexts as computer readable storage media and/or non-transitory computer readable media.
  • the quantum circuit decomposition program 222 is a distinct module which performs respective functions implemented by the quantum circuit decomposition system 200. It will be appreciated that the quantum circuit decomposition program 222 may be implemented as multiple modules and the boundaries between these modules are exemplary only, and that alternative embodiments may merge modules or impose an alternative decomposition of functionality of modules.
  • the program discussed herein may be decomposed into sub-modules to be executed as multiple computer processes, and, optionally, on multiple computers.
  • alternative embodiments may combine multiple instances of a particular module or sub-module.
  • software implementation of the computer program modules is described herein, these may alternatively be implemented as one or more hardware modules (such as field-programmable gate array(s) or applicationspecific integrated circuit(s)) comprising circuitry which implements equivalent functionality to that implemented in software.
  • quantum circuit decomposition system 200 is described above as having both classical and quantum computational functionalities, it is envisaged that embodiments may be implemented using solely quantum computational functionalities.
  • FIG.3 is a flow chart showing a method of quantum circuit decomposition according to an embodiment of the present invention.
  • the method 300 shown in FIG.3 is carried out by the quantum circuit decomposition system 200 shown in FIG.2.
  • step 302 the quantum circuit 100 is divided into a first sub circuit and a second sub circuit.
  • pre-processing and post-processing matrices (Vo and Vi) are determined.
  • Vh UV ⁇ o is most closely approximated by local unitary evolution on A and 8. That is, identify Vo and Vi such that there exists UA on A and UB on B in which VUUVto most closely approximates UA ® UB.
  • step 306 the gate decomposition of the decomposition of pre-processing and postprocessing unitary matrices is determined.
  • step 308 the various sub-problems are recombined to give a full circuit decomposition of U.
  • FIG.4 is a schematic diagram showing a variational quantum decoupling algorithm according to embodiments of the present invention.
  • our algorithm begins with two systems of n/2-qubits - corresponding to the upper layer 402 and the lower layer 404 of the n-qubit circuit 100 shown in FIG.4.
  • the two systems of n/2-qubits are labelled as a and /3.
  • Each layer is further divided into the 2 subsystems we wish to decouple, resulting in the 4 subsystems of dimensions CIA and 0-C B a H B ,p of dimensions CIB.
  • a shallow circuit approximation of an arbitrary 4-qubit gate where the structure of the ansatz is shown in FIG.6.
  • the circuit compilation is done via three stages. Stage one decouples the circuit into two generic 2-qubit gates, VA and VB. The second stage decouples these 2-qubit gates further into 4 single-qubit interactions. Finally, stage 3 then optimizes each of the four single-qubit gates.
  • FIG.5A shows a general unitary circuit and a FIG.5B is a graph showing results of variational compilation of the general 2-bit unitary circuit.
  • the method divides the circuit 500 into single single-qubit unitary Operators 510.
  • the division maximizes the fidelities.
  • the graph in FIG.5B shows the fidelity F compared between the direct compilation (broken lines) and our decoupling method (solid lines).
  • the training is repeated 20 times with different initializations.
  • the data of each method are divided into quartiles, and the lines represent the median of each process.
  • the second and third quartiles are shaded with the corresponding color.
  • the preprocessing ansatz is chosen to be the universal two- qubit circuit, and the post-processing is set to identity.
  • We see that the average fidelity does not increase during the decoupling stage, but greatly enhances training in the second stage by breaking up the problem into more tractable components.
  • the resulting compiled circuits have significantly higher fidelity, such that 1 - F is reduced by a factor of 3 over the state of the art.
  • FIG.6A shows a generic 4-bit unitary circuit
  • FIG.6B is a graph showing results of variational compilation of the generic 4-bit unitary circuit.
  • the optimization is divided into three phases.
  • the circuit 600 is divided into 3 types: 4-qubit ansatzes 602, 2-qubit ansatzes 604, and the middle single qubit gates 606. Similar to the 2-qubit case, the data of each process is collected from 20 independent training processes. The layers are repeated for 4 times for Vo, Vi, and the layers in the 2-qubit ansatzes VA,O, VB,O, VA,I, VB,I repeat twice.
  • the ansatzs are designed to explore stronger expressive power with a limited number of gates, which can be generalized to any number of qubits. In this case, our ansatz - being low depth - is non-universal. Nevertheless, we see that variation decoupling continues to achieve circuits of higher fidelity.
  • FIG.7A, FIG.7B and FIG.8 show an analysis of a third scenario where target 4-qubit unitaries can be expressed by our shallow circuit.
  • FIG.7A shows a 4-qubit unitary circuit that is generated by a spindle-shaped circuit
  • FIG.7B is a graph showing results of variational compilation of the 4-bit unitary circuit.
  • the circuit 700 is divided into 3 types: 4-qubit ansatzes 702, 2-qubit ansatzes 704, and the middle single qubit gates 706.
  • the ansatzes Vo, Vi, and VA,O, VB,O, VA, T, VB, I are not repeated, and each of them only contains one layer of CNOT gates.
  • FIG.7B is a graph showing raw data for the results shown in FIG.7B.
  • our decoupling method continues can reach a circuit fidelity of 0.998 vs 0.9 in using conventional methods.
  • a linear map r from a system X to system Y is called a quantum channel if it maps a density operator in X to a density operator in Y.
  • Such property of the linear maps is usually broken into two constraints: 1 . the map is completely positive (CP), and 2. the map is trace-preserving (TP).
  • a map FJ -> Y is CP if, for all ancillary system maps positive semidefinite operators p e X ® c/Z to positive semidefinite operators
  • the Choi-Jamiolkowski operator is one of the most commonly used representations of quantum channels. For each quantum channel T , its Choi- Jamiolkowski operator / r is unique.
  • a linear map r is a quantum channel if and only if J r is positive semidefinite (
  • the Choi-Jamiolkowski operator also provides a convenient way to represent the input states and the measurements on the outputs of the quantum channels:
  • FIG.9 shows a conventional swap test circuit. It is known that the purity, Tr[p 2 ], of a state p can be measured with a swap test efficiently. With the ability to perform a controlled swap between two copies of p, the value of Tr[p 2 ] is proportional to the probability of measuring 0 in the circuit of FIG.9. Alternatively, the measurement of purity can be done with pair-wise Bell measurements instead of the controlled swap test. This is done by a bit-wise bell measurement on a pair of systems as shown in FIG.10
  • FIG.10 shows a destructive swap test circuit.
  • the destructive swap test is more practical than the conventional swap test.
  • the control qubit must maintain a strong quantum correlation with all qubits that are been swapped.
  • each pair of qubits is measured separately, and the computation of purity only requires classical correlations between the measurement outcomes.
  • transpose is a Hermitian-preserving trace-preserving linear map on operators, it has a unique affine decomposition in terms of the Pauli operators: p T Xz 1 ,z 2 (-l) Z1 ' Z2 CTz 1 ,z 2 pCTz 1 ,z 2 (9)
  • Tr[p 2 ] can be obtained with a simple classical postprocessing, where after each measurement, (-1) Z1 ' Z2 is computed, whose mean is the value of [p 2 ] .
  • This procedure is equivalent to the evaluation of the expected value of the observable
  • This can be easily extended to multi-qubit systems, where the Bell measurements are performed pairwisely between the two copies of the same state.
  • the measurement results are given by the Boolean vectorsz! and z 2 e B ra , where the ith element of each vector corresponds to the measurement outcome of the ith pair of qubits.
  • the multi-qubit Bell states are given by are the Bell states on ith qubit.
  • Theorem 4 The observable 5 in Theorem 3 is the swap operator between the two copies of p.
  • Theorem 5 Given an observable 0 defined for 2-copies o f if(p) e M, and consider the expectation value £(p) with respect to a channel Tl that p p The Haar average of E can be evaluated by measuring 0 on a single initial state T e Jf® 2 , such that T can be prepared with a constant depth quantum circuit and a linear time classical pre-processing.
  • the Haar average of the input state is a projector state that where n s is invariant under swap.
  • T To prepare the projector state T, it is sufficient to find a basis of the projected space and then uniformly random sample the basis states
  • the preparation of state n s /tr[n s ] is reduced to uniformly random sample and z 2 such that z r • z 2 is even, and according to each pair of z v z 2 , prepare state
  • FIG.11 shows a circuit that prepares Bell states. Similar to the Bell measurement, the preparation of Bell states only requires two layers of quantum gates. Although some subtle optimization may be used to sample the desired classical bits and z 2 , a naive rejective sampling can already uniformly sample the even bits in time linear to the number of qubits. This can be achieved by uniformly random sampling all bits in z r and z 2 independently. Then resample the bits until z 1 ⁇ z 2 is even. The reject rate is less than 1/2 for all sizes of quantum circuits, as there 2 2n-1 + 2 n-1 pairs of z r and z 2 that z x ⁇ z 2 is even, and the total number of the configurations is 2 2n .
  • the parameter shift rule is widely used in variational quantum circuits for gradientbased optimization. It outperforms the finite difference method, which estimate f(0) ⁇ A6+A9p-r(e) w.t h a fj njte sma
  • the parameter shift rule says Proposition 6. For all observables A and all initial states p, the derivative of the expectation value
  • FIG.12 is a quantum circuit diagram showing the splitting of a parameterized quantum circuit into three parts.
  • W PU(Qi)Q.
  • This Haar average can be contracted to a single quantity that where d is the dimension of the global Hilbert space.
  • C D requires two copies of a target unitary U, whose acts on the system A 0 B.
  • the average linear entropy, denoted L is given by where S A (S B ) is the swap operator between the output systems A t and A 2 , (or B systems respectively), and the identity operators ll z1 , ll B are also defined on the system A r 0 A 2 or B r 0 B 2 respectively.
  • each of the terms is the 2-norm of the Schmidt coefficients of ⁇ ip), which only depends on the partitioning of the system. Specifically,
  • P 2 is strongly related to the gate fidelity between U and U A ® U B .
  • P ⁇ and P 5 are equivalent to the expectation value of S A 01 B and I A 0 S B respectively with completely mixed state as input. That is
  • the quantity of P 3 here is related to the extended unitary u' as defined in equation (48). where the first equality comes from the fact that both S z1 - and V are only supported on A ® A and C ® C, but not A ® C and C ® A, and hence the J 1 ® / Ib ® c and J 1B ® C ® /' u terms are zero. Observe that, similar to the analysis of P 2 , the P 3 is the 2-norm of the Schmidt coefficients where the output systems A + and B are swapped in the first equality. In summary, we have (dj - d) d) (71 )
  • variational decoupling enhances existing approaches to circuit compilation - a key task in the design of quantum circuits in both near-term of future universal quantum computers.
  • variational decoupling enabled us to compile circuits realization of arbitrary two and four-qubit quantum gates to significantly higher fidelity.

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Abstract

Methods and systems for decomposing a quantum circuit are described A method of decomposing a quantum circuit comprises: dividing the quantum circuit into a first sub- circuit and second sub-circuit; determining a pre-processing unitary operator and a post-processing unitary operator which approximate local evolutions on the first sub- circuit and second sub-circuit; determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and using the gate decompositions of the pre-processing unitary operator and the post-processing unitary operator to determine a gate decomposition of the quantum circuit.

Description

METHODS AND SYSTEMS FOR DECOMPOSING A QUANTUM CIRCUIT
TECHNICAL FIELD
The present disclosure relates to quantum computing and in particular to decomposing quantum circuits for circuit compilation.
BACKGROUND
Quantum computing promises immense computational benefits from solving classically intractable problems to efficiently simulating quantum interactions. Yet, such tasks typically require the synthesis of complex n-qubit unitary operations using elementary quantum gates. While systematic decomposition techniques exist, all such generic solutions require gate counts that scale exponentially with n. To reduce such intractable realizations into a shallow circuit - even when possible - remains a highly intractable (NP Complete) task. Thus, quantum circuit compilation, which is the capacity to design a simpler circuit for implementing a given unitary process, is a pressing task; motivated by recent variation algorithms for quantum circuit discovery.
SUMMARY
According to a first aspect of the present disclosure, a method of decomposing a quantum circuit is provided. The method comprises: dividing the quantum circuit into a first sub-circuit and second sub-circuit; determining a pre-processing unitary operator and a postprocessing unitary operator which approximate local evolutions on the first sub-circuit and second sub-circuit; determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and using the gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator to determine a gate decomposition of the quantum circuit.
The method may further comprise decomposing the first sub-circuit and the second sub-circuit into smaller sub-circuits. The process may be repeated while limiting a gate depth of the quantum circuit. In an embodiment, determining gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator comprises parametrizing the preprocessing unitary operator and the post-processing unitary operator and minimizing a cost function.
The cost function may be a global cost function or a sum of local cost functions each restricted to a respective qubit.
In an embodiment, determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises a gradient descent method.
In an embodiment, determining decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises controlling a quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring a the cost function and its gradient using a destructive swap test. The entangled qubit pairs may be entangled via a CNOT gate. The destructive swap test may comprise applying CNOT and Hadamard gates.
According to a second aspect of the present disclosure, a computer readable medium storing processor executable instructions which when executed on a processor cause the processor to carry out a method as set out above is provided.
According to a third aspect of the present disclosure, a system for decomposing a quantum circuit is provided. The system is configured to: divide the quantum circuit into a first sub-circuit and second sub-circuit; determine a pre-processing unitary operator and a post-processing unitary operator which approximate local evolutions on the first sub-circuit and second sub-circuit; determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and use the gate decompositions of the pre-processing unitary operator and the post-processing unitary operator to determine a gate decomposition of the quantum circuit.
In an embodiment, the system is further configured to decompose the first sub-circuit and the second sub-circuit into smaller sub-circuits. In an embodiment, the system is further configured to limit a gate depth of the quantum circuit.
In an embodiment, the system is further configured to determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator by parametrizing the pre-processing unitary operator and the post-processing unitary operator and minimizing a cost function.
The cost function may be a global cost function or a sum of local cost functions each restricted to a respective qubit.
In an embodiment, the system is further configured to determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator by a gradient descent method.
In an embodiment, the system further comprises a quantum processing unit and is further configured to determine decompositions of the pre-processing unitary operator and the post-processing unitary operator by controlling the quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring the cost function and its gradient using a destructive swap test. The entangled qubit pairs may be entangled via a CNOT gate. The destructive swap test may comprise applying CNOT and Hadamard gates.
BRIEF DESCRIPTION OF THE DRAWINGS
In the following, embodiments of the present invention will be described as non-limiting examples with reference to the accompanying drawings in which:
FIG.1 is a schematic diagram showing quantum circuit decoupling according to an embodiment of the present invention;
FIG.2 is block diagram showing a quantum circuit decomposition system according to an embodiment of the present invention; FIG.3 is a flow chart showing a method of quantum circuit decomposition according to an embodiment of the present invention;
FIG.4 is a schematic diagram showing a variational quantum decoupling algorithm according to embodiments of the present invention;
FIG.5A shows a general 2-bit unitary circuit and its decomposition;
FIG.5B is a graph showing results of variational compilation of the general 2-bit unitary circuit shown in FIG.5A;
FIG.6A shows a generic 4-bit unitary circuit;
FIG.6B is a graph showing results of variational compilation of the generic 4-bit unitary circuit shown in FIG.6A;
FIG.7A shows a 4-qubit unitary circuit that is generated by a spindle-shaped circuit;
FIG.7B is a graph showing results of variational compilation of the 4-bit unitary circuit shown in FIG.7A;
FIG.8 is a graph showing raw data for the results shown in FIG.7;
FIG.9 is a quantum circuit diagram showing a conventional swap test;
FIG.10 is a quantum circuit diagram showing a destructive swap test;
FIG.11 is a quantum circuit diagram showing a circuit that prepares Bell state; and
FIG.12 is a quantum circuit diagram showing the splitting of a parameterized quantum circuit into three parts.
DETAILED DESCRIPTION In the present disclosure variation circuit decoupling is proposed. Variational circuit decoupling is a divide-and-conquer approach that enhances variational circuit algorithms. The procedure involves designing a variational decoupling algorithm that first breaks a many-qubit interaction into smaller components. We can then optimize these smaller components individually or break them down further via recursive applications of variational decoupling. We demonstrate the method for compiling circuits approximating arbitrary two and four-qubit gates, where it identifies circuits of much higher fidelities than direct variational methods.
When studying a system of coupled harmonic oscillators, a key approach is to decouple its dynamics into various normal modes. We can then study each mode individually, enabling a deeper understanding of underlying dynamics. In the era of computer simulation, this divide-and-conquer approach has further operational importance, enabling leverage of parallel processing, and reducing the computational costs of simulation or optimization. Decoupling complex systems into simpler components has seen success in diverse settings, from modeling the motion of human hands to hydraulic simulation.
FIG.1 is a schematic diagram showing quantum circuit decoupling according to an embodiment of the present invention. As shown in FIG.1 , an unknown unitary quantum process U 100 is decoupled into smaller components.
We adopt the premise of variational quantum circuit discovery, where we are given black-box access to some unknown n-qubit unitary quantum process U. This could represent a complex quantum circuit we wish to simplify; some unknown quantum device we wish to reverse-engineer, or some natural quantum process we wish to simulate. Our goal is to approximate this process with a sequence of elementary quantum gates - subject perhaps to constraints on circuit complexity or depth. Systematic solutions to this problem are clearly intractable. Process tomography to determine the matrix elements of U alone would scale exponentially with n, as would any general method of decomposing U into elementary gates. Quantum-aided variational approaches aid in accelerating the process by use of quantum computers themselves. They typically involve two components: (a) An ansatz, a family of quantum circuits W(6) parameterized by some k-dimensional vector 0 = (9o, . . . , 9k-i), and (b) A cost function C that that measures the performance loss of each candidate circuit in approximating W. The goal is to identify the parameter set 0 so that the corresponding circuit W(0) has a minimal cost. 0 corresponds to easily adjustable parameters of some proposed circuit architectures (e.g. magnitude of rotations on various single-qubit gates), such that knowledge of 6 allows the physical synthesis of the associated quantum circuit W(9). Meanwhile, the cost function is generally chosen to be normalized (takes a maximum value of 1 ) with the following properties:
Measurable and Gradient Measurable, such that C(W) and each partial derivative ^-C can be efficiently estimated, i.e., they each can be determined to target precision
E using at most poly(n, 1/ e) calls to IV and classical computing costs that scale efficiently with n.
Faithful, such that C is non-negative, and C(W) = 0 if and only if no general n-qubit quantum circuit are preferred over HZ.
For example, 1 - F(u, f/)is a natural candidate for the cost function, where F(u, U~)\s the gate fidelity of the synthesize unitary U with respect to the target unitary U. This then allows gradient descent-based methods to find 9 within the parameterized circuit to minimize the cost. However, the rate at which variational circuits converge can become severely limited due to barren plateaus especially in scenarios where circuits being optimized over had no constraints.
As shown in FIG.1 , given a target complex unitary quantum operation U, the decoupling of U involves identifying shallow pre and postprocessing operation Vo and Vi, such that U ~ VI(UA ® UB)VO, for some operators UA and UB which act locally on subsystems A and B respectively. This procedure can be repeated recursively, breaking down UA and UB into smaller components, until all subsystems are sufficiently small. Take a 4-qubit system for example, the target unitary operator U is first decomposed by Vo and Vi into local operators on subsystems A, B, and the local operator UA (UB) is further decomposed by VXoand VA,I (VB,O and VB,I) into single qubit unitary operators (UAA, UAB, UBA, and UBB).
FIG.2 is block diagram showing a quantum circuit decomposition system according to an embodiment of the present invention. The quantum circuit decomposition system 200 is a computer system with memory that stores computer program modules which implement methods of decomposing a quantum circuit according to embodiments of the present invention.
The quantum circuit decomposition system 200 comprises a processor 210, a working memory 212, a user interface 214, a network interface 216, a quantum processing unit interface 218, program storage 220, and a quantum processing unit 230. The processor 210 may be implemented as one or more central processing unit (CPU) chips. The program storage 220 is a non-volatile storage device such as a hard disk drive which stores computer program modules. The computer program modules are loaded into the working memory 212 for execution by the processor 210. The user interface 214 is an interface which allows data and controls to be input by a user and also allows the user to receive outputs such as the results of methods of decomposing a quantum circuit. The network interface 216 is a wired or wireless network interface which allows the quantum circuit decomposition system 200 to send an receive data over a network such as the internet. The quantum processing unit interface 218 controls the quantum processing unit 230. The quantum processing unit 230 allows the quantum circuit decomposition system 200 to manipulate qubits to carryout quantum processing. As shown in FIG.2, the quantum processing unit 230 carries out quantum processing on the quantum circuit 100 which is to decomposed using methods described in the present disclosure. The quantum processing unit 230 may be configured to allow quantum circuits to be attached such that the qubits input into the quantum circuit and output from the quantum circuit can be generated and processed by the quantum processing unit 230.
The program storage 220 stores a quantum circuit decomposition program 222. The quantum circuit decomposition program 222 causes the processor 210 to execute various methods of decomposing a quantum circuit which are described in more detail below. The program storage 220 may be referred to in some contexts as computer readable storage media and/or non-transitory computer readable media. As depicted in FIG.2, the quantum circuit decomposition program 222 is a distinct module which performs respective functions implemented by the quantum circuit decomposition system 200. It will be appreciated that the quantum circuit decomposition program 222 may be implemented as multiple modules and the boundaries between these modules are exemplary only, and that alternative embodiments may merge modules or impose an alternative decomposition of functionality of modules. For example, the program discussed herein may be decomposed into sub-modules to be executed as multiple computer processes, and, optionally, on multiple computers. Moreover, alternative embodiments may combine multiple instances of a particular module or sub-module. It will also be appreciated that, while a software implementation of the computer program modules is described herein, these may alternatively be implemented as one or more hardware modules (such as field-programmable gate array(s) or applicationspecific integrated circuit(s)) comprising circuitry which implements equivalent functionality to that implemented in software.
While the quantum circuit decomposition system 200 is described above as having both classical and quantum computational functionalities, it is envisaged that embodiments may be implemented using solely quantum computational functionalities.
FIG.3 is a flow chart showing a method of quantum circuit decomposition according to an embodiment of the present invention. The method 300 shown in FIG.3 is carried out by the quantum circuit decomposition system 200 shown in FIG.2.
In step 302, the quantum circuit 100 is divided into a first sub circuit and a second sub circuit. We adopt a divide-and conquer approach. Instead of attempting to learn a circuit decomposition for the entirety of U, we break the circuit down into a series of smaller circuits as illustrated in FIG.1. Specifically, we first divide n-qubit system into two subsystems A and 8 of approximately equal size (i.e., of size [n/2] and [n/2]).
In step 304, pre-processing and post-processing matrices (Vo and Vi) are determined. We identify decomposition of pre-processing and post-processing unitary matrices such that Vh UV^o is most closely approximated by local unitary evolution on A and 8. That is, identify Vo and Vi such that there exists UA on A and UB on B in which VUUVto most closely approximates UA ® UB.
In step 306, the gate decomposition of the decomposition of pre-processing and postprocessing unitary matrices is determined. We document below a variational means to learn gate decomposition for Vo and Vi without needing any knowledge of unitary operators UA and UB. After which, we may repeat the decoupling method on each of the localized unitary gates, breaking each of them down into two smaller gates on « n/4 qubits (that is the method may return to step 302 in which each sub circuit is divided into smaller sub circuits). This can proceed until all localized operators are sufficiently small for conventional variational methods (e.g. a single qubit).
Finally in step 308, the various sub-problems are recombined to give a full circuit decomposition of U.
FIG.4 is a schematic diagram showing a variational quantum decoupling algorithm according to embodiments of the present invention. As shown in FIG.4, to decouple an n-qubit circuit 100, our algorithm begins with two systems of n/2-qubits - corresponding to the upper layer 402 and the lower layer 404 of the n-qubit circuit 100 shown in FIG.4. The two systems of n/2-qubits are labelled as a and /3.
Each layer is further divided into the 2 subsystems we wish to decouple, resulting in the 4 subsystems
Figure imgf000011_0001
of dimensions CIA and 0-CB a HB,p of dimensions CIB.
We apply W = VU UV^o to each of subsystem a and /3. The input state is initialized as
TA®TB where rk - is the projector to the symmetric subspace of
Figure imgf000011_0002
® Hk p for k e {4, B}. This is done by first preparing each qubit in
Figure imgf000011_0003
a and Nkp in a random computational basis and state, followed by qubit-wise application of the Hadamard gate for each /3-layer qubit. Each qubit is then entangled with a corresponding qubit in Mk a via a CNOT gate 406. Meanwhile, we can efficiently measure cost function CD and its gradient using a destructive swap test - which similarly involves only qubit-wise CNOT and Hadamard gates, followed by projective measurement 408. This information can then be used to tune 9o and 01 using techniques from variational circuits in the quantum circuit decomposition system 200. The key behind the variational decoupling algorithm is to find an appropriate cost function. First, let V e the parametrizations of the circuits Ko and V
Figure imgf000012_0007
± with respective parameters 9
Figure imgf000012_0008
± 2 Meanwhile set W as the resulting
Figure imgf000012_0009
quantum process formed by pre and postprocessing of U. Since we can always engineer W given
Figure imgf000012_0010
and Vr, we can define our cost function concerning W alone for convenience. Here we desire a normalized cost function that (i) is faithful, such that
Figure imgf000012_0004
and (ii) exhibits both self and gradient measurability. Namely consider:
Figure imgf000012_0001
ntropy and the integration is taken over Haar random initial states \ip)A on A and |0>B on B. This cost function is faithful. That is Csep(W) = 0 if and only if W the equivalent to the identity or the swap gate up to local unitary gates. Moreover, we develop efficient methods to measure both its value and its gradients.
To efficiently measure Csep, we developed a method using a circuit with twice the size of W, illustrated in FIG.4. The initial stat
Figure imgf000012_0005
) in FIG.4 is defined as
Figure imgf000012_0006
where dk is the dimension of the system
Figure imgf000012_0002
and Ps is the projector to the symmetric subspace of
Figure imgf000012_0003
This state can be prepared with a constant depth of quantum circuit with gate determinations efficiently achievable through a classical process. The estimation error of the cost function is bounded by the Hoeffding’s inequality since the cost function embodies the mean of a random variable based on the measurement outcomes. Using this technology we can then proceed with variational decoupling by choosing appropriate ansatzes
Figure imgf000013_0001
such that IV is parameterized by the joint vector 9* ==
Figure imgf000013_0002
® 0X* . For each candidate VQ(0O) and 14(01) > we can construct a realization of IV, and use above methods to efficiently measure Csep and its various gradients, and thus employ gradient-descent-based optimization method to find suitable 70 and V1 that decouples U. Note that, just as in standard circuit compilation, we may also choose to limit the gate depth of Vo and V± should we wish for shallow circuit approximations of U.
Performance Comparisons
In the following section we demonstrate the improved efficacy of our decoupling method in two distinct scenarios:
The exact compilation of a general 2-qubit gate - where the ansatz is shown in FIG.5. Here, the circuit family is universal, and can theoretically synthesize any 2-qubit unitary operator. Our decoupling algorithm breaks this into two stages. The first decouples U into two single qubit circuits. The second stage then optimizes these circuits. Note that in this special case, we have set Vi = I, since this is already sufficient for compiling an arbitrary 2-qubit gate.
A shallow circuit approximation of an arbitrary 4-qubit gate, where the structure of the ansatz is shown in FIG.6. For both Vo and Vi, we utilize four layers of decoupling circuit, where each layer comprises a shallow circuit and single qubit and control gates. The circuit compilation is done via three stages. Stage one decouples the circuit into two generic 2-qubit gates, VA and VB. The second stage decouples these 2-qubit gates further into 4 single-qubit interactions. Finally, stage 3 then optimizes each of the four single-qubit gates.
FIG.5A shows a general unitary circuit and a FIG.5B is a graph showing results of variational compilation of the general 2-bit unitary circuit.
As shown in FIG.5A, the method divides the circuit 500 into single single-qubit unitary Operators 510. The division maximizes the fidelities. The graph in FIG.5B shows the fidelity F compared between the direct compilation (broken lines) and our decoupling method (solid lines). For each method, the training is repeated 20 times with different initializations. The data of each method are divided into quartiles, and the lines represent the median of each process. The second and third quartiles are shaded with the corresponding color. The preprocessing ansatz is chosen to be the universal two- qubit circuit, and the post-processing is set to identity. We see that the average fidelity does not increase during the decoupling stage, but greatly enhances training in the second stage by breaking up the problem into more tractable components. The resulting compiled circuits have significantly higher fidelity, such that 1 - F is reduced by a factor of 3 over the state of the art.
FIG.6A shows a generic 4-bit unitary circuit and FIG.6B is a graph showing results of variational compilation of the generic 4-bit unitary circuit.
As shown in FIG.6A, the optimization is divided into three phases. The circuit 600 is divided into 3 types: 4-qubit ansatzes 602, 2-qubit ansatzes 604, and the middle single qubit gates 606. Similar to the 2-qubit case, the data of each process is collected from 20 independent training processes. The layers are repeated for 4 times for Vo, Vi, and the layers in the 2-qubit ansatzes VA,O, VB,O, VA,I, VB,I repeat twice. The ansatzs are designed to explore stronger expressive power with a limited number of gates, which can be generalized to any number of qubits. In this case, our ansatz - being low depth - is non-universal. Nevertheless, we see that variation decoupling continues to achieve circuits of higher fidelity.
In each setting, we select target U at random according to the Haar measure. The former scenario represents the case where we have a universal circuit ansatz and which to exactly compile a unitary. The latter represents the scenario where we wish to use a shallow circuit with limited expressivity to approximate an arbitrary 4-qubit gate. We benchmark our method against standard variational approaches, where all circuit parameters are optimized by gradient descent to maximize the gate fidelity F simultaneously. In the standard approach, this optimization is done by minimizing a cost function CHST or the localized cost function CLHST. Here CHST =
Figure imgf000015_0001
CHST are faithful measures that reach 0 when F approaches 1 . The C^T are the cost function CHST restricted to the /th qubit. For a fair comparison, all methods use the same circuit parameterization and thus have identical expressivity and all are trained using the ADAM method described in Diederik P. Kingma and Jimmy Ba. Adam: A Method for Stochastic Optimization, January 2017 with identical hyper-parameters. The results are shown in FIG.5B (2- qubit) and FIG.6B (4-qubit). In both cases, performance is gauged by how F(Uf U) improves, i.e., the fall of CHST with the number of training iterations. We see that:
In 2-qubit gate decomposition, our decoupling approach converges a lot more quickly. For example, it achieves a fidelity of 0.9999 using the same amount of time where conventional methods approach a fidelity of 0.999.
In shallow circuit approximation of general 4-qubit gates, our decoupling method reaches circuit fidelity around 0.7, significantly ahead of conventional methods which achieves a fidelity of around 0.5. Note that high fidelity values are not expected here as our ansatz - being shallow - has limited expressivity.
FIG.7A, FIG.7B and FIG.8 show an analysis of a third scenario where target 4-qubit unitaries can be expressed by our shallow circuit.
FIG.7A shows a 4-qubit unitary circuit that is generated by a spindle-shaped circuit and FIG.7B is a graph showing results of variational compilation of the 4-bit unitary circuit. Similar to the ansatz described above with reference to FIG.6A, the circuit 700 is divided into 3 types: 4-qubit ansatzes 702, 2-qubit ansatzes 704, and the middle single qubit gates 706. However, the ansatzes Vo, Vi, and VA,O, VB,O, VA, T, VB, I are not repeated, and each of them only contains one layer of CNOT gates.
As can be seen from the graph in FIG.7B, if the 4-qubit unitary is generated by a circuit with a similar structure as our ansatz, our method can achieve a higher fidelity. FIG.8 is a graph showing raw data for the results shown in FIG.7B. Here our decoupling method continues can reach a circuit fidelity of 0.998 vs 0.9 in using conventional methods.
In all cases, conventional variational circuits exhibit steady gate fidelity gain till some saturation point. Our decoupling method, on the other hand, only minimizes CLHST in the final stage. Previous stages concentrate on decoupling the unitary and do not immediately improve gate fidelity. However, once decoupled, convergence to a low CHST occurs very quickly - more than compensating for the delayed start. Moreover, the final fidelity obtained shows marked improvement for both exact gate decomposition and shallow circuit approximation.
In the quantum theory, the states of a quantum system are described by the density operators p that act on a Hilbert space X, such that the operators p are positive semidefinite and tr[p] = 1. A linear map r from a system X to system Y is called a quantum channel if it maps a density operator in X to a density operator in Y. Such property of the linear maps is usually broken into two constraints: 1 . the map is completely positive (CP), and 2. the map is trace-preserving (TP). A map FJ -> Y is CP if, for all ancillary system
Figure imgf000016_0003
maps positive semidefinite operators p e X ® c/Z to positive semidefinite operators A map is TP if it preserves the trace of
Figure imgf000016_0002
operators, such that tr[r(p)] = tr[p] for all operators defined on X. For convenience, we usually investigate these two constraints with the matrix representations of the linear maps. The Choi-Jamiolkowski operator is one of the most commonly used representations of quantum channels. For each quantum channel T , its Choi- Jamiolkowski operator /r is unique.
Definition 1. The Choi-Jamiolkowski operator Jr of a linear map
Figure imgf000016_0001
-» Y is defined as where is a copy of X, and |i) forms a basis of X.
Figure imgf000016_0004
The properties of CP and TP can be characterized easily with Choi-Jamilkowski operators: Theorem 1. A linear map r is a quantum channel if and only if Jr is positive semidefinite (
Figure imgf000017_0001
The Choi-Jamiolkowski operator also provides a convenient way to represent the input states and the measurements on the outputs of the quantum channels:
Theorem 2. Given quantum state p defined on X, an observable 0 defined on Y, and a quantum channel T: X -> Y, the expectation value of 0 with respect to r(p) is given by
Figure imgf000017_0002
r
In the scope of this disclosure, we will focus on the endomorphisms of a system X, which are those linear maps T: X X whose output system is identical to the input system. More specifically, we will focus on the quantum channels that are induced by unitary operators, namely unitary channels. Let U denote the unitary channel with respect to a unitary operator U acts on X, such that [/(•) = U(/)Ut Then the Choi- Jamiolkowski operator of 'll is given by
Figure imgf000017_0003
which is a rank-one projector. For a given unitary U, there is a unique |I|J) (up to a global phase), such that Ju - |I|J) <I|J| . In the special case that U = I, the state is the unnormalized maximally entangled state |’P+) . According to the TP property of quantum channels, | I where d is the dimension of X.
Figure imgf000017_0004
Measurements and State Preparation
FIG.9 shows a conventional swap test circuit. It is known that the purity, Tr[p2], of a state p can be measured with a swap test efficiently. With the ability to perform a controlled swap between two copies of p, the value of Tr[p2] is proportional to the probability of measuring 0 in the circuit of FIG.9. Alternatively, the measurement of purity can be done with pair-wise Bell measurements instead of the controlled swap test. This is done by a bit-wise bell measurement on a pair of systems as shown in FIG.10
FIG.10 shows a destructive swap test circuit. For large quantum systems, the destructive swap test is more practical than the conventional swap test. In the conventional scheme, the control qubit must maintain a strong quantum correlation with all qubits that are been swapped. However, in the destructive swap test, each pair of qubits is measured separately, and the computation of purity only requires classical correlations between the measurement outcomes. In summary,
Theorem 3. The purity of a state p can be measured as an observable S, where Tr[p2] = Tr[p ® pSJ , such that the evaluation can be measured with a constant depth quantum circuit and a linear time classical post-processing.
Proof. The proof starts from the single-qubit case, where p acts on C2.Let |'P+) == C|00> + |11) ), the projective measurement in the circuit shown in FIG.10 is given by the projectors that project to
Figure imgf000018_0001
where a and b take values from {0,1}, which are the result of the measurement on each subsystem. This is exactly the Bell basis, and hence the measurement is commonly known as the Bell measurement. The Bell basis can be rewritten as
Figure imgf000018_0002
where
Figure imgf000018_0003
are the Pauli operators:
I = °0,0’ ax = °l,0> °Z = °0,l’ °Y = °1,1 ■
This alternative form is derived from the identity, where for all operators A, B acting on C2, A ® B |T+) - (ABT>) ® |T+). (6)
As the result, the probability of obtaining measurement outcome (z1;z2) in the destructive swap test is given by
Figure imgf000019_0001
which uses the fact that Pauli operators are Hermitian. By applying equation (6) to the second copy of p, together with the definition of |'P+),
Figure imgf000019_0002
As the transpose is a Hermitian-preserving trace-preserving linear map on operators, it has a unique affine decomposition in terms of the Pauli operators: pT Xz1,z2(-l)Z1'Z2 CTz1,z2 pCTz1,z2 (9)
Also, since transpose is an involution, we may interchange p with pT in equation (9). As a result,
Figure imgf000019_0003
This indicates that the value of Tr[p2] can be obtained with a simple classical postprocessing, where after each measurement, (-1)Z1'Z2 is computed, whose mean is the value of [p2] . This procedure is equivalent to the evaluation of the expected value of the observable
Figure imgf000019_0004
This can be easily extended to multi-qubit systems, where the Bell measurements are performed pairwisely between the two copies of the same state. In this scenario, the measurement results are given by the Boolean vectorsz! and z2 e Bra, where the ith element of each vector corresponds to the measurement outcome of the ith pair of qubits. The multi-qubit Bell states are given by
Figure imgf000020_0001
Figure imgf000020_0002
are the Bell states on ith qubit. The probability of each measurement outcome is given by
Figure imgf000020_0003
where aZ1/Z2 == ®;(jz. i/Z 2.By applying identity (6) to all qubits simultaneously,
Figure imgf000020_0004
Since the transpose of a n-qubit state is equivalent to partial transpose each qubit,
Figure imgf000020_0005
05) where z± ■ z2 ■■= ^z^ ■ zi2. The purity can be expressed as
Figure imgf000020_0006
That is, to measure the purity, one Bell measurement is applied to each pair of qubits. After the outcomes are obtained, the value (-1)Z1 Z2 is computed, whose mean is the value of Tr[p2]. As the Bell measurements are independent, all of them can be done simultaneously within two layers of quantum gates. The post-processing is a simple parity checking, whose complexity grows linearly with the number of qubits. The corresponding observables are
Figure imgf000021_0001
Theorem 4. The observable 5 in Theorem 3 is the swap operator between the two copies of p.
Proof. To check that Sn is indeed the swap operator between the two copies of p, we first notice that Sn can be expressed as two terms:
Figure imgf000021_0002
As Bell states
Figure imgf000021_0003
are orthogonal to each other, the two terms are (unnormalized) orthogonal projectors. As discussed in the proof of the Theorem 3, the Bell basis can be expressed as
Figure imgf000021_0004
By swapping the two subspaces
Figure imgf000021_0005
That is, is symmetric if
Figure imgf000021_0006
• z2 - 0, and is anti-symmetric if it is 1 . By counting the dimension of the symmetric subspace, it is easy to show that those
Figure imgf000021_0007
with 0 form a complete basis of the symmetric subspace, and ns := s the projector to the symmetric subspace. Similarly, those with
Figure imgf000022_0004
z1 • z2 = 1 form a complete basis of the anti-symmetric subspace, and the second term, denoted 11,4 , is the projector to the anti-symmetric subspace. As a result, Sn - ns - nzl is the swap operator, which preserves the symmetric subspace and provides a -1 phase to the anti-symmetric subspace.
Theorem 5. Given an observable 0 defined for 2-copies o
Figure imgf000022_0007
f if(p) e M, and consider the expectation value £(p) with respect to a channel Tl that
Figure imgf000022_0006
p p The Haar average of E can be evaluated by measuring 0 on a single
Figure imgf000022_0005
initial state T e Jf®2 , such that T can be prepared with a constant depth quantum circuit and a linear time classical pre-processing.
Proof. The average
Figure imgf000022_0001
where p^ = |ip) <i//| is distributed according to the Haar measure. As the input state
IVOIVO is symmetric at all instances, the Haar average of the input state is a projector state that
Figure imgf000022_0002
where ns is invariant under swap. To prepare the projector state T, it is sufficient to find a basis of the projected space and then uniformly random sample the basis states Thus the preparation of state ns/tr[ns] is reduced to uniformly random sample and z2 such that zr • z2 is even, and according to each pair of zvz2, prepare state
Figure imgf000022_0003
And the states I^^Jcan be prepared by applying the circuit shown in FIG.11 to classical states |z1)|z2) pairwisely.
FIG.11 shows a circuit that prepares Bell states. Similar to the Bell measurement, the preparation of Bell states only requires two layers of quantum gates. Although some subtle optimization may be used to sample the desired classical bits
Figure imgf000023_0001
and z2, a naive rejective sampling can already uniformly sample the even bits in time linear to the number of qubits. This can be achieved by uniformly random sampling all bits in zr and z2 independently. Then resample the bits until z1 ■ z2 is even. The reject rate is less than 1/2 for all sizes of quantum circuits, as there 22n-1 + 2n-1 pairs of zr and z2 that zx ■ z2 is even, and the total number of the configurations is 22n.
Combining Theorem 3 and Theorem 5, we have the average linear entropy L of the output of a channel If:
Figure imgf000023_0002
This argument can be applied to the case where L is defined for a subsystem. Given the total space J-C is decomposed into
Figure imgf000023_0003
, the average linear entropy of the output of a channel U on subsystem A is given by
Figure imgf000023_0004
As the purity Tr[p2] is obtained from classical post-processing, the purity of each subsystem can be obtained simultaneously, with the same set of measured data. That is, for any partition of the qubits encoding p , all of the values of 7'rlYp'4)2] and Tr[(pB)2] together with the Tr[p2] can be obtained with one shot of measurements on the quantum circuit. This property means that our cost function
Figure imgf000024_0001
can be evaluated with a single shot of measurements on the quantum circuit, and a linear time classical post-processing.
Parameter Shift Rule
Preliminary
The parameter shift rule is widely used in variational quantum circuits for gradientbased optimization. It outperforms the finite difference method, which estimate f(0) ~ A6+A9p-r(e) w.th a fjnjte sma|| nun-jber A0;. In the finite difference method, 39/ A9; 1 as the denominator A0; is small, the difference of f is a small number, which is relatively sensitive to the noises. But, with the parameter shift rule, the gradient can be estimated directly, which is less sensitive to perturbations as long as the gradient is non-varnishing.
The usual parameter shift rule is based on the idempotent properties of Hermitian ■9i generators. Let us consider a single-parameterized unitary t/(0j) = e“!TH that is generated by an idempotent Hermitian operator H that H2 = H. The parameter shift rule says Proposition 6. For all observables A and all initial states p, the derivative of the expectation value
Figure imgf000025_0001
Proof. The derivatives of the unitary operator and its conjugate are given by or p,
Figure imgf000025_0002
By matching the coefficients of the Taylor series, it can be shown that U(Bi~) - cos(0j/2) I — i sin(0j/2) H, and
— i[H, p] = — iHp + ipH
Figure imgf000025_0003
In summary, the derivative of the operator t t
Figure imgf000025_0004
The proposition is the direct result of equation (29).
Parameter Shift Rule for CD Here we show that a similar parameter shift rule can be derived for our cost function CD. Specifically, the derivative -^- CD can be evaluated by four terms, each of which can be evaluated by the same quantum circuit for evaluating CD . To simplify the notation in the following discussion, let Ue. denote the family of unitary channels that
Figure imgf000026_0001
The parameter shift rule of equation (29) can be rewritten as
Figure imgf000026_0002
Our cost function is defined by the expectation value of an observable 0
Figure imgf000026_0003
where the initial state p = TA ® TB, and W is a quantum circuit parameterized by 0.
In the design of the ansatz, for each parameter 0; , there is only one Pauli rotation gate that depends on 0; in 1¥(0). We may split the circuit W into three parts as in FIG.12.
FIG.12 is a quantum circuit diagram showing the splitting of a parameterized quantum circuit into three parts. For each parameter 0;, the parameterized circuit W can be split into three parts, where W = PU(Qi)Q. As there is only one Pauli rotation gate £7(0j) that depends on 0£, all gates before t/(0;) are collected in Q, and all gates after t/(0;) are collected in P. For convenience, we put all gates parallel to t/(0;) into Q.
Then
Figure imgf000026_0004
Let WQ and ll"e. denote the unitary channels corresponding to t/(0j) ® H and H ® t/(0i) respectively. And let P,Q denote the unitary channels corresponding to P®2andQ®2. Then the unitary evolution can be written as the composition of 4 unitary channels:
Figure imgf000027_0001
According to the product rule of derivatives,
Figure imgf000027_0002
As the Pauli rotations 67(0j) are generated by idempotent operators and satisfies the parameter shift rule of equation 29, the same property holds for lf'e. and U"9.. In conclusion, the derivative of our cost function is
Figure imgf000027_0003
This is the sum of 4 terms, each of which can be evaluated by the same method of evaluating CD(W) with a "parameter shift".
Relating decoupling cost to the gate fidelity
Characteristics of the gate fidelity The closeness of approximating U with UA ® UB is measured by the gate fidelity between U and UA ® UB, which is defined by
Figure imgf000028_0005
This Haar average can be contracted to a single quantity that
Figure imgf000028_0001
where d is the dimension of the global Hilbert space. Here {UA 0 UB, U) := ® UB)fU] denotes the Hilbert-Schmidt inner product between UA 0 UB and U.
Note that, the average fidelity is maximized when (UA 0 UB, U) is maximized. Let 'll be the unitary channel that 1/(-) =
Figure imgf000028_0002
and let UA and UB be the corresponding channels for UA and UB. Denote the Choi-Jamiolkowski matrix of a channel 'll by Ju. Then the inner product can be expressed as
Figure imgf000028_0004
As the Choi rank of unitary channels are all 1, we may rewrite the Choi operators as the outer products
Figure imgf000028_0003
Then
Figure imgf000028_0006
As \ip) is a vector in the Hilbert space, there exists a Schmidt decomposition such that
Figure imgf000028_0007
where Zk pk = (v|r|^) =
Figure imgf000029_0001
according to the normalization condition for quantum channels. As the result, the maximum value of \{UA ® UB, U)\2 is given by
Figure imgf000029_0002
Let qA k ■= (ijj/i l^/<) and qB k ■= (IJJB I't’/cX we have
Figure imgf000029_0003
According to the Cauchy-Schwartz inequality,
KIP/,III^I)|2 < llqJli ll^lli (44)
Given |^fc)and I4>fc) are orthonormal bases, llq^Hi =
Figure imgf000029_0004
= dB
As above inequalities hold for all 14^), |I|JB),
Figure imgf000029_0005
where the infinity norm HpH^ equals to the maximum Schmidt coefficient of \ip). The equality holds when \ipA} and \ipB} are proportional to the |^fe) and I4>fc) that corresponding to the maximum pk. However, this might not be achievable as |^fc) and I4>k) do not necessarily correspond to unitary operators.
In summary, for all UA ® UB, the gate fidelity is bounded by
1 1
— - < F(UA ® UB,U) < — — (llpIL + 1) < 1 d + 1 a + 1
(46) In other words
Figure imgf000030_0001
To fully understand the property of separability, we would like to explore the gate fidelity with respect to an alternative set. Without loss of generality, assuming the dimension of the system A, dA, is not larger than dB. Then we may extend the Hilbert space of A to A , whose dimension is the same as B, such that A = A ® C, where C is a dB - dA dimensional Hilbert space. We may extend U to construct a unitary operator in A+ , such that U = U ® /B0C. As the dimensions of A+ and B are the same, we may define the swap operator S between A+ and B. Now, we will focus on the gate fidelity
Figure imgf000030_0002
Let {qk} be the Schmidt coefficients of the Choi operator with respect to SU .
Then, with similar arguments as above, we have
Figure imgf000030_0003
Since dj > dAdB = d by assumption,
Figure imgf000030_0004
This quantity would be useful in the analysis of the decoupling cost.
Characteristics of the decoupling cost In this section, we show that the maximum gate fidelity Fmax related to the decoupling cost function CD, such that
Figure imgf000031_0001
The evaluation of CD requires two copies of a target unitary U, whose acts on the system A 0 B. We may label the systems as 41; A2,Blt B2, where one unitary acts on Ar 0 Blt and the other acts on A2 ® B2. In terms of the Choi-Jamiolkowski operator, the average linear entropy, denoted L, is given by
Figure imgf000031_0002
where SA (SB) is the swap operator between the output systems At and A2 , (or B systems respectively), and the identity operators llz1, llB are also defined on the system Ar 0 A2 or Br 0 B2 respectively.
This equality comes from Theorem 2, where the partial transposes from the formula are omitted, as Tk,llfe and 5fc are all invariant under the transpose. In this Choi representation, we need to distinguish the output systems and input systems, and thus there are 8 subsystems in the formula in total. We may label the subsystems as A^A^B^Bz for the input systems, and Ai ,A2 ,Br ,B2 for the output systems. Note that, the initial state rk - + 1), and the trace of the projector tr[P5] is
Figure imgf000031_0003
Figure imgf000031_0004
for the pair of systems (B1ZB2), where dA, dB are the dimension of system A^Bt respectively. Then each of the two terms in 2(1 - L) is divided into 4 terms:
Figure imgf000031_0005
Figure imgf000032_0001
For convenience, we label each term in the parenthesis as Pk in the order presented in equation (53), where k ranges from 1 to 8. That is
Figure imgf000032_0002
By changing the order of the tensor products and grouping the swap operators, we may rewrite each Pk in the form of tr[Sa 0 /p(/a1,p1 0 /«2,p2)] for some partitioning (a, p) of the four pairs the systems (Ap^) , (BI, B2) , This formula is equivalent to tr [satrp [/ai P1] 0 trp [/ct2,p2] ]
Figure imgf000032_0003
Given ju is a rank-1 operator, we can write it in its Schmidt decomposition \I/J) = l<P/c)a ® I Efc )p- After the partial trace of the p systems,
Figure imgf000032_0004
Then, by applying the swap and the trace
Figure imgf000033_0001
This result indicates that each term of the 8 terms is the 2-norm of the Schmidt coefficients of \tp} for some partitioning (a, p) of the system J11 acting on. That is saying, every term Pk is positive and upper bounded by the inner product of \t[P), which is d.
Now, we need to analyze each of the terms individually. First notice that each of the terms is the 2-norm of the Schmidt coefficients of \ip), which only depends on the partitioning of the system. Specifically,
Figure imgf000033_0002
As the result, by interchanging the subsystems a and p, the 8 terms can be grouped into 4 terms:
Figure imgf000033_0004
P2 is strongly related to the gate fidelity between U and UA ® UB. For P2, the partition (a, p) matches the partition (A B) in the analysis of the fidelity as in equation (41 ), which means P2 = p2.
P± and P5 are equivalent to the expectation value of SA 01B and IA 0 SB respectively with completely mixed state as input. That is
Pi = tr[(^ ® lB)W) ® W)]
Figure imgf000033_0003
where dA and dB are the dimensions of the subsystems At and B; respectively. Similarly, P5 = dAdB
In summary,
Figure imgf000034_0001
As the dimension of the whole system A 0 B is d = dAdB, we have
Figure imgf000034_0002
Which means
Figure imgf000034_0003
Now, we will substitute the definition CD = -^r^L to equation (63), where we assume dA 1 dA
A < dB u. Let then
Figure imgf000034_0004
Figure imgf000034_0005
d2 + d - P3-KCDd(d + 1 + dA + dB) (64)
Compared to the gate fidelity that
Figure imgf000034_0006
Figure imgf000035_0001
We may organize the terms to get
Figure imgf000035_0002
and
Figure imgf000035_0003
As d = dAdB > dA by assumption, we have,
Figure imgf000035_0004
and the above equation can be further simplified to
Figure imgf000035_0005
The quantity of P3 here is related to the extended unitary u' as defined in equation (48).
Figure imgf000035_0006
where the first equality comes from the fact that both Sz1- and V are only supported on A ® A and C ® C, but not A ® C and C ® A, and hence the J1 ® /Ib®c and J1B®C ® /'u terms are zero. Observe that, similar to the analysis of P2, the P3 is the 2-norm of the Schmidt coefficients
Figure imgf000036_0001
where the output systems A+ and B are swapped in the first equality. In summary, we have (dj - d) d) (71 )
Figure imgf000036_0002
Where F£ax is the maximum gate fidelity of the extended unitary SU' as defined in equation (48). Substituting this to equation (68), we have
Figure imgf000036_0003
In the case dA = dB, we have d = dB, and
Figure imgf000036_0004
and the extended unitary U is the same as U. It shows that the maximum gate fidelities Fmax and F£ax are jointly bounded by 1 - CD.
To obtain a neater but looser bound, we start from equation (68), then observe that P3 is positive, and Fmax < 1 such that
Figure imgf000036_0005
(74)
By combining the factors, we have
Figure imgf000037_0001
In the present disclosure, we have outlined a variational means to decouple complex quantum circuits. This is enabled by the proposal of an efficiently measurable cost function CD, that allows us to identify suitable pre- and post-processing circuits to decouple a 2n-qubit unitary to a tensor product of two n-qubit unitary operators. Through the recursive application, we illustrated how variational decoupling enhances existing approaches to circuit compilation - a key task in the design of quantum circuits in both near-term of future universal quantum computers. In benchmarks, variational decoupling enabled us to compile circuits realization of arbitrary two and four-qubit quantum gates to significantly higher fidelity. By setting the allowed depths of preprocessing and post-processing circuits, our decoupling method can be adapted to discovering circuits of varying expressivity, ranging from very shallow circuits for NISQ devices to deep circuits that represent general unitary operations.
Whilst the foregoing description has described exemplary embodiments, it will be understood by those skilled in the art that many variations of the embodiments can be made within the scope and spirit of the present invention.

Claims

1 . A method of decomposing a quantum circuit, the method comprising: dividing the quantum circuit into a first sub-circuit and second sub-circuit; determining a pre-processing unitary operator and a post-processing unitary operator which approximate local evolutions on the first sub-circuit and second subcircuit; determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator: and using the gate decompositions of the pre-processing unitary operator and the post-processing unitary operator to determine a gate decomposition of the quantum circuit.
2. The method according to claim 1 , further comprising decomposing the first subcircuit and the second sub-circuit into smaller sub-circuits.
3. The method according to claim 2, comprising limiting a gate depth of the quantum circuit.
4. The method according to any one of the preceding claims, wherein determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises parametrizing the pre-processing unitary operator and the post-processing unitary operator and minimizing a cost function.
5. The method according to claim 4, wherein the cost function is a global cost function.
6. The method according to claim 4, wherein the cost function is a sum of local cost functions each restricted to a respective qubit.
7. The method according to any one of claims 4 to 6, wherein determining gate decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises a gradient descent method.
8. The method according to any one of claims 4 to 7, wherein determining decompositions of the pre-processing unitary operator and the post-processing unitary operator comprises controlling a quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring the cost function and its gradient using a destructive swap test.
9. The method according to claim 8, wherein the entangled qubit pairs are entangled via a CNOT gate.
10. The method according to claim 8 or claim 9, wherein the destructive swap test comprises applying CNOT and Hadamard gates.
11. A computer readable medium storing processor executable instructions which when executed on a processor cause the processor to carry out a method according to any one of claims 1 to 10.
12. A system for decomposing a quantum circuit, the system being configured to: divide the quantum circuit into a first sub-circuit and second sub-circuit; determine a pre-processing unitary operator and a post-processing unitary- operator which approximate local evolutions on the first sub-circuit and second subcircuit; determine gate decompositions of the pre-processing unitary operator and the post-processing unitary operator; and use the gate decompositions of the pre-processing unitary operator and the post-processing unitary operator to determine a gate decomposition of the quantum circuit.
13. The system according to claim 12, being further configured to decompose the first sub-circuit and the second sub-circuit into smaller sub-circuits.
14. The system according to claim 13, being further configured to limit a gate depth of the quantum circuit.
15. The system according to any one of claims 12 to 14, being further configured to determine gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator by parametrizing the pre-processing unitary operator and the post-processing unitary operator and minimizing a cost function.
16. The system according to claim 15, wherein the cost function is a global cost function.
17. The system according to claim 15, wherein the cost function is a sum of local cost functions each restricted to a respective qubit.
18. The system according to any one of claims 15 to 17, being further configured to determine gate decompositions of the pre-processing unitary operator and the postprocessing unitary operator by a gradient descent method.
19. The system according to any one of claims 15 to 18, further comprising a quantum processing unit and being further configured to determine decompositions of the pre-processing unitary operator and the post-processing unitary operator by controlling the quantum processing unit to input entangled qubit pairs into the quantum circuit and measuring the cost function and its gradient using a destructive swap test.
20. The system according to claim 19, wherein the entangled qubit pairs are entangled via a CNOT gate.
21. The system according to claim 19 or claim 20, wherein the destructive swap test comprises applying CNOT and Hadamard gates.
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