WO2025115059A1 - Circuit board, semiconductor device, method for manufacturing circuit board, and method for manufacturing semiconductor device - Google Patents

Abstract

Provided is a circuit board in which adhesion strength between a resin and a metal plate can be improved and which can reduce a semiconductor device in size. The circuit board comprises an insulating plate and a metal plate. The metal plate is joined to the upper surface of the insulating plate. The metal plate includes a plurality of recesses provided on the surface of the metal plate. The minimum interval between the recesses adjacent to each other is 0.2 mm or less. The width of each of the plurality of recesses is 0.2 mm or less. The depth of each of the plurality of recesses is less than 0.05 mm.

Description

Circuit board, semiconductor device, method for manufacturing circuit board, and method for manufacturing semiconductor device

This disclosure relates to a circuit board, a semiconductor device, a method for manufacturing a circuit board, and a method for manufacturing a semiconductor device.

The semiconductor elements inside power semiconductor devices used in inverters and the like are bonded to the surface of a metal substrate that is placed on a ceramic substrate. On the surface of the metal substrate, areas where electronic components such as semiconductor elements and wiring are not mounted are sealed with a resin such as epoxy resin. The resin may peel off from the metal plate due to thermal stress during the manufacturing process of the semiconductor device or when the semiconductor device is in operation.

Patent Document 1 discloses a semiconductor device in which multiple holes are formed in a conductive plate to which a power semiconductor chip is bonded. The holes create an anchor effect, improving adhesion between the molded resin and the conductive plate.

JP 2021-39962 A

As demand for miniaturized power semiconductor devices increases, the spacing between multiple semiconductor elements and the distance between the semiconductor elements and the edge of the metal plate tend to shrink. This also reduces the space available for forming recesses to improve adhesion between the resin and the metal plate, making it difficult to ensure sufficient adhesive strength between the resin and the metal plate.

This disclosure has been made to solve the above problems, and aims to provide a circuit board that improves the adhesive strength between the resin and the metal plate and enables the miniaturization of semiconductor devices.

The circuit board according to the present disclosure includes an insulating plate and a metal plate. The metal plate is bonded to an upper surface of the insulating plate. The metal plate includes a plurality of recesses provided on the surface of the metal plate. The minimum distance between adjacent recesses is 0.2 mm or less. The width of each of the plurality of recesses is 0.2 mm or less. The depth of each of the plurality of recesses is less than 0.05 mm.

This disclosure provides a circuit board that improves the adhesive strength between the resin and the metal plate and enables the miniaturization of semiconductor devices.

　Objectives, features, aspects, and advantages of this disclosure will become more apparent from the following detailed description and accompanying drawings.

1 is a plan view showing a configuration of a circuit board according to a first embodiment. 1 is a cross-sectional view showing a configuration of a semiconductor device in a first embodiment. FIG. 4 is an enlarged plan view showing the configuration of a recess; FIG. 4 is a cross-sectional view showing a configuration of a recess. FIG. 13 is a diagram showing the relationship between the minimum distance between adjacent recesses and adhesive strength. 13 is a diagram showing the appearance of the metal plate and the resin part after a shear test. FIG. 13 is a diagram showing the appearance of the metal plate and the resin part after a shear test. FIG. FIG. 13 is a plan view showing a configuration of a circuit board in a first modified example of the first embodiment. FIG. 4 is an enlarged plan view showing the configuration of a recess; FIG. 11 is a cross-sectional view showing a configuration of a recess in a second modification of the first embodiment. FIG. 11 is a cross-sectional view showing a configuration of a recess in a second modification of the first embodiment. FIG. 11 is a cross-sectional view showing a configuration of a recess in a second modification of the first embodiment. 11 is a cross-sectional view showing a configuration of a recessed portion of a circuit board according to a second embodiment. FIG. FIG. 11 is a plan view showing a configuration of a circuit board in a third embodiment. 13 is a cross-sectional view showing a configuration of a recess in a circuit board according to a fourth embodiment. FIG. FIG. 13 is a plan view showing a configuration of a circuit board in a fifth embodiment.

<First embodiment>
Fig. 1 is a plan view showing the configuration of a circuit board 101 in embodiment 1. Fig. 2 is a cross-sectional view showing the configuration of a semiconductor device 201 in embodiment 1. Fig. 2 shows a cut surface taken along line AA' in Fig. 1.

The circuit board 101 includes an insulating plate 10, a metal plate 20, and a heat sink 30. The semiconductor device 201 includes a circuit board 101, a semiconductor element 40, and a resin part 50. The semiconductor device 201 is mounted on a power conversion device such as an inverter, for example.

The insulating plate 10 is made of an inorganic material such as ceramic. The heat sink 30 is bonded to the bottom surface of the insulating plate 10. The metal plate 20 is bonded to the top surface of the insulating plate 10. The metal plate 20 is made of, for example, copper, aluminum, etc.

The metal plate 20 includes a plurality of recesses 21. The plurality of recesses 21 are provided on the surface of the metal plate 20. In the first embodiment, the recesses 21 are provided so as to surround a semiconductor element mounting area 41. The semiconductor element mounting area 41 is a predetermined area on the surface of the metal plate 20, and corresponds to the area where the semiconductor element 40 described below is mounted.

FIG. 3 is an enlarged plan view showing the configuration of the recess 21. FIG. 3 shows the planar configuration of the region P in FIG. 1. FIG. 4 is a cross-sectional view showing the configuration of the recess 21. FIG. 4 shows a cut surface along B-B' in FIG. 3. In the first embodiment, the recess 21 is a non-through hole. The planar shape of the recess 21 is circular. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less. When the adjacent recesses 21 are defined as the first recess 21A and the second recess 21B, the minimum distance Ds is not the distance between the center of the first recess 21A and the center of the second recess 21B. The minimum distance Ds corresponds to the distance between the sidewall of the first recess 21A and the sidewall of the second recess 21B at their closest points. The diameter of the recess 21, i.e., the width W of the recess 21, is 0.2 mm or less. The depth Dp of the recess 21 is less than 0.05 mm.

The semiconductor element 40 is bonded to the surface of the metal plate 20 via a bonding material 61. The semiconductor element 40 is mounted in a semiconductor element mounting area 41. The bonding material 61 is formed of a conductive material such as solder or a sintered material. The sintered material includes, for example, Ag or Cu. The semiconductor element 40 is formed of a semiconductor such as Si. The semiconductor is preferably a so-called wide band gap semiconductor such as SiC, GaN, Ga ₂ O ₃ , GeO ₂ , or diamond. The semiconductor element 40 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, or the like. The semiconductor element 40 includes, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a Schottky barrier diode, or the like. Alternatively, the semiconductor element 40 may include a reverse-conducting IGBT (RC-IGBT) in which an IGBT and a freewheeling diode are formed within a single semiconductor substrate.

The resin part 50 seals the insulating plate 10, the metal plate 20, the multiple recesses 21, and the semiconductor element 40. In the first embodiment, the resin part 50 seals the circuit board 101 and the semiconductor element 40 so that the underside of the heat sink 30 is exposed. The resin part 50 is formed of a resin that is insulating and hardenable. The resin is, for example, a silicone resin, an epoxy resin, or the like.

FIG. 5 is a diagram showing the relationship between the minimum distance Ds between adjacent recesses 21 and the adhesive strength. The adhesive strength is the strength of adhesion between the metal plate 20 and the resin part 50. In FIG. 5, the adhesive strength is expressed by a standard ratio, that is, as a ratio to the adhesive strength when the reference recess 21 is not provided. In this test, the depth Dp of the recess 21 is 0.015 mm, and the width W of the recess 21 is 0.08 mm. The smaller the minimum distance Ds of the recess 21, the higher the adhesive strength. For example, when the minimum distance Ds is 0.2 mm, the adhesive strength is about 3.6 times higher than when the recess 21 is not provided. Furthermore, when the minimum distance Ds is 0.1 mm, the adhesive strength is about 3.9 times higher than when the recess 21 is not provided, and the adhesive strength is higher when the minimum distance Ds is smaller.

FIGS. 6 and 7 are diagrams showing the appearance of the metal plate 20 and the resin part 50 after a shear test. The shear test was performed on the resin forming area 62 shown in FIG. 6 and FIG. 7, respectively. In FIG. 6, the minimum spacing Ds of the recesses 21 is 0.1 mm. In FIG. 7, the minimum spacing Ds of the recesses 21 is 0.2 mm. The depths Dp of the recesses 21 are both 0.015 mm. The widths W of the recesses 21 are both 0.08 mm.

As shown in FIG. 6, when the minimum spacing Ds is 0.1 mm, cohesive failure of the resin part 50 occurs over the entire surface of the resin formation area 62. In contrast, as shown in FIG. 7, when the minimum spacing Ds is 0.2 mm, cohesive failure of the resin part 50 occurs only in the recess 21. In the area where no recess 21 is provided, that is, the area between adjacent recesses 21, interfacial failure occurs between the metal plate 20 and the resin part 50. According to the failure patterns shown in FIG. 6 and FIG. 7, when the minimum spacing Ds is wide, the contact area between the resin part and the metal substrate is small, and sufficient adhesion cannot be obtained. On the other hand, when the minimum spacing Ds is reduced, the contact area increases and the adhesive strength between the resin part and the metal substrate improves.

To summarise the above, the circuit board 101 in embodiment 1 includes an insulating plate 10 and a metal plate 20. The metal plate 20 is joined to the upper surface of the insulating plate 10. The metal plate 20 includes a plurality of recesses 21 provided on the surface of the metal plate 20. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less, and more preferably 0.1 mm or less. The width W of each of the plurality of recesses 21 is 0.2 mm or less. The depth Dp of each of the plurality of recesses 21 is less than 0.05 mm.

The semiconductor device 201 in the first embodiment also includes a circuit board 101, a semiconductor element 40, and a resin part 50. The semiconductor element 40 is mounted on the surface of the metal plate 20. The resin part 50 seals the insulating plate 10, the multiple recesses 21 of the metal plate 20, and the semiconductor element 40. The multiple recesses 21 are provided to surround the semiconductor element 40.

This configuration ensures sufficient adhesive strength between the resin part 50 and the metal plate 20 even when the formation area of the recess 21 is reduced. For example, the recess 21 that provides sufficient adhesive strength is formed even in a small area with a width W of about 1 to 2 mm between the semiconductor element 40 and the end of the metal plate 20. This allows the semiconductor element 40 and other components to be mounted at a high density, resulting in a miniaturized semiconductor device 201.

In addition, since the width W of the recess 21 is small and the depth Dp is shallower than before, the time required to process the recess 21 is shortened. This reduces the cost of the semiconductor device 201. When the recess 21 is formed by a laser, the energy of the laser for forming the recess 21 is also reduced. The area of the metal plate 20 that is oxidized by the laser irradiation is narrowed. This makes it possible to form the recess 21 closer to the semiconductor element mounting area 41. As a result, the semiconductor device 201 can be made smaller. Furthermore, the recess 21 and the metal oxide layer around it function as a solder barrier layer. The area of the solder layer that has poor adhesion to the resin part 50 is reduced, and the adhesive strength between the resin part 50 and the circuit board 101 is improved.

(First Modification of First Embodiment)
Fig. 8 is a plan view showing the configuration of a circuit board 101A in a first modified example of the first embodiment. The recess 21 in the circuit board 101A is a non-through groove. Fig. 9 is an enlarged plan view showing the configuration of the recess 21. Fig. 9 shows the planar configuration of the region Q in Fig. 8. The planar shape of the recess 21 is a straight line, and the straight groove is provided so as to surround the semiconductor element mounting area 41. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less. The groove width, i.e., the width W of the recess 21, is 0.2 mm or less. The depth Dp of the recess 21 is less than 0.05 mm.

The planar pattern of the recesses 21 may have a lattice shape or a slit shape. The lattice shape is formed by vertically extending grooves and horizontally extending grooves intersecting each other. The slit shape is formed by discretely arranging grooves that extend in one direction.

(Modification 2 of the First Embodiment)
10 to 12 are cross-sectional views showing the configuration of the recess 21 in the second modification of the first embodiment. As shown in FIG. 10, the cross-sectional shape of the recess 21 may be triangular. For example, the recess 21 is a non-through hole having a conical shape. As shown in FIG. 11, the bottom of the recess 21 may be rounded. As shown in FIG. 12, a protrusion 22 may be formed on the edge of each of the multiple recesses 21. The cross-sectional shape of the protrusion 22 is not limited to a triangle.

<Embodiment 2>
In the second embodiment, the same components as those in the first embodiment are given the same reference numerals, and detailed description thereof will be omitted.

FIG. 13 is a cross-sectional view showing the configuration of recesses 21 of a circuit board in embodiment 2. Metal plate 20 includes protrusions 22. Protrusions 22 are provided on the edges of each of the multiple recesses 21. Protrusions 22 correspond to burrs on recesses 21. Burrs are also called burrs. For adjacent first recesses 21A and second recesses 21B, a portion of protrusion 22 of first recess 21A and a portion of protrusion 22 of second recess 21B overlap with each other. In other words, the minimum distance Ds is set so that protrusion 22 of first recess 21A and protrusion 22 of second recess 21B overlap with each other.

The projections 22 of adjacent recesses 21 overlap, emphasizing the unevenness of the surface of the metal plate 20. As a result, the contact area between the resin part 50 and the metal plate 20 increases, improving the adhesive strength. For example, if the number of recesses 21 in embodiment 2 is the same as the number of recesses 21 in embodiment 1, the adhesive strength in embodiment 2 will be higher than that in embodiment 1, even though the processing time and processing area are approximately the same. The ease of assembly and reliability of the semiconductor device 201 are improved.

<Third embodiment>
In the third embodiment, the same components as those in the first or second embodiment are given the same reference numerals, and detailed description thereof will be omitted.

FIG. 14 is a cross-sectional view showing the configuration of a recess 21 of a circuit board in embodiment 3. The protrusions 22 of the metal plate 20 protrude outward from the edge of the recess 21. When the recess 21 is formed by a laser, the protrusions 22 protrude in the direction of the non-laser irradiated portion. Even if the minimum distance Ds between adjacent recesses 21 is the same as in embodiment 1, the protrusions 22 increase the contact area between the resin part 50 and the metal plate 20. This improves the adhesive strength. Even when stress is applied in the shear direction, the metallic protrusions 22, which are stronger than the resin part 50, absorb the stress, improving the adhesive strength.

<Fourth embodiment>
In the fourth embodiment, the same components as those in any of the first to third embodiments are given the same reference numerals, and detailed description thereof will be omitted.

FIG. 15 is a plan view showing the configuration of a circuit board 104 in embodiment 4. The metal plate 20 includes a high-density region 42 and a low-density region. The high-density region 42 is provided at the four corners of the metal plate 20. The low-density region corresponds to the region other than the high-density region 42. The density of the multiple recesses 21 in the low-density region is lower than the density of the multiple recesses 21 in the high-density region 42. The minimum distance Ds between adjacent recesses 21 and the width W of the recesses 21 are 0.2 mm or less.

The areas where thermal stress is likely to concentrate are the four corners of the metal plate 20. In areas other than the four corners where thermal stress is small, the processing time for the recesses 21 can be shortened by reducing the density of the recesses 21.

<Fifth embodiment>
In the fifth embodiment, the same components as those in any of the first to fourth embodiments are given the same reference numerals, and detailed description thereof will be omitted.

FIG. 16 is a plan view showing the configuration of a circuit board 105 in embodiment 5. The recess 21 in embodiment 5 is provided to surround not only the semiconductor element mounting area 41 but also the wiring bonding area 43. The wiring bonding area 43 is a predetermined area on the surface of the metal plate 20, and corresponds to the bonding portion where the metal plate 20 and the wiring 70 are bonded.

The semiconductor device 201 in the fifth embodiment includes wiring 70 bonded to a wiring bonding area 43 on the surface of the metal plate 20. One end of the wiring 70 is bonded to the metal plate 20 via, for example, solder. The wiring 70 is electrically connected to the semiconductor element 40 via the solder and the metal plate 20. The other end of the wiring 70 is configured to be connectable to an external circuit (not shown). The wiring 70 is, for example, a metal plate processed into a predetermined shape.

With this configuration, a recess 21 with a solder barrier function is formed around the joint. The area of the solder layer that has poor adhesion to the resin part 50 is reduced, improving the adhesive strength between the resin part 50 and the metal plate 20.

<Sixth embodiment>
In the sixth embodiment, components similar to those in any of the first to fifth embodiments are given the same reference numerals, and detailed descriptions thereof will be omitted.

In the circuit board manufacturing method of the sixth embodiment, the recesses 21 are formed by a laser. By forming the recesses 21 by a laser, the processing time is shortened and the processing accuracy is improved.

When the metal plate 20 is made of Cu, the laser used to process the recesses 21 is a UV laser or a green laser. By using a wavelength with a high optical absorption rate for Cu, the processing time for the recesses 21 is shortened.

<Seventh embodiment>
In the seventh embodiment, components similar to those in any of the first to sixth embodiments are given the same reference numerals, and detailed descriptions thereof will be omitted.

In the manufacturing method of the semiconductor device 201 in the seventh embodiment, the resin part 50 is formed by transfer molding. This improves the filling of the resin into the recess 21, and improves the assembly of the semiconductor device 201.

Although this disclosure has been described in detail, the above description is illustrative in all respects and is not limiting. It is understood that countless variations not illustrated can be envisioned.

In addition, it is possible to freely combine each embodiment, and to modify or omit each embodiment as appropriate.

10 insulating plate, 20 metal plate, 21 recess, 21A first recess, 21B second recess, 22 protrusion, 30 heat sink, 40 semiconductor element, 41 semiconductor element mounting area, 42 high density area, 43 wiring bonding area, 50 resin part, 61 bonding material, 62 resin forming area, 70 wiring, 101 circuit board, 101A circuit board, 104 circuit board, 105 circuit board, 201 semiconductor device, Dp depth, Ds minimum spacing.

Claims (9)

An insulating plate;
a metal plate joined to an upper surface of the insulating plate,
the metal plate includes a plurality of recesses provided on a surface of the metal plate,
The minimum distance between adjacent recesses is 0.2 mm or less;
Each of the plurality of recesses has a width of 0.2 mm or less;
The circuit board, wherein each of the plurality of recesses has a depth of less than 0.05 mm. The plurality of recesses include a first recess and a second recess adjacent to each other,
the metal plate includes a protrusion formed on an edge of each of the plurality of recesses,
The circuit board according to claim 1 , wherein a portion of the protrusion in the first recess and a portion of the protrusion in the second recess overlap each other. the metal plate includes a protrusion formed on an edge of each of the plurality of recesses,
The circuit board according to claim 1 , wherein the protrusion protrudes outward from the edge. The metal plate includes high-density regions provided at four corners of the metal plate and low-density regions provided in regions other than the four corners,
The circuit board according to claim 1 , wherein a density of the plurality of recesses in the low-density region is lower than a density of the plurality of recesses in the high-density region. A circuit board according to any one of claims 1 to 4;
a semiconductor element mounted on the surface of the metal plate;
a resin portion that seals the insulating plate, the recesses of the metal plate, and the semiconductor element,
The semiconductor device, wherein the plurality of recesses are provided to surround the semiconductor element. a wiring bonded to the surface of the metal plate and electrically connected to the semiconductor element;
The semiconductor device according to claim 5 , wherein the plurality of recesses are provided so as to surround a joint between the wiring and the metal plate. A method for manufacturing the circuit board according to any one of claims 1 to 4, comprising the steps of:
The method for manufacturing a circuit board further comprises forming the plurality of recesses using a laser. The metal plate is made of Cu,
The method for manufacturing a circuit board according to claim 7 , wherein the laser is a UV laser or a green laser. A method for manufacturing the semiconductor device according to claim 5 or 6, comprising the steps of:
The method for manufacturing a semiconductor device further comprises forming the resin portion by transfer molding.

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