WO2025111973A1 - Display substrate, manufacturing method and display apparatus - Google Patents

Abstract

A display substrate, a manufacturing method and a display apparatus. The display substrate comprises a glass substrate (10), and a composite layer (15) and a planarization layer (23) which are arranged in a direction facing away from the glass substrate (10). The end surface of the glass substrate (10) close to the composite layer (15) comprises a first lens region (10c), and the end surface of the composite layer (15) and/or the planarization layer (23) away from the glass substrate (10) comprises a second lens region (23a). An orthographic projection of the second lens region (23a) on the glass substrate (10) at least partially overlaps with an orthographic projection of the first lens region (10c) on the glass substrate (10). The display substrate is provided with two layers of micro-lens arrays, such that more light rays can be emitted out of the display substrate, thereby improving the brightness of the display substrate, improving the light-emitting efficiency, and reducing power consumption when the preset illumination intensity is reached.

Description

Display substrate, manufacturing method and display device Technical Field

The present disclosure relates to but is not limited to the field of display technology, and in particular to a display substrate, a preparation method and a display device.

Background Art

Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, lightness, flexibility and low cost. At present, the luminous efficiency of display substrates is relatively low.

Summary of the invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The embodiment of the present disclosure provides a display substrate, comprising a glass substrate, and a composite layer and a flat layer arranged in a direction away from the glass substrate;

The glass substrate comprises a first lens area at an end surface close to the composite layer, and the composite layer and/or the flat layer comprises a second lens area at an end surface away from the glass substrate;

An orthographic projection of the second lens area on the glass substrate at least partially overlaps with an orthographic projection of the first lens area on the glass substrate.

In some exemplary embodiments, a plurality of first micro-lenses are disposed in the first lens area, and the first micro-lenses are arranged as first arc-shaped surfaces that are concave toward a side of the glass substrate away from the composite layer;

A plurality of second micro lenses are disposed in the second lens area, and the second micro lenses are arranged as second arc-shaped surfaces that are recessed toward the glass substrate.

In some exemplary embodiments, at least one of the first microlens and the second microlens has the same structure and size.

In some exemplary embodiments, the composite layer is made of an inorganic-organic hybrid resin, and the refractive index of the inorganic-organic hybrid resin is 1.5 to 1.9.

In some exemplary embodiments, the diameter of the cross section of the first curved surface in a direction parallel to the glass substrate is set to be 1 micron to 50 microns;

The first curved surface is configured to have a maximum dimension in a direction perpendicular to the glass substrate of 0.5 micrometers to 25 micrometers.

In some exemplary embodiments, a filter layer is further included, wherein the filter layer is configured to cover the end surface of the flat layer close to the glass substrate, and the refractive index of the flat layer is configured to be greater than the refractive index of the filter layer;

The refractive index of the composite layer is set to be greater than the refractive index of the glass substrate.

In some exemplary embodiments, further comprising a first electrode layer, a pixel definition layer, a light emitting layer, and a second electrode layer;

The first electrode layer, the light-emitting layer and the second electrode layer are stacked in sequence in a direction away from the glass substrate, the first electrode layer is located on a side of the flat layer away from the glass substrate, and the first electrode layer is configured as a light-transmitting electrode;

The pixel definition layer surrounds a plurality of pixel openings, and the light emitting layer is located in the pixel definition layer within the pixel openings;

The second electrode layer is configured to reflect light passing through the pixel definition layer toward the glass substrate.

In some exemplary embodiments, an orthographic projection of the pixel definition layer on the glass substrate at least overlaps with an orthographic projection of the first lens area or/and the second lens area on the glass substrate.

In some exemplary embodiments, the second electrode layer is configured to enclose a plurality of first grooves facing the glass substrate;

The pixel definition layer includes a plurality of pixel definition units arranged at intervals in a direction parallel to the glass substrate, and the plurality of pixel definition units each surround the pixel opening;

The light-emitting layer includes a plurality of light-emitting components, and the light-emitting components and the pixel defining units are arranged in a one-to-one correspondence and are all located in the first groove.

In some exemplary embodiments, the planar layer includes a plurality of planar units, the plurality of planar units are arranged to correspond one-to-one to the plurality of pixel defining units and are located in the first groove, and the plurality of planar units are provided with the second lens area on a side away from the glass substrate.

In some exemplary embodiments, a filter layer is further included, and the filter layer is located on a side of the flat layer close to the glass substrate;

The filter layer includes a plurality of filters arranged at intervals in a direction parallel to the glass substrate. The filters are arranged to correspond to the pixel defining units one by one and are located in the first groove.

In some exemplary embodiments, a plurality of first lens areas are provided, and the optical filters are arranged in one-to-one correspondence with the first lens areas, and the orthographic projection of the first lens area on the glass substrate is located within the orthographic projection of the optical filter on the glass substrate.

In some exemplary embodiments, a driving circuit layer is further included, wherein the driving circuit layer is located between the glass substrate and the first electrode layer;

The second electrode layer includes groove portions and covering portions alternately arranged in a direction parallel to the glass substrate, the groove portions are configured in a groove shape, the groove portions surround the first groove, and the covering portions cover the surface of the driving circuit layer away from the glass substrate.

In some exemplary embodiments, the groove portion includes a groove side wall and a groove bottom wall, the groove side wall is arranged to form a ring in a direction parallel to the glass substrate, and the groove bottom wall is arranged to close an end of the groove side wall away from the glass substrate;

The circumferential surface of the pixel defining unit in a direction parallel to the glass substrate is set as a first end surface;

The circumferential surface of the flat unit in a direction parallel to the glass substrate is set as a second end surface;

The circumferential surface of the filter in a direction parallel to the glass substrate is arranged as a third end surface;

The first end surface, the second end surface and the third end surface are arranged in sequence in a direction perpendicular to the glass substrate;

The groove sidewall is configured to cover the first end surface, the second end surface and the third end surface;

The groove bottom wall is configured to cover the pixel defining unit and the end surface of the light emitting member away from the glass substrate.

In some exemplary embodiments, a driving circuit component and a light shielding layer are further included, wherein the driving circuit component is located between the planar layer and the composite layer;

The first electrode layer includes a plurality of first electrode units, and the first electrode units are arranged in the first groove;

The driving circuit assembly includes a connecting electrode, and the first electrode unit is connected to the connecting electrode through a via hole;

The light shielding layer is configured as a high reflectivity metal film, and the light shielding layer is located on the first electrode layer and/or the connecting electrode and is configured corresponding to the via hole to shield the light directly irradiated from the via hole to the glass substrate.

In some exemplary embodiments, the light shielding layer is configured to cover the end surface of the connecting electrode facing the via hole, and the orthographic projection of the light shielding layer on the glass substrate is configured to at least partially overlap with the orthographic projection of the via hole on the glass substrate.

In some exemplary embodiments, the first electrode unit includes a via-hole connecting portion located in the via-hole, and the light shielding layer is configured to cover an end surface of the via-hole connecting portion away from the glass substrate.

In some exemplary embodiments, the via hole is configured to penetrate the planar layer and the filter layer, the first electrode unit is configured to cover at least a portion of a hole wall of the via hole, and the pixel definition layer extends into the via hole.

The present disclosure provides a preparation method, which is applied to the above-mentioned display substrate, comprising:

A plurality of first micro-lenses are formed on the glass substrate, wherein the first lens area is provided with a plurality of first micro-lenses, and the first micro-lenses are arranged to be first arc-shaped surfaces that are concave toward the end surface of the glass substrate away from the composite layer;

A plurality of second microlenses are formed on the composite layer and/or the flat layer, a plurality of second microlenses are arranged in the second lens area, and the second microlenses are arranged as second arc-shaped surfaces recessed toward the glass substrate.

An embodiment of the present disclosure provides a display device, including the above-mentioned display substrate.

Other aspects will be apparent upon reading and understanding the drawings and detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution of the present disclosure.

FIG1 is a schematic structural diagram of a display device;

FIG2 is a schematic diagram of a planar structure of a display substrate;

FIG3 is a schematic diagram of a cross-sectional structure of a display substrate;

FIG4 is a schematic diagram of a display substrate of the present exemplary embodiment;

Fig. 5 is a schematic cross-sectional view along the line A-A in Fig. 4;

Fig. 6 is a schematic cross-sectional view taken along line B-B in Fig. 4;

FIG7 is a schematic diagram of the glass substrate in FIG5 ;

FIG8 is a partial enlarged schematic diagram of point D in FIG7;

FIG9 is a partial enlarged schematic diagram of point C in FIG5;

FIG10 is a partial schematic diagram of the display substrate in FIG6 ;

FIG11 is a schematic cross-sectional view of another display substrate of the present exemplary embodiment;

FIG12 is a schematic cross-sectional view of another display substrate of this exemplary embodiment;

FIG13 is a schematic cross-sectional view of another display substrate of the present exemplary embodiment;

FIG14 is a schematic cross-sectional view of another display substrate of this exemplary embodiment;

FIG15 is a schematic diagram of a first preparation method of the display substrate in FIG5 ;

FIG16 is a schematic diagram of a second preparation method of the display substrate in FIG5 ;

FIG17 is a third schematic diagram of manufacturing the display substrate in FIG5 ;

FIG18 is a fourth schematic diagram of manufacturing the display substrate in FIG5 ;

FIG19 is a fifth schematic diagram of manufacturing the display substrate in FIG5 ;

FIG20 is a partial enlarged schematic diagram of point E in FIG19;

FIG21 is a sixth schematic diagram of manufacturing the display substrate in FIG5 ;

FIG22 is a seventh schematic diagram of manufacturing the display substrate in FIG5 ;

FIG23 is an eighth schematic diagram of manufacturing the display substrate in FIG5 ;

FIG. 24 is a ninth schematic diagram of manufacturing the display substrate in FIG. 5 .

Description of reference numerals:

10-glass substrate; 11-shielding layer; 12-first metal layer;

13-first microlens; 14-first arc-shaped surface; 15-composite layer;

16-first buffer layer;            17-interlayer insulating layer;          18-driving circuit component;

19-connecting electrodes; 20-driving circuit layer; 21-filter layer;

22-first through hole; 23-flat layer; 24-second through hole;

25-third through hole; 26-second microlens; 27-second arc surface;

28-filter layer pattern; 29-flat layer pattern; 30-light emitting structure layer;

31- filter; 32- via hole; 33- first electrode pattern;

34-first electrode layer; 35-pixel definition layer pattern; 36-pixel definition layer;

37-pixel opening; 38-light-emitting layer; 39-light-emitting component;

40-encapsulation structure layer; 41-first component; 42-second electrode layer;

43-encapsulation film;                44-cover plate;                45-flat unit;

46-pixel defining unit; 47-first electrode unit; 48-first groove;

49-groove portion; 50-covering portion; 51-first end surface;

52- second end surface; 53- third end surface; 54- light shielding layer;

55-via connecting portion; 56-first light shielding portion; 57-second light shielding portion;

58-the fourth end face; 59-the groove side wall; 60-the groove bottom wall.

Details

In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be described in detail in conjunction with the accompanying drawings below. Note that the embodiments can be implemented in multiple different forms. A person of ordinary skill in the art can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other.

The proportions of the drawings in this disclosure can be used as a reference in actual processes, but are not limited thereto. For example: the width-to-length ratio of the channel, The thickness and spacing of each film layer, the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the number shown in the figure. The drawings described in this disclosure are only structural schematic diagrams. One method of this disclosure is not limited to the shapes or values shown in the drawings.

In the present specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged, and the "source terminal" and the "drain terminal" may be interchanged.

In this specification, "electrical connection" includes the case where components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

In this specification, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.

In this specification, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced by "conductive film". Similarly, "insulating film" may be replaced by "insulating layer".

The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, and may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

The term "about" in the embodiments of the present disclosure means that the limits are not strictly defined and a numerical value within the range of process and measurement errors is allowed.

FIG1 is a schematic diagram of the structure of a display device. As shown in FIG1 , the display device may include a timing controller, a data driver, a scan driver, a light emitting driver and a pixel array, wherein the timing controller is connected to the data driver, the scan driver and the light emitting driver respectively, the data driver is connected to a plurality of data signal lines (D1 to Dn) respectively, the scan driver is connected to a plurality of scan signal lines (S1 to Sm) respectively, and the light emitting driver is connected to a plurality of light emitting signal lines (E1 to Eo) respectively. The pixel array may include a plurality of sub-pixels Pxij, i and j may be natural numbers, and at least one sub-pixel Pxij may be a plurality of sub-pixels Pxij. A circuit unit and a light emitting device connected to the circuit unit may be included, and the circuit unit may include a pixel driving circuit, and the pixel driving circuit is connected to a scan signal line, a light emitting signal line, and a data signal line. In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specification of the data driver to the data driver, a clock signal suitable for the specification of the scan driver, a scan start signal, etc. may be provided to the scan driver, and a clock signal suitable for the specification of the light emitting driver, an emission stop signal, etc. may be provided to the light emitting driver. The data driver may generate a data voltage to be provided to the data signal lines D1, D2, D3, ... and Dn using the grayscale value and the control signal received from the timing controller. For example, the data driver may sample the grayscale value using a clock signal, and apply a data voltage corresponding to the grayscale value to the data signal lines D1 to Dn in a unit line, and n may be a natural number. The scan driver may generate a scan signal to be provided to the scan signal lines S1, S2, S3, ... and Sm by receiving a clock signal, a scan start signal, etc. from the timing controller. For example, the scan driver may sequentially provide a scan signal having a conduction level pulse to the scan signal lines S1 to Sm. For example, the scan driver may be configured in the form of a shift register, and may sequentially transmit a scan start signal provided in the form of a conduction level pulse to the next level circuit under the control of a clock signal to generate a scan signal, and m may be a natural number. The light-emitting driver may generate an emission signal to be provided to the light-emitting signal lines E1, E2, E3, ... and Eo by receiving a clock signal, an emission stop signal, etc. from a timing controller. For example, the light-emitting driver may sequentially provide an emission signal having a cut-off level pulse to the light-emitting signal lines E1 to Eo. For example, the light-emitting driver may be configured in the form of a shift register, and may sequentially transmit an emission stop signal provided in the form of a cut-off level pulse to the next level circuit under the control of a clock signal to generate an emission signal, and o may be a natural number. In an exemplary embodiment, a pixel array may be provided on a display substrate.

FIG2 is a schematic diagram of a planar structure of a display substrate. As shown in FIG2 , the display substrate may include a plurality of pixel units P arranged in a matrix, and at least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting device, and the circuit unit may include at least a pixel driving circuit, and the pixel driving circuit is respectively connected to a scanning signal line, a light-emitting signal line, and a data signal line, and the pixel driving circuit is configured to receive a data voltage transmitted by the data signal line under the control of the scanning signal line and the light-emitting signal line, and output a corresponding current to the light-emitting device. The light-emitting device in each sub-pixel is respectively connected to the pixel driving circuit of the sub-pixel in which it is located, and the light-emitting device is configured to emit light of corresponding brightness in response to the current output by the pixel driving circuit of the sub-pixel in which it is located.

In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel (R) emitting red light, the second sub-pixel P2 may be a blue sub-pixel (B) emitting blue light, and the third sub-pixel P3 may be a green sub-pixel (G) emitting green light. In an exemplary embodiment, the shape of the sub-pixels may be rectangular, rhombus, pentagonal or hexagonal, and the three sub-pixels may be arranged in a horizontal parallel, vertical parallel or triangular manner, which is not limited in the present disclosure.

In an exemplary embodiment, a pixel unit may include four sub-pixels, and the four sub-pixels may be arranged in a horizontal parallel arrangement, a vertical parallel arrangement, or a square arrangement, etc., which is not limited in the present disclosure.

FIG3 is a schematic diagram of a cross-sectional structure of a display substrate. As shown in FIG3, on a plane perpendicular to the display substrate, the display substrate may include a driving circuit layer 20 disposed on a glass substrate 10, a light emitting structure layer 30 disposed on a side of the driving circuit layer 20 away from the glass substrate 10, and an encapsulation structure layer 40 disposed on a side of the light emitting structure layer 30 away from the glass substrate 10. In some possible implementations, the display substrate may include other film layers, such as a touch structure layer, etc., which is not limited in the present disclosure.

In an exemplary embodiment, the glass substrate 10 may be a flexible substrate, or may be a rigid substrate. The driving circuit layer 20 may include a plurality of circuit units, each of which may include at least a pixel driving circuit composed of a plurality of transistors and a storage capacitor. The light-emitting structure layer 30 may include a plurality of light-emitting devices, each of which may include at least an anode, a pixel definition layer, an organic light-emitting layer and a cathode, the anode being connected to the pixel driving circuit, the organic light-emitting layer being connected to the anode, the cathode being connected to the organic light-emitting layer, and the organic light-emitting layer emitting light of corresponding colors under the drive of the anode and the cathode. Packaging The structural layer 40 may include a first encapsulation layer, a second encapsulation layer and a third encapsulation layer stacked together. The first encapsulation layer and the third encapsulation layer may be made of inorganic materials, and the second encapsulation layer may be made of organic materials. The second encapsulation layer is arranged between the first encapsulation layer and the third encapsulation layer to form an inorganic material/organic material/inorganic material stacked structure, which can ensure that external water vapor cannot enter the light-emitting structure layer 30, but is not limited to this. For example, the first encapsulation layer, the second encapsulation layer and the third encapsulation layer are all inorganic materials or are all organic materials.

At present, in OLED display devices without a light-efficiency enhancement structure, only 20% of the light emitted by the light-emitting device can be emitted from the front of the screen, which means that 80% of the light cannot be emitted from the end face of the glass substrate away from the light-emitting device and disappears, resulting in low light-emitting efficiency. For bottom-emitting light-emitting devices, although the relevant OLED display devices have a light-efficiency enhancement structure, which allows more light to be emitted from the end face of the glass substrate away from the light-emitting device, although it can improve the light-emitting efficiency to a certain extent, the improvement effect is not ideal.

FIG4 is a schematic diagram of a display substrate of the exemplary embodiment, FIG5 is a schematic diagram of a cross section in the direction of A-A in FIG4, and FIG6 is a schematic diagram of a cross section in the direction of B-B in FIG4. The embodiment of the present disclosure provides a display substrate, as shown in FIG4 to FIG6, the display substrate may include a glass substrate 10 and a composite layer 15 and a flat layer 23 arranged in a direction away from the glass substrate 10, wherein the glass substrate 10 may include a first lens area 10c at an end face close to the composite layer 15, and the composite layer 15 and/or the flat layer 23 may include a second lens area 23a at an end face away from the glass substrate 10. The orthographic projection of the second lens area 23a on the glass substrate 10 is set to overlap at least partially with the first lens area 10c. Thus, the display substrate includes at least two layers of microlens arrays (MLA for short), so that more light can be emitted from the display substrate, the brightness of the display substrate can be improved, the luminous efficiency can be improved, and the power consumption can be reduced when the preset light intensity is reached.

FIG. 7 is a schematic diagram of the glass substrate in FIG. 5 , and FIG. 8 is a partial enlarged schematic diagram of D in FIG. 7 . In some exemplary embodiments, as shown in FIG. 7 and FIG. 8 , the material of the glass substrate 10 may be translucent glass, and the refractive index of the glass substrate 10 may be less than 1.55. The display substrate of this example may emit light on the side having the glass substrate 10. The surface of one side of the glass substrate 10 includes a light emitting area 10a and a circuit area 10b, and the light emitting area 10a may include a first lens area 10c. A plurality of first microlenses 13 are uniformly arranged in the first lens area 10c, and the plurality of first microlenses 13 are arranged in an array to form a microlens array (MLA for short). In an exemplary embodiment, the plurality of first microlenses 13 in the first lens area 10c have the same structure and size. The microlens array can converge light, thereby improving brightness and viewing angle, and has the characteristics of miniaturization, light weight, arraying, etc., and can also improve color performance.

In some exemplary embodiments, as shown in FIG. 5 , FIG. 6 , FIG. 7 and FIG. 8 , the first microlens 13 may be a first curved surface 14 formed by being recessed on the surface of the glass substrate 10 facing the composite layer 15 , and the first curved surface 14 may be recessed toward the surface of the glass substrate 10 away from the composite layer 15 to form an arc-shaped groove structure. The height of the first curved surface 14 may be set to be the maximum distance between the first curved surface 14 and the surface of the glass substrate 10 facing the composite layer 15 , that is, the maximum dimension H1 of the first curved surface 14 in the direction perpendicular to the glass substrate 10 , and the value of H1 may be 0.5 μm (micrometer) to 25 μm (micrometer). In an exemplary embodiment, the cross section of the first curved surface 14 in the direction parallel to the glass substrate 10 is circular, and the maximum diameter of the cross section of the first curved surface 14 in the direction parallel to the glass substrate 10 may be D1, and the value of D1 may be 1 μm (micrometer) to 50 μm (micrometer). The glass substrate 10 has a plurality of light emitting areas 10 a arranged at intervals. The circuit area 10 b can separate the plurality of light emitting areas 10 a. The sizes and arrangements of the first micro lenses 13 in the plurality of light emitting areas 10 a can be consistent.

In some exemplary embodiments, as shown in FIGS. 5 to 7 , the composite layer 15 may be covered on the glass substrate 10. The material of the composite layer 15 may be an organic-inorganic hybrid resin. The organic-inorganic hybrid resin is a light-transmitting material, which is a mixture of inorganic and organic substances. The organic-inorganic hybrid resin contains silicon (Si), oxygen (O) and nitrogen (N). The organic-inorganic hybrid resin has good heat resistance and can withstand high temperatures of 300°C to 500°C. The composite layer 15 is a hybrid of inorganic and organic materials, so that the composite layer 15 has the functions of a flat layer and a buffer layer at the same time. The refractive index of the composite layer 15 may be 1.5 to 1.9, and the refractive index of the composite layer 15 may be changed by adjusting the content ratio of oxygen (O) and nitrogen (N) in the organic-inorganic hybrid resin. At the same time, the refractive index of the composite layer 15 may be greater than the refractive index of the glass substrate 10. The composite layer 15 is away from the glass substrate 10. The plane is parallel to the glass substrate 10, and the protruding part of the surface of the composite layer 15 close to the glass substrate 10 fills the arc groove formed by the depression of the first arc surface 14. In addition, the glass substrate 10 also includes a first metal layer 12, which is arranged corresponding to the circuit area 10b, and the circuit area 10b is at least partially covered by the first metal layer 12. The first metal layer 12 can be copper (Cu), aluminum (Al), silver (Ag), titanium (Ti), molybdenum (Mo) or an alloy prepared by a low-resistance metal. Part of the first metal layer 12 can be a light shielding plate to block the light from emitting, and another part of the first metal layer 12 can be a SD or VDD wiring. There can be multiple light emitting areas 10a, and the first metal layer 12 can be arranged in the circuit area 10b that separates the multiple light emitting areas 10a.

FIG9 is a partial enlarged schematic diagram of the C in FIG5 . In some exemplary embodiments, as shown in FIG5 and FIG10 , the display substrate further includes a first buffer layer 16, an interlayer dielectric/passivating film (ILD/PVX) 17 and a driving circuit component 18. The first metal layer 12, the composite layer 15, the first buffer layer 16, the interlayer dielectric/passivating film (ILD/PVX) 17 and the driving circuit component 18 may constitute a driving circuit layer 20, and the driving circuit layer 20 covers the glass substrate 10. The composite layer 15, the first buffer layer 16 and the interlayer dielectric (ILD/PVX) 17 are sequentially stacked in a direction away from the glass substrate 10. The driving circuit component 18 is located between the glass substrate 10 and the interlayer dielectric (ILD/PVX) 17 and is electrically connected to the first metal layer 12 through a via structure. The interlayer dielectric (ILD/PVX) 17 covers the driving circuit component 18.

FIG10 is a partial schematic diagram of the display substrate in FIG6. In some exemplary embodiments, as shown in FIG5, FIG6 and FIG10, the display substrate further includes a first electrode layer 34, a pixel definition layer 36, a light emitting layer 38, a second electrode layer 43 and a filter layer 21, wherein the first electrode layer 34, the light emitting layer 38 and the second electrode layer 43 may be stacked in sequence in a direction away from the glass substrate 10, the first electrode layer 34 may be located on the side of the planar layer 23 away from the glass substrate 10, and the first electrode layer 34 may be a light-transmitting electrode. The pixel definition layer 36 may enclose a plurality of pixel openings 37, the light emitting layer 38 is located in the pixel openings 37, the material of the pixel definition layer 36 is set to be a light-transmitting material, the second electrode layer 43 may be a high reflectivity electrode, and the second electrode layer 43 may reflect light passing through the pixel definition layer 36 toward the glass substrate 10. The first electrode layer 34, the pixel definition layer 36, the light emitting layer 38, the second electrode layer 43, the planar layer 23 and the filter layer 21 may constitute a light-emitting structure layer 30.

In some exemplary embodiments, as shown in FIG. 5, FIG. 6 and FIG. 10, the second electrode layer 43 is configured to enclose a plurality of first grooves 48 with notches facing the glass substrate 10, and the second electrode layer 43 includes a plurality of groove portions 49 and a plurality of covering portions 50 arranged alternately in a direction parallel to the glass substrate 10, wherein the groove portion 49 may be groove-shaped, and the covering portion 50 covers the surface of the driving circuit layer 20 away from the glass substrate 10. The groove portion 49 includes a groove side wall 59 and a groove bottom wall 60, and the groove side wall 59 may be configured to enclose a ring in a direction parallel to the glass substrate 10, and the groove bottom wall 60 is parallel to the glass substrate 10 and may close an end of the groove side wall 59 away from the glass substrate 10. The second electrode layer 43 may be a high reflectivity electrode, and the second electrode layer 43 may serve as a cathode.

In some exemplary embodiments, as shown in FIG. 5 , FIG. 6 and FIG. 10 , the pixel definition layer 36 includes a plurality of pixel defining units 46 arranged at intervals in a direction parallel to the glass substrate, and the plurality of pixel defining units 46 each surround a pixel opening 37, so that the pixel definition layer 36 has a plurality of independent pixel defining units 46. In an exemplary embodiment, the number of the pixel defining units 46 is consistent with the pixel opening 37. The light-emitting layer 38 includes a plurality of light-emitting components 39, and the light-emitting components 39 and the pixel defining units 46 can be arranged in a one-to-one correspondence, that is, each light-emitting component 39 is arranged in the pixel opening 37 of the corresponding pixel defining unit 46, and at the same time, each light-emitting component 39 and the corresponding pixel defining unit 46 are integrally located in the first groove 48, so that the light-emitting components 39 and the first groove 48 are arranged in a one-to-one correspondence. The light-emitting components 39 can emit white light under power supply conditions. Thus, the first groove 48 surrounded by the second electrode layer 43 provides installation space for the light-emitting component 39 and the pixel defining unit 46, and separates adjacent light-emitting components 39 and adjacent pixel defining units 46. The light emitted by the light-emitting component 39 can only be irradiated toward the glass substrate 10 through the notch of the first groove 48, and multiple light-emitting components 39 share one cathode.

In some exemplary embodiments, as shown in FIGS. 5, 6 and 10, the first electrode layer 34 includes a plurality of first electrode units 47 arranged at intervals in a direction parallel to the glass substrate 10, the flat layer 23 includes a plurality of flat units 45 arranged at intervals in a direction parallel to the glass substrate 10, and the filter layer 21 includes a plurality of flat units 45 arranged at intervals in a direction parallel to the glass substrate 10. The first electrode unit 47, the flat unit 45, and the filter 31 can all correspond to the first groove 48 one by one and be located in the first groove 48. The filter 31, the flat unit 45, and the first electrode unit 47 are sequentially stacked in a direction away from the glass substrate 10. Therefore, the first groove 48 surrounded by the second electrode layer 43 also provides installation space for the first electrode unit 47, the flat unit 45, and the filter 31, and separates the adjacent first electrode units 47, the adjacent flat units 45, and the adjacent filter 31. The light emitted by the light-emitting component 39 passes through the flat unit 45 and is filtered by the filter 31, and then irradiated toward the glass substrate 10 from the notch of the first groove 48.

In some exemplary embodiments, as shown in FIG. 5 , FIG. 6 and FIG. 10 , the filter layer 21 can filter light and filter white light into light of a preset color. The filter layer 21 can include a red filter, a green filter or a blue filter, that is, the plurality of filters 31 can be red filters, green filters or blue filters. In some exemplary embodiments, the sizes and arrangements of the first microlenses 13 in the light exit area 10a corresponding to different filters 31 are different, so that sub-pixels of different colors are differentiated to meet the requirements of light extraction intensity of sub-pixels of different colors. For example, each light-emitting component 39 emits white light, and the plurality of filters 31 can be divided into three types. The first filter 31 can filter white light into red light, the second filter 31 can filter white light into green light, and the third filter 31 can filter white light into blue light. The sizes and arrangements of the first microlenses 13 corresponding to the three filters 31 are different, so that the intensities of red light, green light and blue light are different, meeting the requirements of light extraction intensity of sub-pixels of different colors. The orthographic projection of the pixel opening 37 on the glass substrate 10 may be located within the orthographic projection of the filter layer 21 on the glass substrate 10, and another portion of the end surface of the driving circuit layer 20 away from the glass substrate 10 is covered by the covering portion 50 of the second electrode layer 43. The refractive index of the flat layer 23 is set to be greater than the refractive index of the filter layer 21. The first electrode unit 47 may be a light-transmitting electrode material, the first electrode unit 4 may be used as an anode, each light-emitting component 31 uses the first electrode unit 4 corresponding to each other as an anode, but uses the second electrode layer as a cathode to form a common cathode, and the flat unit 45 may be set to a light-transmitting material, thereby, the white light emitted by the light-emitting component 39 passes through the first electrode unit 47 and the flat unit 45, is filtered into a preset color by the filter 31, and then passes through the driving circuit layer 20 and the glass substrate 10, and is emitted from the display substrate.

In some exemplary embodiments, as shown in FIG. 5 , FIG. 6 and FIG. 10 , the surface of the flat layer 23 away from the glass substrate 10 may include a second lens area 23a, and the orthographic projection of the second lens area 23a on the glass substrate 10 is located in the first lens area 10c. The flat layer 23 may have a plurality of second lens areas 23a, and each flat unit 45 has a second lens area 23a, and the second lens area 23a corresponds to the first lens area 10c one by one. A plurality of second microlenses 26 are evenly arranged in the second lens area 23a, and the plurality of second microlenses 26 are arranged in an array to form a microlens array. The second microlens 26 may be a second arc surface 27 that is recessed on the surface of the flat layer 23 away from the glass substrate 10, and the second arc surface 27 may be recessed toward the surface of the flat layer 23 away from the light emitting structure layer 30 to form an arc groove structure. The second arc surface 27 and the first arc surface 14 are consistent in structure, size and arrangement, but are not limited thereto. For example, the second arc surface 27 and the first arc surface 14 are inconsistent in at least one of the structure, size and arrangement. The orthographic projection of the pixel definition layer 36 on the glass substrate 10 at least overlaps with the orthographic projection of the first lens area 10 c and/or the second lens area 23 a on the glass substrate 10 , and the orthographic projections of the first lens area 10 c and the second lens area 23 a on the glass substrate 10 are both located within the orthographic projection of the filter layer 21 on the glass substrate 10 .

In some exemplary embodiments, the surface of the flat layer 23 away from the glass substrate 10 may include a second lens area 23a, and the end surface of the glass substrate 10 close to the composite layer 15 may include a plurality of first lens areas 10c, the second lens areas 23a correspond to the first lens areas 10c one by one, the second curved surface 27 of the second lens area 23a and the first curved surface 14 of the first lens area 10c are inconsistent in size, the size of the first curved surface 14 in the direction perpendicular to the glass substrate 10 is larger than the size of the second curved surface 27 in the direction perpendicular to the glass substrate 10, and the orthographic projection area of a single first curved surface 14 on the glass substrate 10 is larger than the orthographic projection area of a single second curved surface 27 on the glass substrate 10.

In some exemplary embodiments, as shown in FIG. 5, FIG. 6 and FIG. 10, the circumferential end surface of the pixel defining unit 46 is a first end surface 51, and the first end surface 51 is an outer surface of the pixel defining unit 46 in a direction parallel to the glass substrate 10, that is, Each first end face 51 is an end face of the pixel defining unit 46 facing the adjacent pixel defining unit 46. The circumferential end face of the flat unit 45 is a second end face 52, which is the outer surface of the flat unit 45 in a direction parallel to the glass substrate 10, that is, the second end face 52 is the end face of each flat unit 45 facing the adjacent flat unit 45. The circumferential end face of the filter 31 is a third end face 53, which is the outer surface of the filter 31 in a direction parallel to the glass substrate 10, that is, the third end face 53 is the end face of each filter 31 facing the adjacent filter 31. The light emitting member 39, the pixel defining unit 46, the first electrode unit 47, the flat unit 45, and the filter 31 can all correspond to the first groove 48 one by one and be located in the first groove 48, so that the groove sidewall 59 of the groove portion 49 in the second electrode layer 43 covers the first end face 51, the second end face 52, and the third end face 53, which can prevent color mixing, that is, prevent the cross-mixing of light filtered by adjacent filters 31. Thus, the second electrode layer 43 forms a reflective structure covering the first end face 51, the second end face 52, and the third end face 53, and the reflective structure can reflect the large-angle light emitted by the sub-pixel, so that the light is converged and the light extraction efficiency is improved.

In some exemplary embodiments, as shown in FIG. 9 , the driving circuit assembly 18 includes a connecting electrode 19, and the first electrode unit 47 of the first electrode layer 34 is electrically connected to the connecting electrode 19 through the via hole 32. The connecting electrode 19 may be provided with an opaque light shielding layer 54 corresponding to the via hole 32 to shield the light directly irradiated from the via hole 32 to the glass substrate 10, and to prevent the white light directly irradiated from the via hole 32 to the glass substrate 10 from mixing with the light with other colors through the filter 31. The light shielding layer 54 may be a high reflectivity metal film, and the light shielding layer 54 may cover the end surface of the connecting electrode 19 facing the via hole 32. The via hole 32 extends in a direction perpendicular to the glass substrate 10, and the via hole 32 passes through the flat layer 23 and the filter layer 21, and extends to the connecting electrode 19, and the pixel definition layer 36 covers the via hole 32.

In some exemplary embodiments, as shown in FIG. 5 and FIG. 6 , the display substrate further includes an encapsulation structure layer 40, which includes an encapsulation film 43 and a cover plate 44, and the cover plate 44 is installed on the side of the encapsulation film 43 away from the glass substrate 10. The encapsulation film 43 may be one or more layers of inorganic or organic thin films, and the encapsulation film 43 covers the end face of the light-emitting structure layer 30 away from the glass substrate 10. The encapsulation film 43 can prevent water and oxygen from entering the display substrate, and provides good water and oxygen isolation properties for the display substrate. The cover plate 44 covers the side of the encapsulation film 43 away from the glass substrate 10, and the cover plate can provide protection for the display substrate.

In some exemplary embodiments, the display substrate of this example may be bottom-emitting, the glass substrate 10 is at the bottom of the display substrate, and the light-emitting component 39 directly irradiates the glass substrate 10 under power supply conditions. The light can be filtered by the filter 31 and then irradiated to the glass substrate 10 through the notch of the first groove 48. The light irradiated by the light-emitting component 39 to the pixel defining unit 36 will be reflected by the second electrode layer to the side of the glass substrate 10 after passing through the pixel defining unit 36, so that more light is emitted from the light-emitting structure layer 20, thereby improving the brightness and luminous efficiency, and reducing power consumption when the preset brightness is reached.

FIG. 11 is another cross-sectional schematic diagram of a display substrate of the present exemplary embodiment. In some exemplary embodiments, as shown in FIG. 11 , the driving circuit assembly 18 includes a connecting electrode 19, and the first electrode unit 47 of the first electrode layer 34 is electrically connected to the connecting electrode 19 through the via hole 32. The first electrode layer 34 may be provided with an opaque light shielding layer 54 corresponding to the via hole 32 to shield the light directly irradiated from the via hole 32 to the glass substrate 10, and to prevent the white light directly irradiated from the via hole 32 to the glass substrate 10 from mixing with the light with other colors through the filter 31. The light shielding layer 54 may be a high reflectivity metal film, the first electrode unit 47 includes a via hole connecting portion 55 located in the via hole 32, the via hole connecting portion 55 covers the hole wall of the via hole 32, and the light shielding layer 54 covers the via hole 32. The light shielding layer 54 of this example may cover the end surface of the via hole connecting portion 55 away from the connecting electrode 19.

FIG. 12 is another cross-sectional schematic diagram of a display substrate of the present exemplary embodiment. In some exemplary embodiments, as shown in FIG. 12 , the driving circuit assembly 18 includes a connecting electrode 19, and the first electrode unit 47 of the first electrode layer 34 is electrically connected to the connecting electrode 19 through the via hole 32. The first electrode layer 34 and the connecting electrode 19 may be provided with an opaque light shielding layer 54 corresponding to the via hole 32 to shield the light directly irradiated from the via hole 32 to the glass substrate 10, and to prevent the white light directly irradiated from the via hole 32 to the glass substrate 10 from mixing with the light with other colors through the filter 31. The light shielding layer 54 may be a high-reflectivity metal film, and the light shielding layer 54 includes a first light shielding portion 56 and a second light shielding portion 57. The first electrode unit 47 includes a position The via connecting portion 55 in the via hole 32 covers the hole wall of the via hole 32 , the first shading portion 56 can cover the end surface of the via connecting portion 55 away from the connecting electrode 19 , and the second shading portion 57 can cover the end surface of the connecting electrode 19 facing the via hole 32 .

FIG13 is a schematic cross-sectional view of another display substrate of the present exemplary embodiment. In some exemplary embodiments, as shown in FIG13 , the display substrate may include a glass substrate 10 and a composite layer 15 and a flat layer 23 stacked in a direction away from the glass substrate 10, wherein the glass substrate 10 may include a first lens area 10c at the end face close to the composite layer 15, and a plurality of first microlenses 13 are arranged in an array to form a microlens array; the flat layer 23 is not provided with a microlens array, and the composite layer 15 may include a second lens area 23a at the end face away from the glass substrate 10, and a plurality of second microlenses 26 are arranged in an array to form a microlens array. The orthographic projection of the second lens area 23a on the glass substrate 10 is set to overlap at least partially with the first lens area 10c. Thus, the display substrate has two layers of microlens arrays, so that more light can be emitted from the display substrate, the brightness of the display substrate can be improved, the luminous efficiency can be improved, and the power consumption can be reduced when the preset light intensity is reached.

FIG14 is another cross-sectional schematic diagram of a display substrate of the present exemplary embodiment. In some exemplary embodiments, as shown in FIG14 , the display substrate may include a glass substrate 10, wherein the glass substrate 10 may include a first lens area 10c at the end surface close to the composite layer 15, and a plurality of first microlenses 13 are arranged, and the plurality of first microlenses 13 are arranged in an array to form a microlens array, thereby the display substrate has a layer of microlens array. The first groove 48 surrounded by the second electrode layer 43 also provides installation space for the light emitting component 31, the first electrode unit 47, the flat unit 45, and the filter 31, and the adjacent light emitting components 31, the adjacent first electrode unit 47, the adjacent flat unit 45, and the adjacent filter 31 are separated from each other. The light emitted by the light emitting component 39 is filtered by the filter 31 and then irradiated to the glass substrate 10 from the notch of the first groove 48, and the second electrode layer 43 forms a reflective structure, which can reflect the large-angle light emitted by the sub-pixel, so that the light is converged and the light extraction efficiency is improved.

In an exemplary embodiment, the preparation process of the display substrate as shown in FIGS. 5 and 6 may include the following operations.

(1) A plurality of first microlenses are formed on a glass substrate.

FIG15 is a first preparation schematic diagram of the display substrate in FIG5 . In some exemplary embodiments, as shown in FIG5 to FIG8 and FIG15 , forming a plurality of first microlenses on a glass substrate may include: first forming a shielding layer pattern 11 on a glass substrate 10, and then etching the glass substrate 10 to form first microlenses 13.

In some exemplary embodiments, the surface of the glass substrate 10 facing the light emitting structure layer 30 includes a light emitting area 10a and a circuit area 10b, and the light emitting area 10a further includes a first lens area 10c. The shielding layer pattern 11 includes a first metal layer 12 covering the surface of the glass substrate 10, and the circuit area 10b is at least partially covered by the first metal layer 12. The first metal layer 12 can be copper (Cu), aluminum (Al), silver (Ag), titanium (Ti), molybdenum (Mo) or an alloy prepared by a low resistance metal. Part of the first metal layer 12 can be a light shielding plate to block the light from emitting, and another part of the first metal layer 12 can be an SD or VDD wiring. There can be multiple light emitting areas 10a, and the circuit area 10b can separate multiple light emitting areas 10a.

In some exemplary embodiments, forming the blocking layer pattern 11 includes first depositing a first metal film on the glass substrate 10, then coating the first metal film with photoresist, exposing it to ultraviolet light using a first mask after pre-baking, and retaining the photoresist pattern only at the position of the first metal layer 12 after development, and then post-baking, etching, and stripping the photoresist to obtain the blocking layer pattern 11.

In some exemplary embodiments, a plurality of first microlenses 13 are evenly arranged in the first lens area 10c, and the plurality of first microlenses 13 are arranged in an array to form a microlens array. The first microlens 13 may be a first curved surface 14 that is recessed on the surface of the glass substrate 10 facing the light-emitting structure layer 30, and the first curved surface 14 may be recessed toward the surface of the glass substrate 10 away from the light-emitting structure layer 30 to form an arc-shaped groove structure. The height of the first curved surface 14 may be set to be the maximum distance H1 between the first curved surface 14 and the surface of the glass substrate 10 facing the light-emitting structure layer 30, and the value of H1 may be 0.5 μm to 25 μm. In some exemplary embodiments, the cross-section of the first curved surface 14 in a direction parallel to the glass substrate 10 is a circle. The maximum diameter of the cross section of the first curved surface 14 in the direction parallel to the glass substrate 10 can be D1, and the value of D1 can be 1 μm to 50 μm. A plurality of light emitting areas 10a are provided, and the size and arrangement of the first microlenses 13 in the plurality of light emitting areas 10a can be consistent.

In some exemplary embodiments, the etching process to form the first microlens 13 on the glass substrate 10 may be wet etching or dry etching. In this example, wet etching is used, and during the etching process, an HF series etching liquid may be used to remove part of the glass material on the glass substrate 10 to form a concave first arc-shaped surface 14, as shown in FIG5 . However, the invention is not limited thereto. For example, dry etching is used, and during the etching process, an etching gas is an F series CF4 (carbon tetrafluoride) gas or SF6 (sulfur hexafluoride) gas used in combination with etching to remove part of the glass material on the glass substrate 10 to form a concave first arc-shaped surface 14.

(2) Forming a driving circuit layer.

Figure 16 is a second preparation schematic diagram of the display substrate in Figure 5, and Figure 17 is a third preparation schematic diagram of the display substrate in Figure 5. In some exemplary embodiments, as shown in Figures 16 and 17, forming a driving circuit layer 20 includes first forming a composite layer 15, and then preparing a first buffer layer (buffer) 16, an interlayer insulating layer (ILD/PVX) 17, and a driving circuit component 18 through processes such as deposition and etching to form a driving circuit layer 20, and the driving circuit layer 20 covers the glass substrate 10.

In some exemplary embodiments, the driving circuit layer 20 includes a laminated composite layer 15, a first buffer layer 16, and an interlayer insulating layer (ILD/PVX) 17, wherein the first buffer layer 16 covers the side of the composite layer 15 away from the glass substrate 10, and the interlayer insulating layer (ILD/PVX) 17 is located on the side of the first buffer layer 16 away from the composite layer 15. The driving circuit component 18 is connected to the first metal layer 12 through a via structure, and the driving circuit component 18 includes a connecting electrode 19, which may be made of an opaque metal material.

In some exemplary embodiments, forming the composite layer first may include: uniformly coating a liquid solvent containing a dielectric material on the glass substrate 10 having the first microlens 13 by spin coating (Spin on Glass, SOG for short), and then curing the composite layer by heat treatment. During the coating of the liquid solvent, the arc groove formed by the depression of the first arc surface 14 may be filled.

In some exemplary embodiments, the material of the composite layer 15 may be an organic-inorganic hybrid resin, which contains silicon (Si), oxygen (O) and nitrogen (N). The organic-inorganic hybrid resin has good heat resistance and can withstand high temperatures of 300°C to 500°C. The composite layer 15 is a hybrid of inorganic and organic materials, so that the composite layer 15 has the functions of a flat layer and a buffer layer at the same time. The refractive index of the composite layer 15 may be 1.5 to 2.0, and the refractive index of the composite layer 15 may be changed by adjusting the content ratio of oxygen (O) and nitrogen (N) in the organic-inorganic hybrid resin, and the refractive index of the composite layer 15 is greater than the refractive index of the glass substrate 10. The plane of the composite layer 15 away from the glass substrate 10 is parallel to the glass substrate 10, and the protruding portion of the surface of the composite layer 15 on one side close to the glass substrate 10 fills the arc groove formed by the depression of the first arc surface 14.

(3) A plurality of second micro lenses are formed on the flat layer.

FIG18 is a fourth schematic diagram of preparing the display substrate in FIG5 , FIG19 is a fifth schematic diagram of preparing the display substrate in FIG5 , and FIG20 is a partial enlarged schematic diagram of point E in FIG19 . In some exemplary embodiments, as shown in FIGS. 18 to 20 , forming the first microlens may include: first forming a filter layer pattern 28 on the driving circuit layer 20 , forming a flat layer pattern 29 , and etching the second microlens 26 .

In some exemplary embodiments, forming a filter layer pattern 28 on the driving circuit layer 20 includes: first depositing a color film on the driving circuit layer 20, and then forming a filter layer 21 by etching to obtain a filter layer pattern 28. The filter layer pattern 28 includes a filter layer 21 covering the driving circuit layer 20, and the orthographic projection of the filter layer 21 on the glass substrate 10 is located in the light exit area. The filter layer 21 may include a plurality of filters 31, and the plurality of filters 31 are arranged at intervals on a plane parallel to the glass substrate 10. The filters 31 are formed by etching the color film. The filter layer 21 can filter light and filter white light into light of a preset color. The filter layer 21 can be a red filter, a green filter, or a blue filter. The filter layer 21 has a first through hole 22, and the first through hole 22 penetrates the filter layer 21 in a direction perpendicular to the glass substrate 10.

In some exemplary embodiments, forming the planar layer pattern 29 includes: coating an organic material layer, and then forming a planar layer 23 by etching to obtain the planar layer pattern 29. The filter layer pattern 28 includes a planar layer 23 disposed on the filter layer pattern 28, and the planar layer 23 completely covers the end surface of the filter layer 21 away from the driving circuit layer 20. The planar layer 23 has a second through hole 24, and the second through hole 24 penetrates the planar layer 23 in a direction perpendicular to the glass substrate 10, and the second through hole 24 is connected to the first through hole 22. In addition, the interlayer insulating layer (ILD/PVX) 17 has a third through hole 25 on the end surface close to the planar layer 23, one end of the third through hole 25 is connected to the second through hole 24, and the other end extends to the connecting electrode 19, thereby, the first through hole 22, the second through hole 24 and the third through hole 25 form a via 32 extending in a direction perpendicular to the glass substrate 10.

In some exemplary embodiments, the second microlenses 26 may be etched by dry etching to remove part of the material on the flat layer 23 to form a recessed second microlens 26. The surface of the flat layer 23 away from the glass substrate 10 may include a second lens area 23a, and the orthographic projection of the second lens area 23a on the glass substrate 10 is located in the first lens area 10c. The flat layer 23 may have a plurality of second lens areas 23a, and the second lens areas 23a correspond to the first lens areas 10c one by one. A plurality of second microlenses 26 are evenly arranged in the second lens area 23a, and the plurality of second microlenses 26 are arranged in an array to form a microlens array. The second microlens 26 may be a second arc surface 27 that is recessed on the surface of the flat layer 23 away from the glass substrate 10, and the second arc surface 27 may be recessed toward the surface of the flat layer 23 away from the light-emitting structure layer 30 to form an arc-shaped groove structure. The height of the second curved surface 27 can be set to the maximum distance H2 between the second curved surface 27 and the surface of the flat layer 23 facing the light emitting structure layer 30, and the value of H2 can be 0.5μm to 25μm. In some exemplary embodiments, the cross section of the second curved surface 27 in the direction parallel to the glass substrate 10 is circular, and the maximum diameter of the cross section of the second curved surface 27 in the direction parallel to the glass substrate 10 can be D2, and the value of D2 can be 1μm to 50μm. In addition, the second curved surface 27 and the first curved surface 14 are consistent in structure, size and arrangement, but are not limited thereto. For example, the second curved surface 27 and the first curved surface 14 are inconsistent in at least one of the structure, size and arrangement.

(4) Forming a light-emitting structure layer.

Figure 21 is a sixth preparation schematic diagram of the display substrate in Figure 5, Figure 22 is a seventh preparation schematic diagram of the display substrate in Figure 5, Figure 23 is an eighth preparation schematic diagram of the display substrate in Figure 5, and Figure 24 is a ninth preparation schematic diagram of the display substrate in Figure 5. In some exemplary embodiments, as shown in Figures 21 to 24, forming a light-emitting structure layer may include: forming a first electrode pattern 33, forming a pixel definition layer pattern 35, forming a light-emitting layer 38, and forming a second electrode layer 42.

In some exemplary embodiments, as shown in FIG. 20 and FIG. 21, forming the first electrode pattern 33 includes: first depositing a layer of electrode film on the flat layer pattern 29 where the second microlens 26 is etched, and then etching the electrode film to form the first electrode pattern 33. The first electrode pattern 33 includes a stacked filter layer 24 and a flat layer 23, and a first electrode layer 34. The first electrode layer 34 covers the second lens area 23a on the flat layer 23, and extends into the via hole 32 and is attached to the connecting electrode 19, so that the first electrode layer 34 is connected to the via hole 32 of the driving circuit. The first electrode layer 34 can be used as an anode, and the first electrode layer 34 can be a light-transmitting electrode that allows light to pass through. The connecting electrode 19 and/or the first electrode layer 34 can be provided with a light-proof structure to prevent light from directly transmitting through the first electrode layer 34 at the via hole 32 and then continuing to irradiate toward the glass substrate 10. The first electrode layer 34 can cover the entire hole wall of the via hole 32, or only cover part of the hole wall of the via hole 32.

In some exemplary embodiments, as shown in FIG. 21 and FIG. 22 , forming the pixel definition layer pattern 35 includes: first depositing a layer of inorganic material film on the first electrode pattern 33, and then forming the pixel definition layer pattern 35 by etching. The pixel definition layer pattern 35 includes a pixel definition layer 36 covering the first electrode pattern 33, and a pixel opening 37 is provided on the pixel definition layer 36, and the pixel opening 37 exposes the first electrode layer 34. The pixel definition layer 36 is located on the side of the first electrode layer 34 away from the glass substrate 10, and part of the pixel definition layer 36 fills the vacancy of the via 32. There are a plurality of pixel openings 37, and the plurality of pixel openings 37 are arranged in an array. The pixel definition layer 36 can be made of a high-transmittance material, so that the pixel definition layer 36 has a high transparency, so that more light can pass through the pixel definition layer 36.

In some exemplary embodiments, as shown in FIG. 22 and FIG. 23 , the light-emitting layer 38 can be formed by evaporation, and the light-emitting layer 38 is prepared in the pixel opening 37. The light-emitting layer 38 covers the exposed end surface of the first electrode layer 34 facing away from the glass substrate 10, and the light-emitting layer 38 includes a plurality of light-emitting components 39, and the plurality of light-emitting components 39 correspond to the plurality of pixel openings 37 one by one. The light-emitting components 39 are respectively arranged in the corresponding pixel openings 37 and are located on the side of the first electrode layer 34 away from the glass substrate 10. The orthographic projections of the plurality of light-emitting components 39 on the glass substrate 10 are located within the orthographic projection range of the second lens area 23a on the glass substrate 10. The light-emitting components 39 can emit white light when powered.

In some exemplary embodiments, as shown in FIGS. 21 to 24 , the color filter 31, the flat unit 45, the first electrode unit 47, the pixel defining unit 46 and the light emitting member 39 constitute a first member 41, and the first member 41 covers a portion of the end surface of the driving circuit layer 20 away from the glass substrate 10. In the first member 41, the flat unit 45 has a concave second arc surface 27, the first electrode unit 47 fills in the groove structure formed by the second arc surface 27, and the light emitting member 39 covers the first electrode unit 47, so that the light emitting layer 38 and the first electrode layer 34 in the direction perpendicular to the glass substrate 10 corresponding to the second lens area 23a are both wavy, rather than parallel to the glass substrate 10. In the first member 41, the circumferential end face of the first member 41 in the direction parallel to the glass substrate 10 is the fourth end face 58, the end face of the filter 31 in the direction parallel to the glass substrate 10 is the third end face 53, the end face of the flat unit 45 in the direction parallel to the glass substrate 10 is the second end face 52, the end face of the pixel defining unit 46 in the direction parallel to the glass substrate 10 and away from the pixel opening 37 is the first end face 51, and the fourth end face 58 is composed of the first end face 51, the second end face 52 and the third end face 53 arranged in sequence in the direction perpendicular to the glass substrate 10. The first member 41, the driving circuit layer 20 and the glass substrate 10 constitute an intermediate blank.

In some exemplary embodiments, as shown in FIGS. 21 to 24 , forming the second electrode layer 42 includes: depositing a layer of electrode film on an intermediate blank formed by the first member 41, the driving circuit layer 20 and the glass substrate 10 to form the second electrode layer 42. The second electrode layer 42 covers the surface of the outer surface of the first member 41 away from the driving circuit layer 20 and the fourth end face 58. The second electrode layer 42 also covers the portion of the end face of the driving circuit layer 20 away from the glass substrate 10 that is not covered by the first member 41. The second electrode layer 42 can be used as a cathode, and multiple light-emitting members 39 share one cathode. The second electrode layer 42 can be made of a metal with high reflectivity, so that the second electrode layer 42 can reflect the light irradiated thereon by the light-emitting member 39 toward the glass substrate 10.

(5) Forming a packaging structure.

In some exemplary embodiments, as shown in FIG. 5 and FIG. 6 , forming the encapsulation structure layer 40 may include: preparing an encapsulation film 43 on the light emitting structure layer 30, and installing a cover plate 44 on the side of the encapsulation film 43 away from the glass substrate 10. The encapsulation film 43 may be one or more layers of inorganic or organic thin films, and the encapsulation film 43 covers the end face of the light emitting structure layer 30 away from the glass substrate 10 through thin film encapsulation technology (Thin Film Encapsulation, referred to as TFE). The encapsulation film 43 can prevent water and oxygen from entering the display substrate, providing the display substrate with good water and oxygen isolation properties. The cover plate 44 covers the side of the encapsulation film away from the glass substrate 10, and the cover plate 44 can provide protection for the display substrate.

The present disclosure also provides a display device, which may include the aforementioned display substrate. The display device may be: a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function, but the embodiments of the present invention are not limited thereto.

Although the embodiments disclosed in the present disclosure are as above, the contents described are only embodiments adopted to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. Any technician in the field to which the present disclosure belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the present disclosure, but the patent protection scope of the present invention shall still be subject to the scope defined in the attached claims.

Claims (20)

A display substrate, comprising a glass substrate and a composite layer and a flat layer arranged in a direction away from the glass substrate; The glass substrate comprises a first lens area at an end surface close to the composite layer, and the composite layer and/or the flat layer comprises a second lens area at an end surface away from the glass substrate; An orthographic projection of the second lens area on the glass substrate at least partially overlaps with an orthographic projection of the first lens area on the glass substrate. The display substrate according to claim 1, wherein a plurality of first microlenses are provided in the first lens area, and the first microlenses are arranged as first arc-shaped surfaces that are concave toward a side of the glass substrate away from the composite layer; A plurality of second micro lenses are disposed in the second lens area, and the second micro lenses are arranged as second arc-shaped surfaces that are recessed toward the glass substrate. The display substrate according to claim 2, wherein at least one of the first microlens and the second microlens has the same structure and size. The display substrate according to claim 2, wherein the composite layer is made of an inorganic-organic hybrid resin, and the refractive index of the inorganic-organic hybrid resin is 1.5 to 1.9. The display substrate according to claim 2, wherein a diameter of a cross section of the first curved surface in a direction parallel to the glass substrate is set to be 1 micrometer to 50 micrometers; The first curved surface is configured to have a maximum dimension in a direction perpendicular to the glass substrate of 0.5 micrometers to 25 micrometers. The display substrate according to claim 2, further comprising a filter layer, wherein the filter layer is arranged to cover the end surface of the flat layer close to the glass substrate, and the refractive index of the flat layer is arranged to be greater than the refractive index of the filter layer; The refractive index of the composite layer is set to be greater than the refractive index of the glass substrate. The display substrate according to claim 1, further comprising a first electrode layer, a pixel definition layer, a light emitting layer, and a second electrode layer; The first electrode layer, the light-emitting layer and the second electrode layer are stacked in sequence in a direction away from the glass substrate, the first electrode layer is located on a side of the flat layer away from the glass substrate, and the first electrode layer is configured as a light-transmitting electrode; The pixel definition layer surrounds a plurality of pixel openings, and the light emitting layer is located in the pixel definition layer within the pixel openings; The second electrode layer is configured to reflect light passing through the pixel definition layer toward the glass substrate. The display substrate according to claim 7, wherein the orthographic projection of the pixel definition layer on the glass substrate at least overlaps with the orthographic projection of the first lens area or/and the second lens area on the glass substrate. The display substrate according to claim 7, wherein the second electrode layer is arranged to enclose a plurality of first grooves facing the glass substrate; The pixel definition layer includes a plurality of pixel definition units arranged at intervals in a direction parallel to the glass substrate, and the plurality of pixel definition units all surround the pixel opening; the light-emitting layer includes a plurality of light-emitting components, and the light-emitting components and the pixel definition units are arranged in a one-to-one correspondence and are all located in the first groove. The display substrate according to claim 9, wherein the planar layer comprises a plurality of planar units, the plurality of planar units are arranged to correspond to the plurality of pixel defining units one by one and are located in the first groove, and the plurality of The flat unit is provided with the second lens area on a side away from the glass substrate. The display substrate according to claim 10, further comprising a filter layer, wherein the filter layer is located on a side of the flat layer close to the glass substrate; The filter layer includes a plurality of filters arranged at intervals in a direction parallel to the glass substrate. The filters are arranged to correspond to the pixel defining units one by one and are located in the first groove. The display substrate according to claim 11, wherein a plurality of the first lens areas are provided, the color filters are arranged in one-to-one correspondence with the first lens areas, and the orthographic projection of the first lens area on the glass substrate is located within the orthographic projection of the color filter on the glass substrate. The display substrate according to claim 11, further comprising a driving circuit layer, wherein the driving circuit layer is located between the glass substrate and the first electrode layer; The second electrode layer includes groove portions and covering portions alternately arranged in a direction parallel to the glass substrate, the groove portions are configured in a groove shape, the groove portions surround the first groove, and the covering portions cover the surface of the driving circuit layer away from the glass substrate. The display substrate according to claim 13, wherein the groove portion comprises a groove side wall and a groove bottom wall, the groove side wall is arranged to form a ring in a direction parallel to the glass substrate, and the groove bottom wall is arranged to close an end of the groove side wall away from the glass substrate; The circumferential surface of the pixel defining unit in a direction parallel to the glass substrate is set as a first end surface; The circumferential surface of the flat unit in a direction parallel to the glass substrate is set as a second end surface; The circumferential surface of the filter in a direction parallel to the glass substrate is arranged as a third end surface; The first end surface, the second end surface and the third end surface are arranged in sequence in a direction perpendicular to the glass substrate; The groove sidewall is configured to cover the first end surface, the second end surface and the third end surface; The groove bottom wall is configured to cover the pixel defining unit and the end surface of the light emitting member away from the glass substrate. The display substrate according to claim 11, further comprising a driving circuit component and a light shielding layer, wherein the driving circuit component is located between the planar layer and the composite layer; The first electrode layer includes a plurality of first electrode units, and the first electrode units are arranged in the first groove; The driving circuit assembly includes a connecting electrode, and the first electrode unit is connected to the connecting electrode through a via hole; The light shielding layer is configured as a high reflectivity metal film, and the light shielding layer is located on the first electrode layer and/or the connecting electrode and is configured corresponding to the via hole to shield the light directly irradiated from the via hole to the glass substrate. The display substrate according to claim 15, wherein the light shielding layer is arranged to cover the end surface of the connecting electrode facing the via hole, and the orthographic projection of the light shielding layer on the glass substrate is arranged to at least partially overlap with the orthographic projection of the via hole on the glass substrate. The display substrate according to claim 15, wherein the first electrode unit comprises a via-hole connecting portion located in the via-hole, and the light shielding layer is configured to cover an end surface of the via-hole connecting portion away from the glass substrate. The display substrate according to claim 15, wherein the via hole is configured to penetrate the planar layer and the filter layer, the first electrode unit is configured to cover at least a portion of a hole wall of the via hole, and the pixel definition layer extends into the via hole. A preparation method, applied to the display substrate according to claim 1, comprising: A plurality of first micro-lenses are formed on the glass substrate, wherein the first lens area is provided with a plurality of first micro-lenses, and the first micro-lenses are arranged to be first arc-shaped surfaces that are concave toward the end surface of the glass substrate away from the composite layer; A plurality of second microlenses are formed on the composite layer and/or the flat layer, a plurality of second microlenses are arranged in the second lens area, and the second microlenses are arranged as second arc-shaped surfaces recessed toward the glass substrate. A display device, comprising the display substrate according to any one of claims 1 to 18.