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WO2025198195A1 - Circuit de compensation de données et dispositif d'affichage le comprenant - Google Patents

Circuit de compensation de données et dispositif d'affichage le comprenant

Info

Publication number
WO2025198195A1
WO2025198195A1 PCT/KR2025/002420 KR2025002420W WO2025198195A1 WO 2025198195 A1 WO2025198195 A1 WO 2025198195A1 KR 2025002420 W KR2025002420 W KR 2025002420W WO 2025198195 A1 WO2025198195 A1 WO 2025198195A1
Authority
WO
WIPO (PCT)
Prior art keywords
value
compensation
image data
data
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/KR2025/002420
Other languages
English (en)
Korean (ko)
Inventor
유종상
박준영
이진호
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LX Semicon Co Ltd
Original Assignee
LX Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020250020128A external-priority patent/KR20250140429A/ko
Application filed by LX Semicon Co Ltd filed Critical LX Semicon Co Ltd
Publication of WO2025198195A1 publication Critical patent/WO2025198195A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • An embodiment of the present invention relates to a data compensation circuit and a display device including the same.
  • LCDs liquid crystal display devices
  • OLEDs organic light emitting display devices
  • a display device includes a display panel including a plurality of pixels, a panel driver for driving the display panel, etc.
  • the panel driver includes a data driver for supplying a data voltage to the display panel, and a gate driver for supplying a gate signal to the display panel.
  • Such a display device can display an image by supplying a driving signal, such as a gate signal and a data signal, to a plurality of pixels formed on a display panel, causing the selected pixels to transmit light or directly emit light.
  • a driving signal such as a gate signal and a data signal
  • Embodiments of the present invention can provide a data compensation circuit and a display device including the same.
  • the above-mentioned area determination unit can determine whether a pixel to be written with the input image data is located in a predetermined compensation area within the display area using a binary map in which the emission of light-emitting elements for each pixel is binarized and displayed.
  • the compensation area may have a smaller number of pixel lines than an area in which all light-emitting elements normally emit light.
  • the above compensation value may include an offset value and a gain
  • the lookup table may include a first lookup table in which a predetermined first reference tone value and an offset value are mapped, and a second lookup table in which a predetermined second reference tone value and a gain are mapped.
  • the above compensation value generation unit can estimate an offset value for a tone value of the image data by interpolating an offset value mapped to a first reference tone value of the first lookup table, and can estimate a gain for a tone value of the image data by interpolating a gain mapped to a second reference tone value of the second lookup table.
  • the above compensation value generation unit can estimate an offset value for the grayscale value of the image data by interpolating using a predetermined slope when the grayscale value of the image data is smaller than the smallest value or larger than the largest value among the first reference grayscale values.
  • the above data compensation unit can compensate for the image data by adding a value obtained by multiplying the offset value estimated from the compensation value generation unit by the gain to the input image data.
  • a display device may include a display panel in which pixels are arranged in an area where a plurality of gate lines and a plurality of data lines intersect; a gate driver for outputting a gate signal through the gate lines; a data driver for outputting a data voltage through the data lines; and a timing controller for controlling the gate driver and the data driver, wherein the timing controller includes a data compensation circuit for compensating for image data of an input image input from the outside, and the data compensation circuit may include an area determination unit for determining whether a pixel into which image data input in units of pixels is to be written is located in a predetermined compensation area within a display area; a compensation value generation unit for generating a compensation value using a lookup table stored in advance based on a grayscale value of the image data when the pixel into which the image data is to be written is located in the compensation area; and a data compensation unit for compensating for the image data using the compensation value.
  • the present invention determines a compensation area requiring luminance compensation within a display area according to the shape of a display panel, calculates a compensation value according to the grayscale value of image data written in pixels located in the compensation area using a lookup table, and applies the calculated compensation value to the image data, thereby actively compensating for luminance that varies according to the shape of the display panel.
  • the present invention can improve brightness uniformity in the entire area of a display panel because it performs brightness compensation for a compensation area in which the target brightness appears high within the display area.
  • FIG. 1 is a drawing showing a display device according to an embodiment of the present invention.
  • Fig. 2 is a diagram showing the data compensation circuit illustrated in Fig. 1.
  • Figure 3 is a diagram for explaining the principle of generating a binary map.
  • Figures 4 to 6 are drawings for explaining the principle of determining the reference area and the compensation area.
  • FIGS 7 to 10 are drawings for explaining the compensation value generation principle according to an embodiment of the present invention.
  • FIG. 11 is a diagram showing an image data compensation process according to an embodiment of the present invention.
  • ordinal numbers 1, 2, etc. may be used before the names of components; however, these ordinal numbers or names of components do not limit their function or structure. For convenience of explanation, the ordinal numbers preceding the names of the same components may differ across embodiments.
  • FIG. 1 is a drawing showing a display device according to an embodiment of the present invention.
  • a display device may include a display panel (110) and a display driving circuit for driving the display panel.
  • the display driving circuit may include a gate driving unit (120), a data driving unit (130), and a timing controller (140).
  • the display device may further include a host system (150) that supplies various timing signals to the timing controller (140).
  • the display panel (110) may include a plurality of gate lines (GL1 to Gn) and a plurality of data lines (DL1 to DLm) that are arranged in a cross-sectional manner to define a plurality of pixel areas, and pixels (P) that are respectively provided in the plurality of pixel areas and arranged in a matrix form.
  • Each of the pixels (P) may be divided into a red pixel that emits red light, a green pixel that emits green light, and a blue pixel that emits blue light for color implementation, but is not limited thereto.
  • the gate driver (120) may be arranged on one side of the display panel (110), for example, on the left side, as shown, but may also be arranged on both one side and the other side of the display panel (110), for example, on both the left and right sides, facing each other, as needed.
  • the gate driver (120) may include a plurality of gate driver ICs (Gate Driver Integrated Circuits, not shown).
  • the gate driver (120) may be formed in the form of a tape carrier package in which a gate driver IC is mounted, but is not necessarily limited thereto, and the gate driver IC may be mounted directly on the display panel (110).
  • the data driving unit (130) converts a digital image signal transmitted from the timing controller (140) into an analog source signal and outputs it to the display panel (110). Specifically, the data driving unit (130) outputs an analog source signal to the data lines (DL1 to DLm) in response to a data control signal (DCS: Data Control Signal) transmitted from the timing controller (140).
  • DCS Data Control Signal
  • the data driving unit (130) may be disposed on one side of the display panel (110), for example, on the upper side, but may also be disposed on both one side and the other side of the display panel (110), for example, on both the upper and lower sides, facing each other, depending on the case.
  • the data driving unit (130) may be formed in the form of a tape carrier package in which a source driver IC is mounted, but is not necessarily limited thereto.
  • the timing controller (140) can receive various timing signals including a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable (DE) signal, a clock signal (CLK), etc. from the host system (150) and generate a data control signal (DCS) for controlling the data driver (130) and a gate control signal (GCS) for controlling the gate driver (120).
  • the timing controller (140) can receive image data (RGB) from the host system (150) and convert it into image data (RGB') in a form that can be processed by the data driver (130) and output it.
  • the data control signal may include a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE), and the gate control signal (GCS) may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE).
  • SSP source start pulse
  • SSC source sampling clock
  • SOE source output enable signal
  • GCS gate control signal
  • GSP gate start pulse
  • GSC gate shift clock
  • GOE gate output enable signal
  • the host system (150) may be implemented as any one of a navigation system, a set-top box, a DVD player, a Blu-ray player, a personal computer (PC), a home theater system, a broadcast receiver, and a phone system.
  • the host system (150) can include a system on chip (SoC) with a built-in scaler to convert digital image data (RGB) of an input image into a format suitable for display on a display panel (110).
  • SoC system on chip
  • the host system (150) can transmit digital image data (RGB) and various timing signals to a timing controller (140).
  • FIG. 2 is a diagram showing the data compensation circuit illustrated in FIG. 1
  • FIG. 3 is a diagram explaining the principle of generating a binary map
  • FIGS. 4 to 6 are diagrams explaining the principle of determining a reference area and a compensation area.
  • a data compensation circuit (141) may include an area determination unit (141a), a compensation value generation unit (141b), an LUT storage unit (141c), and a data compensation unit (141d).
  • the area determination unit (141a) can determine the reference area and the compensation area within the display area using a pre-stored binary map. For example, in an embodiment as shown in FIG. 3, an inspection device such as a camera can be used to apply a driving voltage to a pixel driving circuit within the display panel to cause a light-emitting element to emit light, and then an image can be acquired, and the acquired image can be binarized to generate a binary map.
  • a light-emitting element marked in black represents a light-emitting element in an area that has been removed as the shape of the display panel has changed. Therefore, in the binary map, a light-emitting element that normally emits light can be mapped to '1', and a light-emitting element in an area that has been removed can be mapped to '0' because it does not emit light.
  • the binary map can be generated from an image obtained while the manufacturing process of the display panel is in progress, rather than after the manufacturing process has been completed, for example, while the pixel driving circuit is arranged on the substrate and the light emitting element is transferred on top of the pixel driving circuit.
  • the display area can be divided into a reference area and a compensation area.
  • the reference area may be an area where all light-emitting elements emit light normally
  • the compensation area may be an area where some light-emitting elements are removed and do not emit light.
  • the reference area and the compensation area may vary depending on the shape of the display panel.
  • the shape of the display panels (110) constituting the signage device (110') may vary depending on the overall shape of the signage device.
  • a reference area (A1) and a compensation area (A2) can be distinguished as in Fig. 5.
  • a reference area (A1) and a compensation area (A2) can be distinguished as in Fig. 6.
  • the compensation area (A2) may have fewer pixel lines than the normal area (A1).
  • the reference area (A1) since all light-emitting elements in the reference area (A1) emit light normally, the reference area (A1) is similar to the target luminance, and thus luminance compensation is not required. However, since some light-emitting elements are removed and do not emit light in the compensation area (A2), the number of light-emitting elements that emit light is smaller than in the reference area (A1), and thus the compensation area has a luminance value higher than the target luminance. Luminance compensation is required to make the luminance of the compensation area (A2) similar to the luminance of the reference area (A1). Therefore, in the embodiment, it is intended to perform luminance compensation for the compensation area within the display area.
  • the target brightness can be calculated using the brightness value of each light-emitting element in the reference area (A1).
  • the target brightness can be calculated as an average value of the brightness values of each light-emitting element in the reference area (A1), but is not necessarily limited thereto.
  • the compensation value generation unit (141b) can generate a compensation value for pixels within a compensation area based on digital image data of an input image, and provide the generated compensation value to the data compensation unit (141c).
  • the compensation value can include an offset value and a gain.
  • the compensation value generation unit (141b) may include a first compensation value generation unit (141b-1) and a second compensation value generation unit (141b-2).
  • the first compensation value generation unit (141b-1) may generate an offset value using a predetermined lookup table based on the grayscale values of the input image data.
  • the second compensation value generation unit (141b-2) may generate a gain using a predetermined lookup table based on the grayscale values of the input image data.
  • the LUT storage unit (141c) can store a look-up table (LUT) in which predetermined reference tone values and compensation values are mapped for each pixel.
  • the reference tone values applied to the look-up table and the compensation values mapped to the reference tone values may be tunable factors.
  • a look-up table for predetermined reference tone values is created, and interpolation is performed using the created look-up table, thereby estimating compensation values for all tone values.
  • the lookup table may include a first lookup table in which a first reference tone value and an offset value are mapped, and a second lookup table in which a second reference tone value and a gain are mapped.
  • the first reference tone value and the second reference tone value may be set to the same value or different values.
  • the data compensation unit (141d) can generate image data with compensated brightness by applying an offset value and gain to the input pixel-by-pixel image data.
  • the data compensation unit (141d) can provide the compensated image data for each pixel to the data driving unit.
  • the compensated image data (RGB') can be expressed as in the following mathematical expression 1.
  • RGB' RGB + (offset ⁇ gain)
  • RGB is the input image data
  • offset is the offset value
  • gain can be the gain
  • FIGS 7 to 10 are drawings for explaining the compensation value generation principle according to an embodiment of the present invention.
  • a compensation value generation unit (141b) can estimate an offset value using a first lookup table determined in advance based on the grayscale value of input pixel-by-pixel image data.
  • grayscale values Gray_la, Gray_lb, and Gray_lc can be preset reference grayscale values.
  • the compensation value generation unit (141b) can estimate the offset value (offset) for the grayscale value Gray_n by interpolating the offset value (offset1) mapped to the grayscale value Gray_la and the offset value (offset2) mapped to the grayscale value Gray_lb based on the lookup table (LUT1) for the grayscale value Gray_la and the lookup table (LUT2) for the grayscale value Gray_lb.
  • the offset value for the grayscale value Gray_n may be greater than the offset value (offset1) mapped to the grayscale value Gray_la and less than the offset value (offset2) mapped to the grayscale value Gray_lb.
  • the offset value for the grayscale value Gray_n is defined as in the following mathematical expression 2.
  • Gray_n is a grayscale value of the input image data
  • lower gray is a lower reference grayscale value for performing interpolation
  • upper gray is an upper reference grayscale value for performing interpolation
  • offset upper is an offset value mapped to the upper grayscale value
  • offset lower may be an offset value mapped to the lower grayscale value.
  • the compensation value generation unit (141b) can estimate an offset value for the grayscale value Gray_n using a predetermined slope value '0' when the grayscale value of the image data is Gray_n and Gray_n ⁇ Gray_la or Gray_lc ⁇ Gray_n.
  • the slope value '0' means that the offset value does not change.
  • the compensation value generation unit (141b) can estimate the offset value for the grayscale value Gray_n as the offset value (offset1) mapped to the grayscale value Gray_la of the lookup table (LUT1) when it is smaller than the grayscale value Gray_la.
  • the compensation value generation unit (141b) can estimate the offset value for the grayscale value Gray_n as the offset value (offset3) mapped to the grayscale value Gray_lc of the lookup table (LUT3) when it is larger than the grayscale value Gray_lc. Therefore, the offset value for the grayscale value Gray_n can be the same as the offset value (offset1) mapped to the grayscale value Gray_la or the offset value (offset3) mapped to the grayscale value Gray_lc.
  • the compensation value generation unit (141b) can estimate an offset value for the grayscale value Gray_n using a predetermined slope value 'a' or 'b' when the grayscale value of the image data is Gray_n and Gray_n ⁇ Gray_la or Gray_lc ⁇ Gray_n.
  • the slope value 'a' can be applied when it is greater than the grayscale value Gray_lc
  • the slope value 'b' can be applied when it is less than the grayscale value Gray_la.
  • the compensation value generation unit (141b) can estimate the offset value for the grayscale value Gray_n using the slope value 'a' when it is greater than the grayscale value Gray_lc. Therefore, the offset value for the grayscale value Gray_n may be greater than the offset value (offset3) mapped to the grayscale value Gray_lc of the lookup table (LUT3).
  • the offset value for the grayscale value Gray_n is defined as in the following mathematical expression 3.
  • the compensation value generation unit (141b) can estimate the offset value for the grayscale value Gray_n using the slope value 'b' when it is smaller than the grayscale value Gray_la. Therefore, the offset value for the grayscale value Gray_n may be smaller than the offset value (offset1) mapped to the grayscale value Gray_la of the lookup table (LUT1).
  • the offset value for the grayscale value Gray_n is defined as in the following mathematical expression 4.
  • Gray_max is the maximum grayscale value
  • Offset max can be an offset value mapped to the maximum grayscale value
  • the slope value 'a' and the slope value 'b' can be set to be the same or different.
  • a compensation value generation unit (141b) can estimate a gain using a second lookup table determined in advance based on the grayscale value of input pixel-by-pixel image data.
  • grayscale values Gray_l1, Gray_l2, Gray_l3, and Gray_l4 can be predetermined reference grayscale values.
  • the gain for the grayscale value Gray_n can be estimated by interpolating based on the gain (gain1) mapped to the grayscale value Gray_l1 and the gain (gain2) mapped to the grayscale value Gray_l2.
  • the gain for the grayscale value Gray_n is defined as in the following mathematical expression 5.
  • Gray_n is the grayscale value of the input image data
  • lower gray is the lower grayscale value for performing interpolation
  • upper gray is the upper grayscale value for performing interpolation
  • gain upper is the gain mapped to the upper grayscale value
  • gain lower can be the gain mapped to the lower grayscale value.
  • the gain is estimated based on the grayscale value of the image data, but it may be a predetermined value based on the luminance measured using the inspection equipment after applying the offset value.
  • a data compensation circuit can receive image data in pixel units (S110).
  • the data compensation circuit can determine whether the corresponding pixel to which image data is to be written is located in the compensation area within the display area using a pre-stored binary map (S120).
  • the data compensation circuit can estimate the offset value and gain using a predetermined lookup table based on the grayscale value of the input image data when the corresponding pixel is located in the compensation area (S130).
  • the data compensation circuit can estimate an offset value using a first lookup table based on the grayscale values of the image data, and can estimate a gain using a second lookup table.
  • the data compensation circuit may not perform the process of generating a compensation value because there is no need to compensate if the corresponding pixel is not located in the compensation area.
  • the data compensation circuit can generate image data with luminance compensated for by applying an estimated offset value and gain to the input pixel-by-pixel image data (S140).
  • the data compensation circuit can output compensated image data to the data driver (S150).
  • the data driver can supply the compensated image data to pixels within the compensation area.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

Un mode de réalisation de la présente invention concerne un circuit de compensation de données et un dispositif d'affichage le comprenant. Le circuit de compensation de données comprend : une unité de détermination de zone servant à déterminer si un pixel dans lequel des données d'image entrées dans des unités de pixels doivent être écrites est situé dans une zone de compensation prédéterminée à l'intérieur d'une zone d'affichage ; une unité de génération de valeur de compensation servant à générer une valeur de compensation sur la base d'une valeur d'échelle de gris des données d'image et à l'aide d'une table de consultation stockée à l'avance lorsque le pixel dans lequel les données d'image doivent être écrites est situé dans la zone de compensation ; et une unité de compensation de données servant à compenser les données d'image à l'aide de la valeur de compensation.
PCT/KR2025/002420 2024-03-18 2025-02-20 Circuit de compensation de données et dispositif d'affichage le comprenant Pending WO2025198195A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2024-0037426 2024-03-18
KR20240037426 2024-03-18
KR1020250020128A KR20250140429A (ko) 2024-03-18 2025-02-17 데이터 보상회로 및 이를 포함하는 표시 장치
KR10-2025-0020128 2025-02-17

Publications (1)

Publication Number Publication Date
WO2025198195A1 true WO2025198195A1 (fr) 2025-09-25

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Application Number Title Priority Date Filing Date
PCT/KR2025/002420 Pending WO2025198195A1 (fr) 2024-03-18 2025-02-20 Circuit de compensation de données et dispositif d'affichage le comprenant

Country Status (1)

Country Link
WO (1) WO2025198195A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210148468A (ko) * 2020-05-28 2021-12-08 삼성디스플레이 주식회사 표시장치 및 계조값 조정방법
KR20220010650A (ko) * 2020-07-16 2022-01-26 삼성디스플레이 주식회사 영상 데이터 보정 장치 및 이를 포함하는 표시 장치
KR20230072460A (ko) * 2018-10-10 2023-05-24 삼성디스플레이 주식회사 표시 장치
WO2023108550A1 (fr) * 2021-12-16 2023-06-22 Jade Bird Display (Shanghai) Company Système de détection de défaut de pixel
KR20230127106A (ko) * 2022-02-24 2023-08-31 삼성전자주식회사 디스플레이 장치 및 그 제어 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230072460A (ko) * 2018-10-10 2023-05-24 삼성디스플레이 주식회사 표시 장치
KR20210148468A (ko) * 2020-05-28 2021-12-08 삼성디스플레이 주식회사 표시장치 및 계조값 조정방법
KR20220010650A (ko) * 2020-07-16 2022-01-26 삼성디스플레이 주식회사 영상 데이터 보정 장치 및 이를 포함하는 표시 장치
WO2023108550A1 (fr) * 2021-12-16 2023-06-22 Jade Bird Display (Shanghai) Company Système de détection de défaut de pixel
KR20230127106A (ko) * 2022-02-24 2023-08-31 삼성전자주식회사 디스플레이 장치 및 그 제어 방법

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