WO2025038184A1

WO2025038184A1 - Chalcogenide phase-change material (pcm) boosted rfsoi high-voltage rf switch

Info

Publication number: WO2025038184A1
Application number: PCT/US2024/035503
Authority: WO
Inventors: Eric K. BOLTON; Daniel Charles Kerr; Michael Carroll
Original assignee: Qorvo US Inc
Current assignee: Qorvo US Inc
Priority date: 2023-08-16
Filing date: 2024-06-26
Publication date: 2025-02-20
Anticipated expiration: 2026-02-16
Also published as: TW202529399A

Abstract

A unit cell and a radio frequency (RF) switch made up of a plurality of the unit cells are disclosed. The unit cell has a phase-change material (PCM) switch and at least one transistor coupled in parallel across the PCM switch. The RF switch further comprises a switch controller having a first control terminal coupled to heating elements of the plurality of unit cells and a second control terminal coupled to a gate terminal of the at least one transistor, wherein the switch controller is configured to independently control the switching of the PCM switch and the at least one transistor. The RF switch is made up of stacks of the unit cells coupled in parallel wherein each heating element is configured to heat PCM of the plurality of unit cells between a conductive state and non-conductive state to transition the PCM switch between an on-state and off-state.

Description

CHALCOGENIDE PHASE-CHANGE MATERIAL (PCM) BOOSTED RFSOI HIGH-VOLTAGE RF SWITCH

Related Applications

[001] This application claims the benefit of provisional patent application serial number 63/519,858, filed August 16, 2023, the disclosure of which is hereby incorporated herein by reference in its entirety.

Field of the Disclosure

[002] The present disclosure relates to radio frequency (RF) switches and in particular to RF switches that include switching elements based on chalcogenide phase-change material (PCM).

Background

[003] In the past few years there have been advancements in the use of phase-change materials (PCM) for radio frequency (RF) switches. These switches use a thermal pulse to transition the PCM from its crystalline phase (low resistance) to its amorphous phase (high resistance) to achieve a very low figure of merit RF switch of around 10 femtoseconds (fs). These switches are usually very low capacitance with a more nominal resistance to achieve the figure of merit that is roughly 10X lower than a silicon-on-insulator solution. One challenge with PCM switches is the high current required to switch the device — a 120 milliampere (mA) pulse for 150 nanoseconds (ns) to switch to the off-state and 60 mA pulse for 1000 ns to switch to the on-state. This presents a challenge for many applications due to the high current required if the duty cycle of switching events is high. A second challenge is that because of the very low capacitance, voltage stacking is not possible. This limits the RF voltage handling of a native PCM switch to around 10 volts (V).

Summary

[004] A unit cell and a radio frequency (RF) switch made up of a plurality of the unit cells are disclosed. The unit cell has a phase-change material (PCM) switch and at least one transistor coupled in parallel across the PCM switch. The RF switch further comprises a switch controller having a first control terminal coupled to heating elements of the plurality of unit cells and a second control terminal coupled to a gate terminal of the at least one transistor, wherein the switch controller is configured to independently control the switching of the PCM switch and the at least one transistor. The RF switch is made up of stacks of the unit cells coupled in parallel wherein each heating element is configured to heat PCM of the plurality of unit cells to a first temperature to make the PCM conductive in response to a first pulsed current level flowing through the control terminal and to heat the PCM to a second temperature to make the PCM non-conductive in response to a second pulsed current level flowing through the control terminal.

[005] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.

Brief Description of the Drawing Figures

[006] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure. [007] FIG. 1 is a graph depicting voltage handling degradation of a 32-stack device versus single-stack off-state capacitance.

[008] FIG. 2 is a schematic of a related-art PCM-based switch stack having parallel capacitors with capacitances sized to increase voltage handling over a traditional PCM-based switch stack that does not include parallel capacitors.

[009] FIG. 3 is a schematic of a first exemplary embodiment of a PCM-based switch stack that is structured in accordance with the present disclosure.

[0010] FIG. 4 is a schematic of an exemplary embodiment of a PCM-based switch that is structured in accordance with the present disclosure.

[0011] FIG. 5 is table listing unit cell characteristics for a traditional PCM switch, a silicon-on-insulator (SOI)-three-device stack, and the combined PCM switch and SOI-three-device stack depicted in FIG. 4. [0012] FIG. 6 is a schematic of a second exemplary embodiment of a PCM-based switch stack that is structured in accordance with the present disclosure.

[0013] FIG. 7 is a table that compares four different switches that have a breakdown voltage of at least 100 V.

[0014] FIG. 8 is a diagram showing how the disclosed PCM-based switch stack may interact with user elements such as wireless communication devices.

Detailed Description

[0015] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0016] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

[0017] It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.

[0018] Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

[0019] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

[0020] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0021] Embodiments are described herein with reference to schematic illustrations of embodiments of the disclosure. As such, the actual dimensions of the layers and elements can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure. Additionally, sizes of structures or regions may be exaggerated relative to other structures or regions for illustrative purposes and, thus, are provided to illustrate the general structures of the present subject matter and may or may not be drawn to scale. Common elements between figures may be shown herein with common element numbers and may not be subsequently re-described.

[0022] The present disclosure relates to a combination of a state-of-the-art radio frequency silicon-on-insulator (RFSOI) switch with a phase-change material (PCM) RF switch. The combination may be configured to have a degraded figure of merit (FoM) compared with a native PCM RF switch but with a combined FoM that is roughly 2.5 times less than the best RFSOI FoM available today. The combination is a feasible solution because the PCM switches can be implemented as a back-end-of-line feature added to a base complementary metal oxide semiconductor (CMOS) or SOI process. The technical benefits of combining the RFSOI in parallel with the PCM switch are at least the following:

1 . The capacitance of the RFSOI switch can be used to effectively voltage stack the PCM switch. This capacitance will degrade the FoM but can be turned on in the on-state to combine in parallel with the PCM switch on-state resistance. The result is a combination with much lower FoM than a typical RFSOI switch with voltage stacking capability up to 100 V or greater.

2. Another benefit of combining in parallel is the flexibility to switch only the RFSOI switch in certain applications where the best FoM is not required and to save the large current consumption required to switch the PCM device. 3. Another benefit is that the RFSOI switch can be used to protect the PCM device from hot switching damage. The RFSOI switch could short out the PCM device during a switching event to prevent the RF power from damaging the PCM device much like a pilot switch in a microelectromechanical systems (MEMS) device.

4. A final benefit is that the RFSOI switch can be used to provide electrostatic discharge (ESD) protection for the PCM device.

[0023] The PCM switch retains its switch state even when power is not applied. The SOI switch will appear open to small signals when power is not applied. In combination, the switch retains the state of the PCM switch for small signals. This can be used in a low-power receive switch.

• Combining a RFSOI switch in parallel with a PCM switch.

• Combining an N stack RFSOI switch in parallel with a PCM switch to match the voltage handling of each element.

• Stacking the combination of an N stack RFSOI switch in parallel with the PCM switch to build a high-voltage combination switch.

• Using the combined solution in such a way to use only the RFSOI switch during most events and only to use the PCM switch when lowest FoM is required. This approach limits the current consumption impact in an application from changing the phases of the PCM switch.

• Using the combined solution so as to use the RFSOI switch to protect the PCM switch during hot switching events, much like the pilot switch concept in the MEMS technology — shorting out the PCM switch with the RFSOI during its switching transition to protect it during hot switching. This allows the RFSOI switch to absorb the hot switching power.

• Using the combined solution in such a way that the RFSOI switch protects the PCM switch during an ESD event.

• Using the combined solution, the PCM switch will go through a destructive breakdown if it exceeds its voltage handling limit. If the SOI switch stack is designed to ensure that the SOI switch goes into breakdown before the PCM switch, then the use of the SOI switch can protect the PCM switch from ever seeing breakdown. When the SOI switch goes into breakdown, the RF voltage is reduced, thus protecting the PCM switch.

[0024] In this regard, it is well known that very low capacitance switches have difficulty in effectively stacking to achieve higher voltage handling because of the coupling capacitance to other nodes that disrupt the voltage division of a stack of series capacitors (off-state switches). The ratio of Cswitch to Cparastic is often tracked as a metric for effective voltage handling. In a typical application, Cparasitic can be affected by adjacent switches, bump pads, proximity of ground signals, or other non-radio frequency voltages. In a given application where Cparasitic is fixed, the voltage handling of a stacked switch usually gets worse with lower capacitance of each switch in the stack. FIG. 1 is a graph with a measured plot of this behavior for a RFSOI switch.

[0025] For comparison to the plot of FIG. 1 , a single PCM switch can have a capacitance of approximately 10 femtofarads (fF). This is approximately 30 times smaller than the example of FIG. 1 showing roughly 30% degradation of stacked voltage handling. The RF voltage handling limit of a stacked PCM switch has shown no improvement with stacking up to three stacks.

[0026] FIG. 2 is a schematic of a related-art PCM-based switch stack 10 having a first PCM switch 1 , a second PCM switch 2, a third PCM switch 3, and a fourth PCM switch 4. A first capacitor C1 is coupled across the first PCM switch 1 at a first input terminal 12-1 and a first output terminal 14-1. A first heating element 16-1 is coupled between a PCM switch controller 18 and a fixed voltage node GND1 . The PCM switch controller 18 has a PCM control output 20 that couples to a control bus CTRL1 . A second capacitor C2 is coupled across the second PCM switch 2 at a second input terminal 12-2 and a second output terminal 14-2. A second heating element 16-2 is coupled between the PCM switch controller 18 and the fixed voltage node GND1 . A third capacitor C3 is coupled across the third PCM switch 3 at a third input terminal 12-3 and a third output terminal 14-3. A third heating element 16-3 is coupled between the PCM switch controller 18 and the fixed voltage node GND1 . A fourth capacitor C4 is coupled across the fourth PCM switch 4 at a fourth input terminal 12-4 and a fourth output terminal 14-4. A fourth heating element 16-4 is coupled between the PCM switch controller 18 and the fixed voltage node GND1 . The first PCM switch 1 , the second PCM switch 2, the third PCM switch 3, and the fourth PCM switch 4 are coupled in series between an RF input labeled RFIN and an RF output labeled RFOUT.

[0027] In operation, the PCM switch controller 18 activates the heating elements 16-1 through 16-4 to bring the chalcogenide PCM to a first temperature to phase change the chalcogenide PCM to a low-resistance state that is substantially conductive, placing each of PCM switch 1 through PCM switch 4 into an on-state. When desired, the PCM switch controller then activates the heating elements 16-1 through 16-4 to bring the chalcogenide PCM to a second temperature to phase change the chalcogenide PCM to a high-resistance state that is substantially non-conductive, placing each of the PCM switch 1 through PCM switch 4 into an off-state. The addition of capacitors C1 through C4 in parallel with the PCM switch 1 through PCM switch 4, respectively, increases total breakdown voltage although with diminishing benefit with added stacks beyond four PCM switches.

[0028] The present disclosure relates to a PCM/RFSOI switch stack 22 that combines an RFSOI switch with normal resistive biasing in parallel with a PCM switch, as shown in FIG. 3. This implementation employs RFSOI switches M1 , M2, and M3 through MN to realize enough added capacitance needed to stack PCM switch 1 through an nth PCM switch N, wherein N is a counting number. This embodiment has an advantage in that the on-state of each of RFSOI switches M1 through MN acts as a parallel resistor to reduce the resistance of the RFSOI/PCM switch stack 22 and thus minimizes a negative effect of the added capacitance to a combined FoM. In this embodiment, a PCM/SOI combined switch controller 24 is provided to control the on-states and the off-states of PCM switch 1 through PCM switch N together or separately with the RFSOI switches M1 through MN. To control on-states and off-states of the RFSOI switches M1 , M2, and M3 through MN, a second control bus CTRL2 is coupled between a RFSOI control output 26 and a gate voltage input 28 labeled VG. A series string of resistors R1 , R2, R3, R4, R5, and R6 through RJ-1 and RJ, wherein J is a counting number, is coupled between the gate voltage input 28 and the fixed voltage node GND1 to divide a voltage VG between gates G1 , G2, G3, and GN. Among other advantages, drain-to-source resistors RDS1 , RDS2, and RDS3 through RDSN provide for more uniform drain-to-source voltages.

[0029] Using the PCM switch 1 with voltage handling of approximately

10 V, a three-stack RFSOI switch switches M1 , M2, and M3 can be coupled in parallel with the PCM switch 1 to form a unit cell 30 shown in FIG. 4. FIG. 5 is a table listing unit cell characteristics for a traditional PCM switch, a silicon-on- insulator (SOI)-three-device stack, and the combined PCM switch and SOI- three-device stack that forms unit cell 30 depicted in FIG. 4. As shown in the table, a PCM switch of approximately 1 ohm and 10.5 fF with a FoM of 10 femtoseconds (fs) could be combined in parallel with a three-stack 0.5 mm RFSOI switch of around 2 ohms and 50 fF with a FoM of 100 fs to yield a 10 V capable unit cell with combined Ron of 0.64 ohm, 60.5 fF, and a 39 fs FoM. [0030] In another embodiment of the PCM/RFSOI switch stack 22, the unit cell 30 depicted in FIG. 4 can be stacked further to increase voltage handling by combining X number of unit cells 30 in parallel and connecting the parallel unit cells 30 in Y stacks in series to achieve the voltage handling and Ron desired for the application, as shown in FIG. 6, wherein X and Y are counting numbers greater than 2. In the exemplary embodiment of FIG. 6, X=4 and Y=2. However, X and Y can be further increased to practically meet any combination of voltage handling and Ron specifications.

[0031] In FIG. 6, a first unit cell 30-1 is coupled in series with a second unit cell 30-2 by way of the second input terminal 12-2 being coupled to the first output terminal 14-1 , and a third unit cell 30-3 is coupled in series with a fourth unit cell 30-4 by way of the third output terminal 14-3 being coupled to the fourth input terminal 12-4. Moreover, the third unit cell 30-3 is coupled in parallel with the first unit cell 30-1 by way of the third input terminal 12-3 being coupled to the first input terminal 12-1 and the third output terminal 14-3 being coupled to the first output terminal 14-1 . The fourth unit cell 30-4 is coupled in parallel with the second unit cell 30-2 by way of the fourth input terminal 12-4 being coupled to the second input terminal 12-2 and by way of the fourth output terminal 14-4 being coupled to the second output terminal 14-2. In this embodiment, the CTRL1 bus is configured to control the switching of the PCM switch 1 , the PCM switch 2, the PCM switch 3, and the PCM switch 4. In other embodiments, the PCM switch 1 and the PCM switch 2 may be independently controlled relative to the PCM switch 3 and the PCM switch 4. [0032] The second unit cell 30-2 has a series stack of transistors M4, M5, and M6 coupled across the second PCM switch 2 between the second input terminal 12-2 and the second output terminal 14-2. Drain-to-source resistors RDS4, RDS5 and RDS6 are coupled across the transistors M4, M5, and M6, respectively. A series string of resistors R7, R8, R9, R10, R11 , and R12 are coupled between the gate voltage terminal 28 and the series string of resistors R1 through R6. The series string of resistors R7 through R12 distributes the gate voltage VG to gates G4, G5, and G6.

[0033] The third unit cell 30-3 has a series stack of transistors M7, M8, and M9 coupled across the third PCM switch 3 between the third input terminal 12-3 and the third output terminal 14-3. Drain-to-source resistors RDS7, RDS8, and RDS9 are coupled across the transistors M7, M8, and M9, respectively. A series string of resistors R13, R14, R15, R16, R17, and R18 is configured to distribute the gate voltage VG to gates G7, G8, and G9. [0034] The fourth unit cell 30-4 has a series stack of transistors M10, M11 , and M12 coupled across the fourth PCM switch 4 between the fourth input 12-4 and the fourth output 14-4. Drain-to-source resistors RDS 10, RDS11 , and RDS12 are coupled across transistors M10, M11 , and M12, respectively. A series string of resistors R19, R20, R21 , R22, R23, and R24 is configured to distribute the gate voltage VG to gates G10, G11 , and G12 and is coupled in series between resistors R19 through R24 and the gate voltage input terminal 28. During operation, the second control bus CTRL2 is used to switch transistors M1 through M12 between the on-state and the off-state and vice versa. Because the control of PCM switch 1 , PCM switch 2, PCM switch 3, and PCM switch 4 is independent of transistors M1 through M12, the PCM/RFSOI combined switch controller 24 (Figure 3) is configured to either synchronize the switching of the PCM switch 1 , the PCM switch 2, the PCM switch 3, and the PCM switch 4 with the switching of the transistors M1 through M12 or not.

[0035] FIG. 7 is a table that compares four different switches that have a breakdown voltage of at least 100 V. The first is 10 stacks of 5 parallel combinations of the unit cell as disclosed. This results in a 100 V capable switch with an Ron of 1 .28 ohm, 30 fF, and 39 fs FoM. The second is the same combination except with the capacitance for stacking realized with just parallel capacitors as described previously. This solution theoretically achieves the voltage stacking but without the benefit of the parallel on-resistance of the RFSOI switch. In this solution, the PCM switch goes through a destructive breakdown if it exceeds its voltage handling limit. In the combined PCM and SOI solution, if the SOI switch stack is designed to ensure that the SOI switch goes into breakdown before the PCM switch, then the use of the SOI switch can protect the PCM switch from ever seeing breakdown. When the SOI switch breaks down, the RF voltage is reduced, thus protecting the PCM switch. The third and fourth switches are typical generation 3.0 and generation 4.0 30-stack RFSOI switches. Thus, the RFSOI and PCM combined solution shows great potential for a very low FoM high-voltage RF switch with area similar to the all-SOI solution.

[0036] With reference to FIG. 8, the concepts described above may be implemented in various types of wireless communication devices or user elements 32, such as mobile terminals, smart watches, tablets, computers, navigation devices, access points, and the like that support wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, and near-field communications. The user elements 32 will generally include a control system 34, a baseband processor 36, transmit circuitry 38, receive circuitry 40, antenna switching circuitry 42 that includes the PCM/RFSOI switch stack 22, multiple antennas 44, and user interface circuitry 46. The receive circuitry 40 receives radio frequency signals via the antennas 44 and through the antenna switching circuitry 42 from one or more basestations. A low-noise amplifier and a filter (not shown) cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams.

[0037] The baseband processor 36 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations. The baseband processor 36 is generally implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).

[0038] For transmission, the baseband processor 36 receives digitized data, which may represent voice, data, or control information, from the control system 34, which it encodes for transmission. The encoded data are output to the transmit circuitry 38, where they are used by a modulator (not shown) to modulate a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier (not shown) amplifies the modulated carrier signal to a level appropriate for transmission and delivers the modulated carrier signal to the antennas 44 through the antenna switching circuitry 42. The antennas 44 and the replicated transmit circuitry 38 and receive circuitry 40 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.

[0039] It is contemplated that any of the foregoing aspects, and/or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various embodiments as disclosed herein may be combined with one or more other disclosed embodiments unless indicated to the contrary herein.

[0040] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

Claims What is claimed is:

1 . A unit cell of a radio frequency (RF) switch, the unit cell comprising:

• a phase-change material (PCM) switch having a control terminal, a first switch terminal and a second switch terminal through which a first switched current is controlled; and

• at least one transistor coupled in parallel across the PCM switch through which a second switched current is controlled.

2. The unit cell of claim 1 wherein the PCM switch comprises:

• a phase-change material coupled between the first switch terminal and the second switch terminal; and

• a heating element disposed adjacent to the phase-change material and coupled between the control terminal and a fixed node, wherein the heating element is configured to heat the phase-change material to a first temperature to make the phase-change material become substantially conductive in response to a first pulsed current level flowing through the control terminal and to heat the phase-change material to a second temperature to make the phase-change material substantially non-conductive in response to a second pulsed current level flowing through the control terminal.

3. The unit cell of claim 2 wherein the phase-change material is fabricated of a chalcogenide phase-change material.

4. The unit cell of claim 2 wherein the at least one transistor is of a RF silicon- on-insulator type.

5. The unit cell of claim 4 wherein the at least one transistor is a field-effect transistor.

6. An RF switch comprising a Y number of unit cells, wherein Y is a counting number greater than 1 and each unit cell comprises:

7. The RF switch of claim 6 wherein the PCM switch comprises:

8. The RF switch of claim 7 further comprising a switch controller having a first control terminal coupled to the heating element of each PCM switch and a second control terminal coupled to a gate terminal of the at least one transistor comprising each unit cell, wherein the switch controller is configured to independently control the switching of the PCM switch and the at least one transistor.

9. The RF switch of claim 7 further comprising an X number of unit cells coupled in parallel within the Y number of stacks of unit cells, wherein X is a counting number greater than 1 .

10. The RF switch of claim 9 wherein at least 5 stacks of at least 10 unit cells each are coupled in parallel.

11 . The RF switch of claim 10 wherein the RF switch has a breakdown voltage of at least 100V with an on-state resistance Ron of 1 .28 ohms ±10%, an off-state capacitance of 30 femtofarads ±10%, and a 39 femtosecond figure-of-merit ±10%.

12. A method for operating a unit cell of an RF switch comprising:

• controlling by way of a switch controller having a control terminal coupled to a phase-change material (PCM) switch to permit a first switched current to flow between a first switch terminal and a second switch terminal; and

• concurrently controlling by way of the switch controller a second switched current through at least one transistor coupled in parallel across the PCM switch, independent of the first switched current.

13. The method of operating the unit cell of claim 12 wherein controlling the PCM switch comprises:

• heating a phase-change material within the PCM switch by activating a heating element disposed adjacent to the phase-change material and coupled between the control terminal and a fixed node, wherein the heating element is configured to heat the phase-change material to a first temperature to make the phase-change material become substantially conductive in response to a first pulsed current level flowing through the control terminal;

• maintaining the phase-change material at the first temperature while allowing a flow of current through the first switch terminal and the substantially conductive phase-change material;

• heating the phase-change material to a second temperature by continuing to activate the heating element in response to a second pulsed current level flowing through the control terminal, thereby making the phase-change material substantially non-conductive; and • maintaining the phase-change material at the second temperature while preventing a flow of current through the first switch terminal and the non-conductive phase-change material.

14. The method of operating the unit cell of claim 13 wherein the phasechange material is fabricated of a chalcogenide phase-change material.

15. The method of operating the unit cell of claim 13 wherein the at least one transistor is of a RF silicon-on-insulator type.

16. The method of operating the unit cell of claim 15 wherein the at least one transistor is a field-effect transistor.

17. A wireless communication device comprising:

• receive circuitry configured to receive radio frequency (RF) signals;

• a baseband processor configured to process a digitized version of the RF signals received by the receive circuitry and to extract the information or data bits conveyed in the received RF signals;

• transmit circuitry configured to receive encoded data from the baseband processor and to modulate a carrier signal with the encoded data; and

• antenna switching circuitry comprising at least one radio frequency (RF) switch comprising unit cells, coupled between the transmit circuitry and an antenna wherein each unit cell comprises:

18. The wireless communication device of claim 17 wherein the PCM switch comprises:

19. The wireless communication device of claim 18 wherein the phasechange material is fabricated of a chalcogenide phase-change material.

20. The wireless communication device of claim 18 wherein the at least one transistor is of a RF silicon-on-insulator type.

21 . The wireless communication device of claim 20 wherein the at least one transistor is a field-effect transistor.

22. The wireless communication device of claim 17 wherein the at least RF switch comprises a Y number of stacks of the unit cell of claim 1 , wherein Y is a counting number greater than 1.

23. The wireless communication device of claim 22 further comprising a switch controller having a first control terminal coupled to the heating element of each PCM switch and a second control terminal coupled to a gate terminal of the at least one transistor comprising each unit cell, wherein the switch controller is configured to independently control the switching of the PCM switch and the at least one transistor.

24. The wireless communication device of claim 23 further comprising an X number of unit cells coupled in parallel within the Y number of stacks of unit cells, wherein X is a counting number greater thanl .

25. The wireless communication device of claim 24 wherein at least 5 stacks of at least 10 unit cells each are coupled in parallel.

26. The wireless communication device of claim 24 wherein the RF switch has breakdown voltage of at least 100V with an on-state resistance Ron of

1 .28 ohms ±10%, an off-state capacitance of 30 femtofarads ±10%, and a 39 femtosecond figure-of-merit ±10%.