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WO2025085259A1 - Method and apparatus for evaluating neuronal connectivity using a memristor - Google Patents

Method and apparatus for evaluating neuronal connectivity using a memristor Download PDF

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Publication number
WO2025085259A1
WO2025085259A1 PCT/US2024/049878 US2024049878W WO2025085259A1 WO 2025085259 A1 WO2025085259 A1 WO 2025085259A1 US 2024049878 W US2024049878 W US 2024049878W WO 2025085259 A1 WO2025085259 A1 WO 2025085259A1
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voltage
trace
memristor
conductance
pair
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WO2025085259A9 (en
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Donhee Ham
SeokJoo KIM
Hanju Kim
Jun Wang
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Harvard University
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Harvard University
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009—RRAM elements whose operation depends upon chemical change
    • G11C13/0011—RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/048—Activation functions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology

Definitions

  • H0498.70804US01 METHOD AND APPARATUS FOR EVALUATING NEURONAL CONNECTIVITY USING A MEMRISTOR CROSS REFERENCE TO RELATED APPLICATIONS [0001]
  • This application claims the benefit of priority under 35 U.S.C. ⁇ 119(e) to U.S. Provisional Patent Application Serial No. “63/591,189”, filed on October 18, 2023, and entitled “METHOD AND APPARATUS FOR EVALUATING NEURONAL CONNECTIVITY USING A MEMRISTOR,” under Attorney Docket No. H0498.70804US01, which is incorporated by reference herein in its entirety.
  • the present disclosure relates to techniques for analyzing communications of signals between sites of a biological organism. More specifically, the present disclosure relates to techniques for assessing a connection strength of a biological neuronal connection between a pair of neurons by using a memristor to imitate actual neuronic relationships corresponding to neuronal signals for the pair of neurons. For a plurality of actual signals measured for a plurality of neurons, a single memristor may be used to assess a connection strength of each individual pair of neurons on a pair-by-pair basis, or a plurality of memristors may each be used to assess, in parallel, a respective subset of pairs of the neurons.
  • assessments of pairs of neurons may be automated, such that a connection strength of a pair of neurons may be assessed using actual neuronic signals of the neurons of the pair, with minimal human intervention.
  • BACKGROUND [0003] Understanding communications of signals within a biological organism is important to understanding how to diagnose a state of the biological organism and/or to determine a cause of symptoms expressed by the biological organism and/or to improve a condition of the biological organism. Of particular interest is understanding communications of neuronal signals, which may be signals communicated between neurons of a central nervous system of a mammal to control a variety of different activities of the mammal.
  • signals communicated between neurons of a brain of the mammal may be used to control motor functions, thinking, memory, sensory functions, etc., of the mammal.
  • understanding signals communicated between neurons of the brain may be used to advance technology related to replicating brain activity using microprocessors and other computer technologies.
  • an artificial, i.e., man-made, platform comprising, e.g., transistors, memories, and other electronic devices.
  • electronic devices have been used in neuromorphic engineering to reproduce a brain’s unique computing ability on an electronic platform.
  • a biological connectivity map may be generated from intracellularly recorded neuronal signals via software-assisted analysis; however, generation of such a map is computationally intensive and time-consuming. Further, a difficulty remains in developing neuromorphic systems that can accurately mimic a biological neuronal network such that a connection strength between the neurons can be mimicked.
  • the inventors have recognized and appreciated the need for determining an existence of a neuronal connection between a pair of neurons and also the need for assessing a connection strength between the pair of neurons, and have developed a fundamental approach to mapping neuronal connectivity using one or more memristors to process signals generated based on actual signals, e.g., intracellular recordings obtained by measuring from individual neurons of a network of mammalian neurons.
  • intracellular recording technology which is a cutting-edge electrophysiological recording technology, discernible peaks may be recognized in a signal trace representing a measurement over a period of time (“measurement period”).
  • a first signal trace measured from a first neuron may exhibit discernible peaks that occur at various times during the measurement period. Such time-correlated peaks may indicate neuronal activity at the first neuron during the measurement period.
  • a second signal trace measured from a second neuron may exhibit discernible peaks that occur at various times during the measurement period, indicating neuronal activity at the second neuron during the measurement period.
  • the inventors have recognized and appreciated that the time-correlated peaks of the first and second signal traces may be analyzed using a memristor to determine a degree of neuronal connectivity between the first and second neurons, and have developed techniques for assessing a connection strength between the first and second neurons based on the time- correlated peaks.
  • connection strengths of individual pairs of the group may be assessed by correlating the signal traces measured for the neurons on a pair-by-pair basis.
  • a connection strength between A and B may be assessed using a signal trace for A measured over a period of time and a signal trace for B measured over the same measurement period.
  • a connection strength between A and C may be assessed using the signal trace for A and a signal trace for C measured over the same measurement period.
  • connection strengths may be assessed for all permutations of pairs of neurons of the group comprising A, B, C, and D.
  • the inventors have recognized and appreciated that a single memristor may be used to assess neuronal connectivity for dozens, hundreds, or more pairs of neurons by correlating individual signal traces for the pairs of neurons.
  • the inventors have developed a technique that utilizes a memristor’s ability to learn temporal correlations of its input signals.
  • a memristor may be used not only to identify neuronal connections with an accuracy of 98.7% but also may be used to measure strengths of the neuronal connections.
  • a single memristor may be used to map neuronal connections between neuron pairs of the network and to provide a value for connection strength for each of the neuron pairs. Such a map may benefit neuromorphic engineering and neuroscience alike.
  • the method may comprise: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (G f ) of the memristor based on one or more pairs of time- correlated voltage bursts; (f) determining a
  • a method of evaluating a communication pathway connection may comprise: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (V b1 ) and the second voltage trace
  • a method of evaluating communication pathway connections for a plurality of nodes may comprise, for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (N pre2 ); (c) determining a total number of time-correlated voltage-peak pairs (N pair ), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number
  • an apparatus for implementing one or more of the foregoing methods.
  • a non- transitory computer-readable storage medium is provided in which computer-readable code is stored that, when executed, causes a computer processor to implemental one or more of the foregoing methods.
  • FIG.1A schematically shows a network of biological neurons, some of which may be interconnected across synapses, in accordance with some embodiments.
  • FIG.1B illustrates an enlarged view of a presynaptic and postsynaptic neuron, corresponding synaptic signals and a memristor configured for determining a connection strength of the between synaptic neurons, in accordance with some embodiments.
  • FIG.1C shows an example of a conductance-change map (e.g., a heat map) representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments.
  • FIG.1D shows a conductance-change map representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments.
  • FIG.2A schematically shows a memristor apparatus, according to some embodiments.
  • FIG.2B schematically shows a second memristor apparatus, according to some embodiments.
  • FIG.3 shows voltage spikes applied to a memristor and a graph of memristor current measured in response to the applied voltage cycle, in accordance with some embodiments.
  • FIG.4A shows a pulsed waveform applied to a memristor and a graph of memristor current measure in response to the applied voltage cycle, in accordance with some embodiments.
  • FIG.4B shows a graph of conductance G as a function of the number of pulses for the 30 repetitions of the 100-pulse sequence, in accordance with some embodiments.
  • FIG.5A shows a heatmap of ⁇ G measured in response to positive voltage pulses, in accordance with some embodiments.
  • FIG.5B shows graphs of ⁇ G as a function of the number of positive-polarity pulses, in accordance with some embodiments.
  • FIG.5C shows the heatmap at the bottom portion of FIG.5B as part of a larger heatmap encompassing pulse widths up to and including 10 ms.
  • FIG.5D shows graphs and heatmaps similar to those shown in FIGs.5B and 5C, but with the memristor driven under depression conditions, such that ⁇ G ⁇ 0, in accordance with some embodiments.
  • FIG.6A shows a schematic of potentiation and depression for a memristor, in accordance with some embodiments.
  • FIG.6B shows a second schematic of potentiation and depression for a memristor, in accordance with some embodiments.
  • FIG.6C shows examples of how the voltage V across the memristor may vary for different values of the time delay ⁇ t, in accordance with some embodiments.
  • FIG.7A shows a first STDP curve, in accordance with some embodiments.
  • FIG.7B shows a second STDP curve, in accordance with some embodiments.
  • FIG.8 schematically shows renderings of signal traces for two biological neurons of a rat, in accordance with some embodiments.
  • FIG.9 shows a graph of ⁇ G as a function of measurement number for various values of ⁇ t, in accordance with some embodiments.
  • FIG.10 schematically shows signal traces for four different neurons, with a signal trace for a first pair of neurons being overlayed, and with a signal trace for a second pair of neurons being overlayed.
  • FIG.11A shows a process flow for evaluating a connection between a pair of neurons, according to some embodiments.
  • FIG.11B shows the results from the process flow described in connection with FIG.11A.
  • FIG.12 shows a heatmap for ⁇ G under RESET driving of the memristor for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments.
  • FIG.13 shows a heatmap for N pair for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments.
  • FIG.14 shows a scatterplot graph of ⁇ G as a function of Npair, showing that a higher ⁇ G correlates to a higher N pair , in accordance with some embodiments.
  • FIG.15 shows a diagram for understanding the normalization concept, in accordance with some embodiments.
  • FIG.16 shows a process flow for determining the normalization factor for a pair of neurons, according to some embodiments.
  • FIG.17 graphically illustrates a process flow for normalizing ⁇ G for pair of neurons.
  • FIGs.18A and 18B show a software-computed Z connectivity map and a memristor-driven ⁇ connectivity map, respectively, for all 256 possible combinations of pairs of traces for sixteen (16) traces of intracellular recordings of neurons.
  • FIGs.18C and 18D show filtered versions of the Z map of FIG.18A and the ⁇ map of FIG.18B, respectively, after filtering to show only data for pairs of traces that have time-correlated AP pairs.
  • FIG.19A shows neural wiring diagram for the memristor-driven ⁇ connectivity map of FIG.18D.
  • FIG.19B shows a scatter plot of ⁇ vs Z obtained from the results in FIGs.18A and 18C.
  • FIG.19C shows the number of software identified connections plotted next to the number of memristor found connections, in accordance with some embodiments.
  • FIG.19D shows mapping sensitivity and accuracy for all 4 groups combined together.
  • FIG.20 shows neuronal connection and connection strength mapping for the four groups of 16 rat neurons, in accordance with some embodiments.
  • FIG.22 shows a memristor driven with the intracellular recording dataset via eSTDP, in accordance with some embodiments.
  • FIG.23 shows a memristor ⁇ G > 0 map obtained via eSTDP and software-found N pair_STDP map for 4 groups of 15 rat neurons, in accordance with some embodiments.
  • DETAILED DESCRIPTION [0052] Aspects of the technology described herein are directed to systems and methods for mapping of neuronal connectivity to improve neuromorphic engineering.
  • aspects of the present disclosure use a memristor to analyze signal produced by neurons to improve the detection of neuronal connectivity by detecting time correlated signals from neuronal pairs Based on the detected signals, neuronal connectivity can be mapped and the strength of their connection may be determined.
  • Neuromorphic engineering has spawned a number of electronic systems inspired by certain features of a mammalian brain, such as co-location of memory and computing. A pursuit of some aspects of neuromorphic engineering may even go beyond brain-inspired design, and may seek to mimic biological neuronal connectivity on an electronic platform (e.g., via one or more programmed microprocessors) in an effort to reproduce the brain’s computing ability.
  • Such intracellular recordings may contain useful data for understanding neuronal activity of individual neurons as well as neuronal connectivity of a neuron relative to other neurons of the network.
  • Each of the signal traces may comprise clearly identifiable time-correlated peaks measured during a common measurement period. Such time-correlated peaks may be used to analyze a pair of neurons comprising a presynaptic neuron and a postsynaptic neuron, to assess a strength of a connection between the pair of neurons. Events at the presynaptic neuron may give rise to neuronal activity that results in temporal or time-correlated peaks in the signal trace measured for the presynaptic neuron.
  • Such neuronal activity in the presynaptic neuron may, in turn, excite the postsynaptic neuron and may give rise to neuronal activity that results in temporal peaks in the signal trace measured for the postsynaptic neuron.
  • Intracellular recordings may be processed using software to identify signal traces with time-correlated peaks of a pair of neurons. As will be appreciated, software-based search of such signal traces is computationally intense and time consuming.
  • the inventors have developed techniques that use a memristor to analyze signal traces of a pair of neurons to identify time-correlated peaks for each signal trace and to determine a connection strength of the pair of neurons based on the identified time-correlated peaks of the two signal traces.
  • the pair of neurons comprise a presynaptic neuron and a postsynaptic neuron
  • the two signal traces may comprise one signal trace for the presynaptic neuron and one signal trace for the postsynaptic neuron.
  • a programmed computer processor may perform processing based on the identified time-correlated peaks to generate voltage traces to be used to drive a memristor, to control driving of the memristor using the voltage traces, and to assess changes in the memristor in response to being driven by the voltage traces.
  • the computer processor may execute code stored on a non-transitory computer-readable medium (e.g., a hard-drive, a CD, a USB drive, etc.) to perform the processing.
  • the assessed changes may be used to determine a connection strength of the pair of neurons.
  • a neuronal map may be produced indicating a connection strength of each pair.
  • the neuronal map may be imitated on an artificial platform, such as an electronic device comprising solid-state memory and a transistor network, for neuromorphic engineering purposes.
  • FIG.1A-1C illustrates concepts involved in the use of a memristor to analyze neuronal connectivity, according to some embodiments of the present technology.
  • FIG.1A schematically shows a network of biological neurons, some of which may be interconnected across synapses, in accordance with some embodiments.
  • the synaptic connection may have various connection strengths.
  • the connection strength between a pair of neurons can be strengthened or weakened as a result of a long-term potentiation (LTP) process or a long-term depression (LTD) process.
  • LTP long-term potentiation
  • LTD long-term depression
  • the dotted circle 102 indicates a region of enlargement, shown in FIG.1B.
  • FIG.1B illustrates an enlarged view of a presynaptic and postsynaptic neuron, corresponding synaptic signals and a memristor configured for determining a connection strength of the between synaptic neurons, in accordance with some embodiments.
  • FIG.1B schematically shows an enlarged view of a synapse 102.
  • the synapse 102 is the junction between a portion of presynaptic neuron 104 and a portion of postsynaptic neuron 106.
  • the synapse 102 between the presynaptic and postsynaptic neurons is represented by dots in the top portion of FIG.1B.
  • the presynaptic neuron may be associated with a previously measured signal trace comprising a plurality of time-correlated peaks, which may be voltage peaks or action potentials (APs) measured at various instances of time over a period of time.
  • Signal trace 105 schematically shows the signal trace (or AP trace) for the presynaptic neuron.
  • the postsynaptic neuron may be associated with an additional previously measured signal trace comprising a plurality of APs measured at various instances of time over the period of time.
  • Signal trace 107 schematically shows the signal trace (or AP trace) for the postsynaptic neuron.
  • the signal trace 107 may be different from the signal trace 105 and comprise a different number of APs occurring at instances of time that are different from the instances of time at which the APs of signal trace 105 occur. It should be understood that signal traces 105 and 107 represent traces of actual signals measured for the presynaptic and postsynaptic neurons, respectively, over the same measurement period. [0059] According to some embodiments of the present technology, signal trace 105 may be processed to identify APs and their timings during the measurement period; these time- correlated APs may be used to generate a voltage trace Vb corresponding to signal trace 105.
  • signal trace 107 may be processed to identify APs and their timings during the measurement period; these time-correlated APs may be used to generate a voltage trace Vt corresponding to signal trace 107.
  • the voltage traces may be used to drive electrodes of a memristor, such as memristor 110.
  • memristor 110 includes top electrodes 112 and 116 configured above bottom electrodes 114 and 118. The top electrodes and bottom electrodes are configured with a crossing region 120 through which the conductance depends on the previously applied signal.
  • the voltage trace V b may be used to drive a bottom electrode 114 of a memristor by applying the voltage across bottom electrodes 114 and 118, and the voltage trace Vt may be used to drive a top electrode 112 of a memristor, by applying the voltage across electrodes 112 an 116.
  • the driving of the bottom and top electrodes of the memristor with the voltage traces Vb, Vt may occur simultaneously.
  • peaks in the voltage trace Vb may occur with the same timing as the APs of signal trace 105, and peaks in the voltage trace V t may occur with the same timing as the APs of signal trace 107; thus, the simultaneous driving of the bottom 114 and top 112 electrodes may simulate the APs measured for the presynaptic and postsynaptic neurons, respectively.
  • the peaks in the voltage trace V b may occur at a compressed timing relative to the APs of signal trace 105, and peaks in the voltage trace Vt may occur at a same compressed timing relative to the APs of signal trace 107; thus, the simultaneous driving of the bottom and top electrodes may simulate the APs measured for the presynaptic and postsynaptic neurons, respectively, at a compressed time scale.
  • the time scale of the voltage traces Vb, Vt may be compressed by a factor of 100 relative to the time scale of traces 105 and 107.
  • a span of 100 milliseconds (ms) in traces 105 and 107 may correspond to a span of 1 ms in the voltage traces Vb, Vt, when compressed by a factor of 100.
  • a connection strength between the presynaptic neuron and the postsynaptic neuron may be assessed based on the conductance change ⁇ G.
  • FIG.1C shows an example of a conductance-change map (e.g., a heat map) representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments.
  • a conductance-change map 130 a relatively darker color indicates a lower conductance change and therefore a weaker connection strength, and a relatively lighter color indicates a higher conductance change and therefore a stronger connection strength.
  • the six neurons may serve individually as the presynaptic neuron associated with the driving voltage Vb to the bottom electrode (see vertical axis) or may serve individually as the postsynaptic neuron associated with the driving voltage V t (see horizontal axis).
  • the bottom portion of FIG.1C schematically shows two cross sections of the memristor 132 and 134.
  • the cross sections show a conductance path between the bottom electrode (BE) and the top electrode (TE) of the memristor. Conductance between the electrodes is facilitated by oxygen vacancies. Accordingly, the accumulation of oxygen vacancies represents the thickness of the conductance path, with thicker paths supporting a larger conductance and thinner paths supporting a smaller conductance.
  • cross section 132 and 134 oxygen vacancies are depicted as spheres.
  • Cross section 132 illustrates a larger conductance and, by extension, a stronger junction between neurons.
  • cross section 134 illustrates a smaller conductance and, by extension, a weaker junction between neurons.
  • the conductance-change map 130 shows a darker color indicating a weaker connection strength, corresponding to a relatively weaker conduction path between the BE and the TE of the memristor, such as the one shown in cross section 132.
  • the conductance-change map 130 shows lighter color – corresponding to a relatively thicker conduction path, such as the one shown in cross section 134.
  • non-negligible changes in the conductance of the memristor may be due to spike-timing-dependent plasticity (STDP) of the memristor.
  • STDP spike-timing-dependent plasticity
  • the memristor’s conductance may change according to a timing difference of the two voltage traces driving the two electrodes of the memristor.
  • the conductance of the memristor may change in accordance with a time difference of APs of the two traces, where some APs of the trace for the postsynaptic neuron occur in response to and therefore within at a time delay relative to some APs of the trace for the presynaptic neuron.
  • the presence of an appreciable conductance change may be an indication of a neuronal connection, and a magnitude of the conductance change may be an indication of a connection strength of the neuronal connection.
  • the inventors fabricated a 1.2 ⁇ m ⁇ 1.2 ⁇ m bilayer memristor comprising a TiN top electrode and a Pt bottom electrode sandwiching a bilayer of TiO2/HfO2 forming a switching layer of the memristor.
  • the memristor may be fabricated using known thin-film microfabrication techniques (e.g., CMOS techniques).
  • CMOS techniques e.g., complementary metal oxide
  • the memristor may be fabricated using a Si wafer with a 280 nm thermally grown silicon oxide layer that was coated with a photoresist.
  • the coated photoresist may be patterned using UV photolithography.
  • a titanium layer having a thickness of about 10 nm and a platinum layer having a thickness of about 100 nm may each be deposited by sputtering. Following deposition, a lift-off process is used. Following lift-off, sequential deposition of a 5 nm layer of HfO2 and a 5 nm layer of TiO2 is performed using atomic layer deposition at 200 °C and 90 °C, respectively. The thickness of each layer was measured using an ellipsometer. A photoresist was coated and patterned on the deposited switching layer to make a pattern of 20 nm of TiN and 100 nm Pt which were deposited by sputtering.
  • FIG. 1B and 1C show Pt being used for the bottom electrode and TiN being used for the top electrode, the electrodes may be switched such that the top electrode is a Pt material and the bottom electrode is a TiN material.
  • FIG. 1D shows a conductance-change map representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments. The bottom portion of FIG.
  • 1D schematically shows two cross sections of the memristor 136 and 138.
  • the cross sections show a conductance path between the BE and the TE of the memristor.
  • the BE and TE are swapped, e.g., the TE is a Pt material and the BE is a TiN material. Accordingly, the directionality of the conductive path is reversed.
  • the memristor was used to find pairs of intracellular-recording traces having peaks that are time-correlated relative to each other. The intracellular-recording traces were measured from cultured rat neurons.
  • N intracellular-recording traces were evaluated to find pairs of time-correlated traces (“trace pairs”) amongst the N intracellular-recording traces. Similar to the map shown in the top portion of the right panel of FIG.1, an N ⁇ N map was produced corresponding to all possible combinations of trace pairs. From four (4) distinct groups of sixteen (16) intracellular-recording traces, it was found that the memristor was able to map not only 32 out of 35 actual connections, with a 98.7% accuracy and a 91.4% sensitivity, but also was able to provide a quantitative measure of the relative connection strengths of the connections. Such results demonstrate that a memristor may be used to copy a functional connectivity map of a neuronal network.
  • the present technology combines memristor technology with electrophysiological recording technology and may be used advantageously to advance neuromorphic engineering and neurobiology technologies.
  • Analog Switching of a Memristor [0069] Initially, analog resistive switching behavior of the TiO 2 /HfO 2 bilayer memristor was verified experimentally, to ensure that the memristor is suitable for STDP.
  • FIG.2A schematically shows a memristor apparatus, according to some embodiments of the present technology. The memristor apparatus 200 may be used for verification that the memristor exhibits suitable STDP for assessing the connection strengths.
  • the memristor apparatus may comprise the memristor supported by an insulative substrate 202 (e.g., a quartz wafer, a SiO2- coated Si wafer, etc.) a first probe electrically contacting a bottom electrode (BE) 204 of the memristor, and a second probe electrically contacting a top electrode (TE) of the memristor 206.
  • the first and second probes may be controlled by a controller 210 comprising a microprocessor 212 and a quad analog switch 214.
  • the microprocessor 212 may be configured to control the switch 214 to drive the BE 204 and TE 206 of the memristor.
  • the switch may comprise first and second channels attached to a waveform generator216, a third channel connected to a source measure unit (SMU) of a device analyzer 218, and a fourth channel connected to ground via the device analyzer.
  • a power supply 220 may be provided to power the controller.
  • two terminals of the memristor may be connected to a dual analog switch that is able to perform relay switching between a device analyzer (e.g., a Keysight B1505A power device analyzer) and a waveform generator (e.g., a Keysight 33500B waveform generator) controlled via an PC device.
  • the power device analyzer may perform I-V sweeps for electrical characterization and may measure current before and after applying voltage pulses generated by the waveform generator.
  • the spike traces converted from the intracellular recording traces are divided into an appropriate length, which does not exceed the maximum capacity of the memory of the arbitrary waveform generator.
  • One such intracellular recording may be two and a half minutes in length, although recordings of other lengths may be used as aspects of the technology described herein are not limited in this respect.
  • the partial change in G is measured. In some embodiments, the change in G is measured after each spike segment of the intracellular recording is applied.
  • the memristor is initialized into the same low- conductance state by a RESET process, using a RESET pulse.
  • An example RESET pulse may have an amplitude of -4 V with a 10 ms pulse width.
  • FIG.2B schematically shows a second memristor apparatus, according to some embodiments.
  • Second memristor apparatus 230 is configured with the same components as memristor apparatus 200, shown in FIG.2A. Relative to apparatus 200, apparatus 230 has a different configuration of electrodes in the memristor. As shown in FIG.2B, the TE 232 is a Pt material and the BE 234 is TiN material.
  • FIG.3 shows voltage spikes applied to a memristor and a graph of memristor current measured in response to the applied voltage cycle, in accordance with some embodiments.
  • the bottom plot 300 of FIG.3 shows a graph of memristor current measured as a function of voltage V applied across the memristor during a cyclic voltage sweep, to verify analog switching behavior.
  • the voltage V corresponds to a voltage applied to the BE while maintaining the TE at a reference voltage of 0 V.
  • the applied voltage is first ramped up and down nine (9) times between 0 V and 2 V, with a step of 20 mV, and then ramped down and up nine (9) times between 0 V and –2 V, with a step of 20 mV, as shown in the top plot 302 of FIG.3.
  • the memristor During the cyclic sweep in the positive voltage range, the memristor’s conductance G increases from 2.0 mS to 12.3 mS, indicating memristor potentiation (see portion 304 of the current-voltage graph 300). During the cyclic sweep in the negative voltage range, G decreases from 0.44 mS to 0.12 mS, indicating memristor depression.
  • the difference in the conductance of the memristor depending on whether the cyclic sweep is in the positive voltage range or the negative voltage range may indicate analog resistive switching of the memristor, because an overall thickness of charge carriers (e.g., oxygen vacancies) forming a conductive path through the switching layer, between the BE and the TE, is modulated by the voltage with a memory effect.
  • charge carriers e.g., oxygen vacancies
  • memristor potentiation i.e., a positive conductance change
  • memristor depression i.e., a negative conductance change
  • the rates of the conductive-path change depend on the polarity of the applied voltage.
  • a memristor may be used in a digital mode, in which the memristor is either highly conductive or lowly conductive, or in an analog mode, in which the memristor’s conductance may vary across a continuous spectrum of values
  • the memristor of the present technology is used in the analog mode in order to assess relative connection strengths of different pairs of neurons.
  • the memristor may be driven with a pulsed waveform to induce analog resistive switching.
  • FIG.4A shows a pulsed waveform applied to a memristor and a graph of memristor current measure in response to the applied voltage cycle, in accordance with some embodiments.
  • the top plot 402 of FIG. 4A shows a pulse waveform used to produce the analog resistive switching in the memristor.
  • the bottom plot 400 of FIG.4A shows a graph of conductance G as a function of the number of pulses applied across the memristor. As can be seen from the plots, potentiation occurs with positive pulses having an amplitude of 2 V, a positive polarity, a pulse width of 0.05 ms, and a center-to-center interval of 0.2 ms.
  • G was found to increase, indicating potentiation, with a sequence of 50 positive rectangular voltage pulses applied across the memristor, while G was found to decrease, indicating depression, with a subsequent sequence of 50 negative voltage rectangular pulses having an amplitude of 2 V, a negative polarity, a pulse width of 0.05 ms, and a center-to-center interval of 0.2 ms (“100-pulse sequence”).
  • Values for G were measured using relatively small rectangular read pulses having an amplitude of 1 V and a pulse width of 0.05 ms, which do not perturb the memristor’s conductance state.
  • the read pulses (short pulses in the top plot 402 of FIG.4A) were timed to occur between two adjacent 2-V state-changing pulses (tall pulses in the top portion of FIG.4A).
  • FIG.4B shows a graph of conductance G as a function of the number of pulses for the 30 repetitions of the 100-pulse sequence, in accordance with some embodiments.
  • FIG.5A shows a heatmap of ⁇ G measured in response to positive voltage pulses, in accordance with some embodiments.
  • the memristor was found to exhibit a change in conductance ⁇ G for potentiation ( ⁇ G > 0) as a function of pulse width and pulse amplitude, as shown in the heatmap at a bottom plot 500 of FIG.5A.
  • each value of ⁇ G was obtained by applying, after performing the RESET process, a sequence of 100 positive voltage pulses for a given amplitude and a given width, an example of which is shown at the top of FIG.5A in plot 502.
  • potentiation ⁇ G > 0
  • 1-V read pulses were used, as such a low voltage would not affect ⁇ G with any significance.
  • potentiation occurred for an amplitude of 2 V for any pulse-width tested.
  • V th was found to decrease with an increase in pulse width. For example, V th was found to be approximate 1.4 V for pulse widths between 0.05 ms and 0.2 ms whereas Vth was found to be approximately 1.2 V for a pulse widths of 1 ms.
  • FIG.5B shows graphs of ⁇ G as a function of the number of positive-polarity pulses, in accordance with some embodiments.
  • the different traces in the graphs of FIG.5B correspond to different pulse widths in a range from 0.05 ms to 10 ms, as shown in the key in the top left graph of FIG.5B.
  • the different traces are overlaid for voltages between 0.8 V and 1.4 V. At 1.6 V, the traces being to separate, with the longer traces starting to distinguish from the shorter ones.
  • the 10 ms trace 508 has the largest ⁇ G, followed by the 7.5 ms trace 506, the 5.0 ms trace 504, the 2.5 ms pulse 502, and the 1.0 ms pulse 500.
  • each trace was obtained using read pulses that occur between adjacent driving pulses. That is, a read pulse occurred between two adjacent driving pulses.
  • ⁇ G does not vary appreciably with the number of pulses at any of the pulse widths tested, whereas, for pulse amplitudes greater than 1.4 V, ⁇ G varies noticeably with the number of pulses.
  • FIG.5C shows the heatmap at the bottom portion of FIG.5B as part of a larger heatmap encompassing pulse widths up to and including 10 ms.
  • Each ⁇ G in the heatmap represents a conductance increase after applying a 100-pulse sequence of driving pulses.
  • FIG.5D shows graphs and heatmaps similar to those shown in FIGs.5B and 5C, but with the memristor driven under depression conditions, such that ⁇ G ⁇ 0, in accordance with some embodiments.
  • depression of the memristor occurred for various pulse amplitudes and various pulse widths.
  • the graphs include traces of ⁇ G as a function of the number of pulses.
  • the traces identify the various pulse widths according to the key shown in the graph at the top left of FIG.5D.
  • the memristor was driven by applying a sequence of 100 negative-polarity voltage pulses for a given a given pulse width in the range of 0.05 ms to 10 ms, and a given amplitude in the range of 0.8 V to 2 V, as indicated at the bottom left corner of each graph.
  • the traces are practically indistinguishable for voltages between 0.8V and -1.4V.
  • the 10 ms trace 508 having the most negative values and the 0.05 ms trace 510 having the least negative values.
  • the 10 ms trace 508, 7.5 ms trace 506, and 5.0 ms trace 504 can each be seen at the bottom.
  • the 0.05 ms trace, 0.1 ms trace, and 0.25 ms trace can be seen at the top.
  • many of the traces overlap making the traces for 0.5 ms 516, 0.75 ms 518, 1 ms 500, and 2.5 ms 502 difficult to distinguish.
  • Each ⁇ G trace was obtained after the memristor underwent the SET process.
  • a read pulse occurred between two adjacent drive pulses.
  • a heatmap and an enlarged portion of the heatmap show values for ⁇ G ⁇ 0 for various pulse amplitudes and pulse widths.
  • Each ⁇ G in the heatmap represents a final conductance decrease after the SET process and after applying a 100-pulse sequence.
  • STDP Engineering [0080] As will be appreciated, the memristor’s STDP results in certain embodiments from the ability of the memristor to retain a conductance state even after a driving voltage that causes the memristor to attain that conductance state has been removed.
  • the APs may comprise three (3) voltage peaks occurring at tA, tB, and tC during the measurement period.
  • the first voltage trace may be generated to have a driving period having a same duration as the measurement period of the first signal trace and to have voltage bursts occurring at t A , t B , and t C of the driving period.
  • the first voltage trace may be generated to have a driving period having a compressed duration corresponding to the measurement period divided by a compression factor C.
  • the first voltage trace may have a driving period of 10 seconds, corresponding to 100 seconds/C, tA may occur at 1.5 seconds, tB may occurs at 5.5 seconds, and t C may occur at 9.0 seconds.
  • the second driving trace may be generated based on the second signal trace corresponding to the second neuron.
  • the voltage bursts of the first and second driving traces may be biphasic such that each voltage burst may have a positive-polarity portion and a negative-polarity portion.
  • a center of each voltage burst may have a voltage of 0 V, such that a sum of the positive-polarity portion and the negative-polarity portion may be 0.
  • the voltage bursts may have a shape of one period of a sine wave, or one period of a sawtooth wave, or one period of a biphasic square wave, or one period of a triangular wave. It should be understood that a square wave may have rectangular wave portions and need not have strictly square-shaped portions.
  • the voltage bursts of the first and second driving traces may comprise sawtooth voltage spikes, with each voltage spike comprising a positive-polarity portion and a negative-polarity portion.
  • FIG.6A shows a schematic of potentiation and depression for a memristor, in accordance with some embodiments.
  • the memristor includes a TiN material for a top electrode and an Pt material for a bottom electrode. A switching layer is sandwiched between the top and bottom electrodes.
  • the left portion of FIG.6A schematically shows a memristor 600 being driven by first 602 and second 604 voltage traces.
  • the first voltage trace 602, Vb, shown in the right portion of FIG.6A comprises a first sawtooth spike and is applied to the bottom electrode 606 of the memristor.
  • the first sawtooth spike 602 occurs at a time t b during the driving period of the memristor.
  • the second voltage trace 604, Vt, shown in the right portion of the FIG.6A comprises a second sawtooth spike and is applied to the top electrode 608 of the memristor simultaneously with application of the first voltage trace V b .
  • the second sawtooth spike occurs at a time tt during the testing period.
  • the first and second voltage spikes have the same amplitude of 1.6 V for the positive and negative portions, and the first and second voltage spikes have the same duration of 0.2 ms for the positive and negative portions.
  • the duration of a biphasic voltage spike may correspond to a duration of a positive (or negative) portion of the biphasic voltage spike.
  • FIG.6B shows a second schematic of potentiation and depression for a memristor, in accordance with some embodiments.
  • the memristor 610 of FIG.6B has a Pt material for the top electrode 606 and a TiN material for the bottom electrode 08.
  • the first voltage trace 602, Vb comprises a first sawtooth spike and is applied to the bottom electrode 608 of the memristor.
  • the second voltage trace 604, Vt comprises a second sawtooth spike and is applied to the top electrode 608 of the memristor simultaneously with application of the first voltage trace V b .
  • FIG.6C shows examples of how the voltage V across the memristor may vary for different values of the time delay ⁇ t, in accordance with some embodiments.
  • Plot 600 shows the driving pulses for the top and bottom electrodes.
  • the voltage V may comprise a pulse that may have a positive portion sandwiched by negative portions occurring before and after the positive portion.
  • the width (duration) of the V-pulse across the memristor increases while the amplitude of the V-pulse decreases.
  • the width of the V-pulse may be too small (i.e., the duration may be too short) to cause an observable ⁇ G despite the large amplitude.
  • the decreased amplitude renders ⁇ G smaller.
  • FIG.7A shows a first STDP curve, in accordance with some embodiments.
  • the bottom portion of FIG.7A shows a graph of an STDP curve 700 in which ⁇ G varies as a function of ⁇ t, as measured for the memristor driven by the first and second voltage traces V b , V t shown at the top portion of FIG.7A.
  • the second voltage trace V t comprises a second sawtooth spike at a time delay ⁇ t relative to a first sawtooth spike of the first voltage trace Vb (“sawtooth-spike pair”).
  • the first and second voltage traces Vb, Vt, 40 sawtooth-spike pairs were applied to the bottom and top electrodes of the memristor.
  • ⁇ t > 0, i.e., the second voltage spike of the second voltage trace V t occurred after the first voltage spike of the first voltage trace V b , for each sawtooth-spike pair.
  • ⁇ t ⁇ 0, i.e., the second voltage spike of the second voltage trace Vt occurred before the first voltage spike of the first voltage trace Vb, for each sawtooth-spike pair.
  • an STDP window occurs under potentiation conditions for ⁇ t in a range of about 0 ms to about 0.2 ms. In the STDP window for ⁇ t, appreciable values for ⁇ G were observed.
  • FIG.7B shows a second STDP curve, in accordance with some embodiments.
  • FIG. 7B is similar to FIG.7A except that triangular voltage spikes were used instead of sawtooth voltage spikes.
  • the shape of the voltage spikes used for the first and second voltage traces Vb, Vt may affect the magnitude of conductance change in the memristor as well as the STDP window of ⁇ t values for which the memristor exhibits ⁇ G values of appreciable amplitude (e.g., values having an absolute value greater than about 1 ⁇ S).
  • the shape of a sawtooth voltage spike and the shape of a triangular voltage spike would appear to be rather similar, they result in drastically different STDP results.
  • Portions 702 and 704 show a distribution of actual time delays ⁇ T observed for APs in signal traces measured for a pair of neurons.
  • the APs correspond to 126 strongly connected pairs of neurons of a rat.
  • the actual signal traces have relatively longer measurement periods and therefore the time scale was compressed by a factor of 100 for portions 702 and 704 of FIGs.7A and 7B, respectively.
  • portion 704 of FIG.7B does not overlap to a portion of the STDP curve having appreciable ⁇ G values
  • the portion 702 of FIG.7A overlaps a portion of the STDP curve having ⁇ G values of at least 1 ⁇ S.
  • FIG.8 schematically shows renderings of signal traces for two biological neurons of a rat, a presynaptic neuron and a postsynaptic neuron, in accordance with some embodiments.
  • the presynaptic neuron and the postsynaptic neuron have four pairs of strongly correlated AP pairs that each have a time delay ⁇ T within a range intended to fall within the STDP window of the memristor.
  • the APs of a biological neuron may have a width of less than 10 ms, and the time interval between APs of the biological neuron may vary depending on the neuron’s firing status (e.g., bursting, adapting, etc.) and may, in some cases be on the order of hundreds of ms (e.g., 200 ms).
  • the time scale of the actual signal traces may be compressed so that analysis of the actual signal traces using the memristor may be performed more quickly.
  • 100 measurements were made.
  • Each ⁇ G was obtained by applying 40 pairs of ⁇ t-spaced sawtooth voltage spikes.
  • the memristor underwent the RESET process.
  • the memristor underwent the SET process.
  • FIGs.10 through 14 may be used to understand how the memristor’s STDP may be used to find neuronal connections in accordance with certain embodiments, i.e., connections between APs of two neurons.
  • N1, N2, N3, and N4 represent neurons of a network of neurons.
  • examples of signal traces measured for N1 and N2 are overlayed on each other. The signal trace for N1 shows voltage peaks occurring at various times during a measurement period.
  • the signal trace for N2 shows voltage peaks 1000, 1002, 1004, 1006, 1008, 1010 occurring at various times during the same measurement period.
  • examples of signal traces measured for N3 and N4 are overlayed on each other.
  • the signal trace for N3 shows voltage peaks occurring at various times during the same measurement period
  • the signal trace for N4 shows voltage peaks 1012, 1014, 1016, 1018, 1020, 1022, 1024, 1026 occurring at various times during the same measurement period.
  • the signal trace for the neurons of the network all have the same measurement period. This allows different pairs of neurons to be analyzed to determine whether there is a neuronal connection and, if so, to determine a strength of the neuronal connection.
  • N1 is the presynaptic neuron and N2 is the postsynaptic neuron.
  • the signal trace for N1 comprises nine (9) presynaptic APs.
  • the signal trace for N2 comprises six (6) APs that are time-correlated with six of the APs measured for N1.
  • a time-correlated AP pair may be an AP of N1 and an AP of N2 that occurs within a time difference ⁇ t of each other. For example, as shown in FIG. 10, ⁇ t maybe 0.2 ms. Note that some of the APs of N1 do not form time-correlated AP pairs with AP of N2, as shown in FIG.10.
  • an AP of N2 need not form a time-correlated AP pair with an AP of N1.
  • N3 is the presynaptic neuron
  • N4 is the postsynaptic neuron.
  • the signal trace for N3 comprises sixteen (16) presynaptic APs.
  • the signal trace for N4 comprises eight (8) APs that are time-correlated with eight of the APs measured for N3.
  • FIG.11A shows a process flow for evaluating a connection between a pair of neurons, according to some embodiments.
  • FIG.11A shows a voltage trace for N1 comprising voltage bursts timed at the same timings as the APs for the signal trace for N1, a voltage trace for N2 comprising voltage bursts timed at the same timings as the APs for the signal trace for N2, a voltage trace for N3 comprising voltage bursts timed at the same timings as the APs for the signal trace for N3, and a voltage trace for N4 comprising voltage bursts timed at the same timings as the APs for the signal trace for N4.
  • the voltage bursts may be sawtooth spikes having a negative-polarity portion and a positive- polarity portion.
  • the driving traces are used two at a time to drive the bottom and top electrodes of the memristor, as illustrated in the center portion of FIG.11A.
  • the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N2 may be serve as the voltage trace Vt used to drive the top electrode of the memristor;
  • the voltage trace for N1, N3, the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N3 may be serve as the voltage trace Vt used to drive the top electrode of the memristor;
  • the voltage trace for N1 may be serve as the voltage trace V b used to drive the bottom electrode of the memristor while the voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor;
  • the voltage trace for N1 may be serve as the voltage trace V b used to drive the bottom electrode of the memristor while the voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor;
  • the voltage trace for N1 may be serve as the voltage
  • the memristor may undergo the RESET process sixteen times for the sixteen combinations of neuron pairs.
  • the memristor may undergo the SET process before the memristor is driven with the voltage traces V b , V t , for any of the combinations of neuron pairs to measure depression (“SET driving”), the memristor may undergo the SET process.
  • the memristor may undergo the SET process sixteen times for the sixteen combinations of neuron pairs. [0100]
  • neuron pairs other than N1, N2; N2, N1; N3, N4; and N4, N3 are not shown as they were found to result in no appreciable ⁇ G for RESET driving or SET driving, likely due to the relatively few time-correlated sawtooth-spike pairs.
  • RESET driving and SET driving using the voltage traces generated for neuron A and neuron B may reveal which is the presynaptic neuron by a comparison of the ⁇ G for RESET driving and the ⁇ G for SET driving.
  • FIG.11B shows the results from the process flow described in connection with FIG.11A.
  • the memristor-driven finding of neural connections for four groups of 16 rat neurons includes memristor ⁇ G > 0 maps (left column) and software-found Npair maps (middle column) show the neuronal connections for each of the four distinct groups of 16 intracellular recording data.
  • the traces of the intracellular recordings each had a measurement period of 15 minutes, which was determined to be too long a period to use for the driving period of voltage traces generated from the twelve traces of intracellular recordings.
  • each intracellular- recording trace was segmented into sections spanning 2.5 min.
  • 144 ⁇ G values were obtained by accumulating partial conductance changes for the segments and performing the RESET process in between obtaining one partial conductance change and obtaining a next partial conductance change.
  • software was used to count the number of time-correlated AP pairs (“Npair”) for each pair of the 144 combinations of pairs of the twelve intracellular- recording traces.
  • each time-correlated AP pair comprises an AP from one intracellular-recording trace of a pair and an AP from the other intracellular- recording trace of the pair, with the two APs occurring within the same positive STDP window (e.g., the STDP window ranging from 0 ms to 0.2 ms).
  • the STDP window ranging from 0 ms to 0.2 ms.
  • FIG.13 shows a heatmap for Npair for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments.
  • the heatmaps of FIG.13 and FIG.12 are consistent with each other, indicating that that a larger number of connections or time-correlated AP pairs (FIG. 13) results in a higher memristor-driven ⁇ G (FIG.12).
  • Both heat maps reveal six (6) pairs of connected neurons at six noticeably lighter-colored rectangles in each of the heat maps.
  • FIG. 14 shows a scatterplot graph of ⁇ G as a function of N pair , showing that a higher ⁇ G correlates to a higher Npair, in accordance with some embodiments.
  • Npair for a pair of neurons i.e., the number of time-correlated AP pairs for the pair of neurons
  • this quantity by itself would not accurately reflect an actual connection strength of the pair of neurons because it does not take into account the number of possible presynaptic APs available for time-correlated pairing (i.e.., the number of APs in the trace of the intracellular recording for the presynaptic neuron of the pair of neurons).
  • Npair has a value of 100 and there are 1000 presynaptic APs
  • presynaptic APs For example, if Npair has a value of 100 and there are 1000 presynaptic APs, then only 10% of the presynaptic APs formed time-correlated AP pairs with postsynaptic APs of the intracellular recording for the presynaptic neuron of the pair of neurons.
  • the inventors have recognized and appreciated that, in certain cases, a more accurate reflection of the connection strength between the pair of neurons would normalize Npair by taking into account the number of possible time- correlated AP pairs that could be formed.
  • Z reflects the transmission rate of the pair of neuron.
  • FIG.15 shows a diagram for understanding the normalization concept, in accordance with some embodiments. The neurons N1, N2, N3, and N4 are those discussed in connection with FIGs.10 and 11.
  • the N pair for the N1, N2 pair has a value of 6, corresponding to the 6 time-correlated AP pairs for the N1, N2 pair, while the Npair for the N3, N4 pair has a value of 8 corresponding to the number of time-correlated AP pairs for the N3, N4 pair. If only the raw numbers for Npair are considered, the N3, N4 pair would be deemed to have a stronger neuronal connection than the N1, N2 pair because 8 > 6.
  • Z 2/3 (or 0.67) for the N1, N2 pair.
  • Z may be calculated when N pair and N pre are known.
  • the notation ⁇ Gpair may be used to indicate the pre-normalization ⁇ G. That is, the un-normalized ⁇ G obtained by STDP by driving the memristor with V b and V t may be referred to as ⁇ G pair in the following discussion.
  • ⁇ G pair increases with an increasing Npair and therefore does not provide an accurate reflection of connection strength.
  • a normalization factor may be determined by driving the memristor with normalization voltage traces comprising square voltage spikes.
  • FIG.16 shows a process flow for determining the normalization factor for a pair of neurons, according to some embodiments.
  • a normalization voltage trace is generated in which voltage spikes occurs at the same timings as the APs of the signal trace corresponding to the normalization voltage trace.
  • the normalization voltage traces each have a driving period or duration that is the same as the measurement period of the signal traces.
  • the left portion of FIG.16 shows a positive normalization voltage trace V b and a negative normalization voltage trace V t , for N1.
  • the positive normalization voltage trace Vb comprises positive-polarity square voltage spikes timed at the same timings as the APs for the signal trace for N1
  • the negative normalization voltage trace V t comprises negative-polarity square voltage spikes timed at the same timings as the APs for the signal trace for N1.
  • Similar normalization voltage traces may be generated for N2, N3, and N4.
  • Such driving may result in an appreciable change in conductance between an initial conductance before the driving and a final conductance after the driving, which may be a normalization conductance change ⁇ Gnorm.
  • ⁇ G norm is obtained by “even” STDP (eSTDP).
  • the strength of the neuronal connection between N1 and N2 is a normalized ⁇ Gpair for N1, N2.
  • FIG.17 shows a process flow for normalizing the conductance change for pair of neurons, in accordance with some embodiments.
  • FIGs.18A and 18B show a software-computed Z connectivity map and a memristor-driven ⁇ connectivity map, respectively, for all 256 possible combinations of pairs of traces for sixteen (16) traces of intracellular recordings of neurons (e.g., signal traces for 16 different neurons).
  • FIGs.18C and 18D show filtered versions of the Z map and ⁇ map, respectively, after filtering to show only data for pairs of traces that have time-correlated AP pairs (e.g., for pairs of connected neurons).
  • AP pairs e.g., for pairs of connected neurons.
  • FIG. 18C shows filtered versions of the Z map and ⁇ map, respectively, after filtering to show only data for pairs of traces that have time-correlated AP pairs (e.g., for pairs of connected neurons).
  • a cutoff value other than 0.3 may be used.
  • the software-computed Z connectivity map and the memristor-driven ⁇ connectivity map are fairly consistent with each other.
  • the memristor- driven ⁇ connectivity map of Fig.18D identifies all 9 true connections found by the software, assuming the software-computed results shown in FIG.18C are true, and also identifies (with software results assumed as true), while also identifying 2 false connections.
  • the filtered ⁇ map may be used as a functional neuronal connectivity map that specifies not only topological connections but also physical connection strengths.
  • FIG.19A shows neural wiring diagram for the memristor-driven ⁇ connectivity map of FIG.18D.
  • FIG.19B shows a scatter plot of ⁇ vs Z obtained from the results in FIGs. 18A and 18C.
  • FIG.19C shows the number of software identified, e.g., filtered z-map based, connections plotted next to the number of memristor found, e.g., filtered ⁇ -map based connections for each of four distinct groups of intracellular recording data, with each group, including 16 intracellular recording traces from 16 rat neurons.
  • mapping accuracy for each of the four groups is plotted using the dashed line with the accuracy shown on the right axis.
  • the true software found number of connections are plotted against the numbers of correctly and incorrectly found by the memristor.
  • the sensitivity and accuracy are statistically calculated.
  • the sensitivity is the ratio of the number of connections correctly found by the memristor (true positives) to the true (software-found) number of connections.
  • the accuracy is the ratio of the total number of either connections or disconnections correctly found by the memristor (true positives or true negatives) to the total number of ⁇ data.
  • FIG.19D shows mapping sensitivity and accuracy for all 4 groups combined together.
  • FIG.20 shows neuronal connection and connection strength mapping for the four groups of 16 rat neurons.
  • Software-computer Z maps, filtered Z maps (threshold: Z > 0.3) (left column), memristor-driven ⁇ maps, and filtered ⁇ maps (threshold: ⁇ > ⁇ +1.6 ⁇ ) (middle column) show the neuronal connections and their physical connection strengths for each of four distinct groups of the 16 intracellular recording data sets from 16 rat neurons.
  • Each map is obtained for all 256 trace pair combinations of 16 intracellular recording traces of each group.
  • Scatter plot of ⁇ vs Z for each group shows a strong correlation between ⁇ and Z.
  • the solid diagonal line represents the fitting curve and the dashed diagonal curves shown a 95% confidence internal.
  • the horizontal and vertical lines represent the threshold value for ⁇ map and Z map, respectively.
  • the recording trace of presynaptic neuron may be converted into square spikes to drive the bottom electrode of the memristor with the positive square spike and its negative used to drive the top electrode.
  • the resulting conductance change ⁇ Gnorm decreases in this “even” STDP (eSTDP) configuration.
  • Each spike has an amplitude of 0.8 V and a width of 0.2 ms.
  • the voltage across the memristor, V V b -V t , with
  • Plot 2104 shows memristor eSTDP induced by 40 pairs of ⁇ t-spaced square spikes from RESET.
  • FIG.22 shows a memristor driven with the intracellular recording dataset via eSTDP, in accordance with some embodiments.
  • Plot 2200 shows a ⁇ G>0 map for a memristor obtained via eSTDP and software-found N pair_eSTDP (
  • Plot 2202 is a scatter plot of ⁇ G vs Npair_eSTDP. The diagonal solid line represents the fitting curve and the dashed diagonal lines represent the 95% confidence interval.
  • FIG.23 shows a memristor ⁇ G > 0 map obtained via eSTDP and software-found Npair_STDP map for 4 groups of 15 rat neurons.
  • the memristor ⁇ G > 0 maps (left column) and the software-found Npair_eSTDP maps (middle column) show the conductance increase from RESET and the number of AP pairs falling into
  • the solid diagonal line represents the fitting curve and the dashed diagonal lines represent the 95% confidence interval.
  • memristor may be used in parallel to speed up evaluations of a large network of neurons.
  • an N ⁇ N crossbar array of memristors may be used to expedite copying of biological neuronal connectivity from N traces of intracellular recordings.
  • the memristor is described herein in connection with searching for and processing data relating to time-correlated AP pairs, the present technology is not limited to use with APs in signal traces for a presynaptic neuron and a postsynaptic neuron.
  • the present technology also may be suitable for evaluating neurons based on postsynaptic potentials (PSPs) of a pair of neurons.
  • PSPs postsynaptic potentials
  • the present technology is not limited to neuronal signals, but may be used for evaluating other types of biological signals or non-biological signals for which there is a time-related dependence.
  • the memristor of the present technology is not limited to the bilayer memristor described herein but may be a monolayer memristor or may be a memristor formed of materials other than those described herein.
  • a method of evaluating a communication pathway connection comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (V
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons
  • the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
  • the method of sentence 1 or any preceding sentence further comprising: determining the normalization conductance (GN) by: generating a positive normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprising a plurality of rectangular positive-voltage bursts over the period of time, generating a negative normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the negative normalization trace comprising a plurality of rectangular negative-voltage bursts over the period of time, and simultaneously applying the positive normalization trace to the first electrode of the memristor and applying the negative normalization trace to the second electrode of the memristor, and measuring a conductance of the memristor after the applying of the positive and negative normalization traces, wherein the normalization conductance (G N ) corresponds to the conductance of the memristor after the applying of the positive and negative normalization traces.
  • the normalization conductance (G N ) corresponds to the conductance of the
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons
  • the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak
  • the first voltage trace (V b1 ) and the second voltage trace (V t1 ) are applied at a time-scale compression of 100 such that the time difference ( ⁇ t) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
  • the first voltage bursts comprise first sawtooth voltage spikes
  • the first voltage trace comprises a first spike trace
  • the second voltage bursts comprise second sawtooth voltage spikes
  • the second voltage trace comprises a second spike trace.
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the voltage peaks of the first node comprise neuronal signals of the first neuron
  • the voltage peaks of the second node comprise neuronal signals of the second neuron.
  • a method of evaluating communication pathway connections for a plurality of nodes comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (N pre1 ); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (N pair ), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage
  • An apparatus for evaluating a communication pathway connection comprising: a memristor comprising a first electrode and a second electrode; a controller comprising at least one computer processor and memory operable connected to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (V b1 ) to be applied to a first electrode of a memristor, the first voltage trace (V b1 ) being based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component, (b) cause a second voltage trace (V t1 ) to be applied to a second electrode of the memristor, the second voltage trace (Vt1) being based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the
  • the first voltage trace (V b1 ) corresponds to a time-compressed representation of the voltage peaks of the first node
  • the second voltage trace (V t1 ) corresponds to a time-compressed representation of the voltage peaks of the first node
  • ⁇ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000. [0166] 40.
  • the apparatus of sentence 29 or any preceding sentence wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst.
  • the controller is configured to cause the first voltage trace (Vb1) in (a) and the second voltage trace (Vt1) in (b) to be applied simultaneously.
  • the final conductance (Gf) is determined in (c) after the first voltage trace (Vb1) is applied in (a) and after the second voltage trace (Vt1) is applied in (b).
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons
  • the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
  • the controller is further configured to determine the normalization conductance (GN) by: simultaneously causing a positive normalization trace to be applied to the first electrode of the memristor and causing a negative normalization trace to be applied to the second electrode of the memristor, wherein: the positive normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprises a plurality of rectangular positive-voltage bursts over the period of time, the negative normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, and the negative normalization trace comprises a plurality of rectangular negative-voltage bursts over the period of time, and determining a conductance of the memristor after the positive and negative normalization traces are applied, the normalization conductance (G N ) corresponding to the conductance of the memristor after the positive and negative normalization traces are applied.
  • the normalization conductance (G N ) corresponding to the conductance of the memristor after
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons
  • the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak
  • the first voltage trace (V b1 ) and the second voltage trace (V t1 ) are applied at a time-scale compression of 100 such that the time difference ( ⁇ t) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
  • An apparatus for evaluating a communication pathway connection comprising: a memristor comprising a first electrode and a second electrode; and a controller comprising at least one computer processor and memory operably coupled to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (Vb1) to be applied to the first electrode of the memristor, and simultaneously cause a second voltage trace (V t1 ) to be applied to the second electrode of the memristor, wherein: the first voltage trace (V b1 ) is based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprises a plurality of first voltage bursts over a period of time, and the first voltage bursts each comprise a positive component and a negative component, the second voltage trace (Vt1) is based on voltage peaks of a second node of
  • the first voltage bursts comprise first sawtooth voltage spikes
  • the first voltage trace comprises a first spike trace
  • the second voltage bursts comprise second sawtooth voltage spikes
  • the second voltage trace comprises a second spike trace.
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the voltage peaks of the first node comprise neuronal signals of the first neuron
  • the voltage peaks of the second node comprise neuronal signals of the second neuron.
  • An apparatus for evaluating communication pathway connections for a plurality of nodes comprising: at least one computer processor configured to, for each pair of a plurality of pairs of the nodes: (a) identify first voltage peaks in a first signal trace corresponding to a first node of the pair, determine occurrence times for the first voltage peaks, and determine a total number of the first voltage peaks (N pre1 ); (b) identify second voltage peaks in a second signal trace corresponding to a second node of the pair, determine occurrence times for the second voltage peaks, and determine a total number of the second voltage peaks (N pre2 ); (c) determine a total number of time-correlated voltage-peak pairs (N pair ), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determine a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (N pair ) and the total number of the first
  • a non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating a communication pathway connection, wherein the method comprises: (a) generating a first voltage trace (V b1 ) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (V t1 ) to a second
  • the storage medium of sentence 57 wherein, for the first voltage trace (V b1 ), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0185] 59.
  • 59. The storage medium of sentence 54 or any preceding sentence, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero. [0187] 61.
  • the storage medium of sentence 60 wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
  • Vt1 the second voltage trace
  • Vt1 midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
  • 63 The storage medium of sentence 54 or any preceding sentence, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values. [0190] 64.
  • the storage medium of sentence 54 or any preceding sentence wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of ⁇ , and the second voltage trace (V t1 ) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of ⁇ , and ⁇ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000.
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons
  • the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
  • the storage medium of sentence 68 wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals.
  • the pair of nodes comprises a pair of neurons including a first neuron and a second neuron
  • the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons
  • the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak
  • the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference ( ⁇ t) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
  • the storage medium of sentence 76 wherein: the applying of the positive- polarity rectangular voltage pulse to the memristor comprises applying the positive-polarity rectangular voltage pulse to the first electrode of the memristor, and the reading of the conductance of the memristor comprises reading a current of the memristor and determining the conductance of the memristor from the current. [0204] 78.
  • a non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating communication pathway connections for a plurality of nodes, the method comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (N pre2 ); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of

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Abstract

Methods and apparatuses are provided for evaluating a communication pathway connection. One of the methods includes generating a first voltage trace based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; generating a second voltage trace based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; applying the first voltage trace to a first electrode of a memristor; applying the second voltage trace to a second electrode of the memristor; measuring a final conductance of the memristor based on one or more pairs of time-correlated voltage bursts; determining a first conductance change corresponding to a difference between the final conductance and an initial conductance; determining a second conductance change corresponding to a difference between a normalization conductance and the initial conductance; and determining a strength of a communication pathway between the pair of nodes based on a ratio of the first conductance change to the second conductance change.

Description

H0498.70804US01 METHOD AND APPARATUS FOR EVALUATING NEURONAL CONNECTIVITY USING A MEMRISTOR CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application claims the benefit of priority under 35 U.S.C. §119(e) to U.S. Provisional Patent Application Serial No. “63/591,189”, filed on October 18, 2023, and entitled “METHOD AND APPARATUS FOR EVALUATING NEURONAL CONNECTIVITY USING A MEMRISTOR,” under Attorney Docket No. H0498.70804US01, which is incorporated by reference herein in its entirety. FIELD [0002] The present disclosure relates to techniques for analyzing communications of signals between sites of a biological organism. More specifically, the present disclosure relates to techniques for assessing a connection strength of a biological neuronal connection between a pair of neurons by using a memristor to imitate actual neuronic relationships corresponding to neuronal signals for the pair of neurons. For a plurality of actual signals measured for a plurality of neurons, a single memristor may be used to assess a connection strength of each individual pair of neurons on a pair-by-pair basis, or a plurality of memristors may each be used to assess, in parallel, a respective subset of pairs of the neurons. Whether by a single memristor or a plurality of memristors, assessments of pairs of neurons may be automated, such that a connection strength of a pair of neurons may be assessed using actual neuronic signals of the neurons of the pair, with minimal human intervention. BACKGROUND [0003] Understanding communications of signals within a biological organism is important to understanding how to diagnose a state of the biological organism and/or to determine a cause of symptoms expressed by the biological organism and/or to improve a condition of the biological organism. Of particular interest is understanding communications of neuronal signals, which may be signals communicated between neurons of a central nervous system of a mammal to control a variety of different activities of the mammal. For example, signals communicated between neurons of a brain of the mammal may be used to control motor functions, thinking, memory, sensory functions, etc., of the mammal. Further, understanding signals communicated between neurons of the brain may be used to advance technology related to replicating brain activity using microprocessors and other computer technologies. [0004] Conventionally, efforts have been made to imitate biological neuronal connections using an artificial, i.e., man-made, platform comprising, e.g., transistors, memories, and other electronic devices. For example, such electronic devices have been used in neuromorphic engineering to reproduce a brain’s unique computing ability on an electronic platform. A biological connectivity map may be generated from intracellularly recorded neuronal signals via software-assisted analysis; however, generation of such a map is computationally intensive and time-consuming. Further, a difficulty remains in developing neuromorphic systems that can accurately mimic a biological neuronal network such that a connection strength between the neurons can be mimicked. SUMMARY OF THE DISCLOSURE [0005] The inventors have recognized and appreciated the need for determining an existence of a neuronal connection between a pair of neurons and also the need for assessing a connection strength between the pair of neurons, and have developed a fundamental approach to mapping neuronal connectivity using one or more memristors to process signals generated based on actual signals, e.g., intracellular recordings obtained by measuring from individual neurons of a network of mammalian neurons. In intracellular recording technology, which is a cutting-edge electrophysiological recording technology, discernible peaks may be recognized in a signal trace representing a measurement over a period of time (“measurement period”). For example, a first signal trace measured from a first neuron may exhibit discernible peaks that occur at various times during the measurement period. Such time-correlated peaks may indicate neuronal activity at the first neuron during the measurement period. Similarly, a second signal trace measured from a second neuron may exhibit discernible peaks that occur at various times during the measurement period, indicating neuronal activity at the second neuron during the measurement period. The inventors have recognized and appreciated that the time-correlated peaks of the first and second signal traces may be analyzed using a memristor to determine a degree of neuronal connectivity between the first and second neurons, and have developed techniques for assessing a connection strength between the first and second neurons based on the time- correlated peaks. That is, for neurons of a group of neurons for which an actual measurement of a signal trace is available over a same measurement period for each individual neuron of the group, connection strengths of individual pairs of the group may be assessed by correlating the signal traces measured for the neurons on a pair-by-pair basis. [0006] For example, for a group of neurons comprising A, B, C, and D, a connection strength between A and B may be assessed using a signal trace for A measured over a period of time and a signal trace for B measured over the same measurement period. Similarly, a connection strength between A and C may be assessed using the signal trace for A and a signal trace for C measured over the same measurement period. If signal traces are available for A, B, C, and D over the same measurement period, connection strengths may be assessed for all permutations of pairs of neurons of the group comprising A, B, C, and D. [0007] The inventors have recognized and appreciated that a single memristor may be used to assess neuronal connectivity for dozens, hundreds, or more pairs of neurons by correlating individual signal traces for the pairs of neurons. The inventors have developed a technique that utilizes a memristor’s ability to learn temporal correlations of its input signals. A memristor may be used not only to identify neuronal connections with an accuracy of 98.7% but also may be used to measure strengths of the neuronal connections. By using a signal trace for each neuron of a network of neurons, a single memristor may be used to map neuronal connections between neuron pairs of the network and to provide a value for connection strength for each of the neuron pairs. Such a map may benefit neuromorphic engineering and neuroscience alike. [0008] According to an aspect of the technology of the present disclosure, a method of evaluating a communication pathway connection is provided. The method may comprise: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (Gf) of the memristor based on one or more pairs of time- correlated voltage bursts; (f) determining a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi); (g) determining a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi); and (h) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1 / ΔG2. According to another aspect of the technology of the present disclosure, a method of evaluating a communication pathway connection is provided. The method may comprise: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (c), determining a first final conductance (Gf1) of the memristor; (e) applying the first voltage trace (Vb1) to the second electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to the first electrode of the memristor; (f) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (e), determining a second final conductance (Gf2) of the memristor; (g) determining a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determining a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi); (h) determining a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; and (i) determining a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair / Npre1, or, for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair / Npre2. [0009] According to a further aspect of the technology of the present disclosure, a method of evaluating communication pathway connections for a plurality of nodes is provided. The method may comprise, for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2). [0010] According to a yet another aspect of the technology of the present disclosure, an apparatus is provided for implementing one or more of the foregoing methods. [0011] According to a further aspect of the technology of the present disclosure, a non- transitory computer-readable storage medium is provided in which computer-readable code is stored that, when executed, causes a computer processor to implemental one or more of the foregoing methods. BRIEF DESCRIPTION OF THE DRAWINGS [0012] A skilled artisan will understand that the accompanying drawings are for illustration purposes only. It is to be understood that in some instances various aspects of the present disclosure may be shown exaggerated or enlarged to facilitate an understanding of the disclosure. In the drawings, like reference characters generally refer to like features, which may be functionally similar and/or structurally similar elements, throughout the various figures. The drawings are not necessarily to scale, as emphasis is instead placed on illustrating and teaching principles of the various aspects of the present technology. The drawings are not intended to limit the scope of the claims or the present disclosure in any way. In the drawings: [0013] FIG.1A schematically shows a network of biological neurons, some of which may be interconnected across synapses, in accordance with some embodiments. [0014] FIG.1B illustrates an enlarged view of a presynaptic and postsynaptic neuron, corresponding synaptic signals and a memristor configured for determining a connection strength of the between synaptic neurons, in accordance with some embodiments. [0015] FIG.1C shows an example of a conductance-change map (e.g., a heat map) representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments. [0016] FIG.1D shows a conductance-change map representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments. [0017] FIG.2A schematically shows a memristor apparatus, according to some embodiments. [0018] FIG.2B schematically shows a second memristor apparatus, according to some embodiments. [0019] FIG.3 shows voltage spikes applied to a memristor and a graph of memristor current measured in response to the applied voltage cycle, in accordance with some embodiments. [0020] FIG.4A shows a pulsed waveform applied to a memristor and a graph of memristor current measure in response to the applied voltage cycle, in accordance with some embodiments. [0021] FIG.4B shows a graph of conductance G as a function of the number of pulses for the 30 repetitions of the 100-pulse sequence, in accordance with some embodiments. [0022] FIG.5A shows a heatmap of ΔG measured in response to positive voltage pulses, in accordance with some embodiments. [0023] FIG.5B shows graphs of ΔG as a function of the number of positive-polarity pulses, in accordance with some embodiments. [0024] FIG.5C shows the heatmap at the bottom portion of FIG.5B as part of a larger heatmap encompassing pulse widths up to and including 10 ms. [0025] FIG.5D shows graphs and heatmaps similar to those shown in FIGs.5B and 5C, but with the memristor driven under depression conditions, such that ΔG < 0, in accordance with some embodiments. [0026] FIG.6A shows a schematic of potentiation and depression for a memristor, in accordance with some embodiments. [0027] FIG.6B shows a second schematic of potentiation and depression for a memristor, in accordance with some embodiments. [0028] FIG.6C shows examples of how the voltage V across the memristor may vary for different values of the time delay Δt, in accordance with some embodiments. [0029] FIG.7A shows a first STDP curve, in accordance with some embodiments. [0030] FIG.7B shows a second STDP curve, in accordance with some embodiments. [0031] FIG.8 schematically shows renderings of signal traces for two biological neurons of a rat, in accordance with some embodiments. [0032] FIG.9 shows a graph of ΔG as a function of measurement number for various values of Δt, in accordance with some embodiments. [0033] FIG.10 schematically shows signal traces for four different neurons, with a signal trace for a first pair of neurons being overlayed, and with a signal trace for a second pair of neurons being overlayed. [0034] FIG.11A shows a process flow for evaluating a connection between a pair of neurons, according to some embodiments. [0035] FIG.11B shows the results from the process flow described in connection with FIG.11A. [0036] FIG.12 shows a heatmap for ΔG under RESET driving of the memristor for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments. [0037] FIG.13 shows a heatmap for Npair for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments. [0038] FIG.14 shows a scatterplot graph of ΔG as a function of Npair, showing that a higher ΔG correlates to a higher Npair, in accordance with some embodiments. [0039] FIG.15 shows a diagram for understanding the normalization concept, in accordance with some embodiments. [0040] FIG.16 shows a process flow for determining the normalization factor for a pair of neurons, according to some embodiments. [0041] FIG.17 graphically illustrates a process flow for normalizing ΔG for pair of neurons. [0042] FIGs.18A and 18B show a software-computed Z connectivity map and a memristor-driven ω connectivity map, respectively, for all 256 possible combinations of pairs of traces for sixteen (16) traces of intracellular recordings of neurons. [0043] FIGs.18C and 18D show filtered versions of the Z map of FIG.18A and the ω map of FIG.18B, respectively, after filtering to show only data for pairs of traces that have time-correlated AP pairs. [0044] FIG.19A shows neural wiring diagram for the memristor-driven ω connectivity map of FIG.18D. [0045] FIG.19B shows a scatter plot of ω vs Z obtained from the results in FIGs.18A and 18C. [0046] FIG.19C shows the number of software identified connections plotted next to the number of memristor found connections, in accordance with some embodiments. [0047] FIG.19D shows mapping sensitivity and accuracy for all 4 groups combined together. [0048] FIG.20 shows neuronal connection and connection strength mapping for the four groups of 16 rat neurons, in accordance with some embodiments. [0049] FIG.21 includes plot 2100 that shows positive square spikes for driving the bottom electrode (Vb) and its negative version for driving the top electrode of the memristor (Vt) with a time difference, Δt=tb-tb, for memristor eSTDP, in accordance with some embodiments. [0050] FIG.22 shows a memristor driven with the intracellular recording dataset via eSTDP, in accordance with some embodiments. [0051] FIG.23 shows a memristor ΔG > 0 map obtained via eSTDP and software-found Npair_STDP map for 4 groups of 15 rat neurons, in accordance with some embodiments. DETAILED DESCRIPTION [0052] Aspects of the technology described herein are directed to systems and methods for mapping of neuronal connectivity to improve neuromorphic engineering. For example, aspects of the present disclosure use a memristor to analyze signal produced by neurons to improve the detection of neuronal connectivity by detecting time correlated signals from neuronal pairs Based on the detected signals, neuronal connectivity can be mapped and the strength of their connection may be determined. [0053] Neuromorphic engineering has spawned a number of electronic systems inspired by certain features of a mammalian brain, such as co-location of memory and computing. A pursuit of some aspects of neuromorphic engineering may even go beyond brain-inspired design, and may seek to mimic biological neuronal connectivity on an electronic platform (e.g., via one or more programmed microprocessors) in an effort to reproduce the brain’s computing ability. Such a pursuit, however, has been deterred due to a lack of a reliable neuronal connectivity map, i.e., due to insufficient knowledge of neuronal connections and their connection strengths as well as their associated functions. [0054] Recent advances in electrophysiological recording technology may promote interest in neuromorphic engineering. One such advance is the development of an electrode array that may be used to perform intracellular recording of signals of neurons of a mammalian neuronal network. Network-wide intracellular recordings of neurons may be possible with not only a high signal-to-noise ratio but also a one-to-one correspondence between a recording trace of each electrode coupled to a corresponding one or the neurons. That is, an individual signal trace may be measured for each neuron via a corresponding electrode coupled to the neuron. Such intracellular recordings may contain useful data for understanding neuronal activity of individual neurons as well as neuronal connectivity of a neuron relative to other neurons of the network. Each of the signal traces may comprise clearly identifiable time-correlated peaks measured during a common measurement period. Such time-correlated peaks may be used to analyze a pair of neurons comprising a presynaptic neuron and a postsynaptic neuron, to assess a strength of a connection between the pair of neurons. Events at the presynaptic neuron may give rise to neuronal activity that results in temporal or time-correlated peaks in the signal trace measured for the presynaptic neuron. Such neuronal activity in the presynaptic neuron may, in turn, excite the postsynaptic neuron and may give rise to neuronal activity that results in temporal peaks in the signal trace measured for the postsynaptic neuron. [0055] Intracellular recordings may be processed using software to identify signal traces with time-correlated peaks of a pair of neurons. As will be appreciated, software-based search of such signal traces is computationally intense and time consuming. [0056] The inventors have developed techniques that use a memristor to analyze signal traces of a pair of neurons to identify time-correlated peaks for each signal trace and to determine a connection strength of the pair of neurons based on the identified time-correlated peaks of the two signal traces. According to some embodiments of the present technology, the pair of neurons comprise a presynaptic neuron and a postsynaptic neuron, and the two signal traces may comprise one signal trace for the presynaptic neuron and one signal trace for the postsynaptic neuron. A programmed computer processor may perform processing based on the identified time-correlated peaks to generate voltage traces to be used to drive a memristor, to control driving of the memristor using the voltage traces, and to assess changes in the memristor in response to being driven by the voltage traces. For example, the computer processor may execute code stored on a non-transitory computer-readable medium (e.g., a hard-drive, a CD, a USB drive, etc.) to perform the processing. The assessed changes may be used to determine a connection strength of the pair of neurons. In one application of the technology disclosed herein, by repeating such processing for each pair of neurons of a network of neurons, a neuronal map may be produced indicating a connection strength of each pair. The neuronal map may be imitated on an artificial platform, such as an electronic device comprising solid-state memory and a transistor network, for neuromorphic engineering purposes. [0057] Turning now to the drawings, FIG.1A-1C illustrates concepts involved in the use of a memristor to analyze neuronal connectivity, according to some embodiments of the present technology. FIG.1A schematically shows a network of biological neurons, some of which may be interconnected across synapses, in accordance with some embodiments. The synaptic connection may have various connection strengths. For example, the connection strength between a pair of neurons can be strengthened or weakened as a result of a long-term potentiation (LTP) process or a long-term depression (LTD) process. The dotted circle 102 indicates a region of enlargement, shown in FIG.1B. [0058] FIG.1B illustrates an enlarged view of a presynaptic and postsynaptic neuron, corresponding synaptic signals and a memristor configured for determining a connection strength of the between synaptic neurons, in accordance with some embodiments. FIG.1B schematically shows an enlarged view of a synapse 102. The synapse 102 is the junction between a portion of presynaptic neuron 104 and a portion of postsynaptic neuron 106. The synapse 102 between the presynaptic and postsynaptic neurons is represented by dots in the top portion of FIG.1B. The presynaptic neuron may be associated with a previously measured signal trace comprising a plurality of time-correlated peaks, which may be voltage peaks or action potentials (APs) measured at various instances of time over a period of time. Signal trace 105 schematically shows the signal trace (or AP trace) for the presynaptic neuron. Similarly, the postsynaptic neuron may be associated with an additional previously measured signal trace comprising a plurality of APs measured at various instances of time over the period of time. Signal trace 107 schematically shows the signal trace (or AP trace) for the postsynaptic neuron. The signal trace 107 may be different from the signal trace 105 and comprise a different number of APs occurring at instances of time that are different from the instances of time at which the APs of signal trace 105 occur. It should be understood that signal traces 105 and 107 represent traces of actual signals measured for the presynaptic and postsynaptic neurons, respectively, over the same measurement period. [0059] According to some embodiments of the present technology, signal trace 105 may be processed to identify APs and their timings during the measurement period; these time- correlated APs may be used to generate a voltage trace Vb corresponding to signal trace 105. Similarly, signal trace 107 may be processed to identify APs and their timings during the measurement period; these time-correlated APs may be used to generate a voltage trace Vt corresponding to signal trace 107. [0060] The voltage traces may be used to drive electrodes of a memristor, such as memristor 110. As shown in FIG.1B, Memristor 110 includes top electrodes 112 and 116 configured above bottom electrodes 114 and 118. The top electrodes and bottom electrodes are configured with a crossing region 120 through which the conductance depends on the previously applied signal. In some embodiments, the voltage trace Vb may be used to drive a bottom electrode 114 of a memristor by applying the voltage across bottom electrodes 114 and 118, and the voltage trace Vt may be used to drive a top electrode 112 of a memristor, by applying the voltage across electrodes 112 an 116. In some embodiments, the driving of the bottom and top electrodes of the memristor with the voltage traces Vb, Vt may occur simultaneously. In some embodiments, peaks in the voltage trace Vb may occur with the same timing as the APs of signal trace 105, and peaks in the voltage trace Vt may occur with the same timing as the APs of signal trace 107; thus, the simultaneous driving of the bottom 114 and top 112 electrodes may simulate the APs measured for the presynaptic and postsynaptic neurons, respectively. [0061] In some embodiments, the peaks in the voltage trace Vb may occur at a compressed timing relative to the APs of signal trace 105, and peaks in the voltage trace Vt may occur at a same compressed timing relative to the APs of signal trace 107; thus, the simultaneous driving of the bottom and top electrodes may simulate the APs measured for the presynaptic and postsynaptic neurons, respectively, at a compressed time scale. For example, the time scale of the voltage traces Vb, Vt may be compressed by a factor of 100 relative to the time scale of traces 105 and 107. Stated differently, a span of 100 milliseconds (ms) in traces 105 and 107 may correspond to a span of 1 ms in the voltage traces Vb, Vt, when compressed by a factor of 100. [0062] According to some embodiments of the present technology, after the simultaneous driving of the bottom and top electrodes of the memristor with the voltage traces Vb, Vt, respectively, a final conductance Gf of the memristor is measured and compared with an initial conductance Gi of the memristor before the simultaneous driving, to determine a conductance change ΔG, where ΔG = Gf – Gi. In some embodiments, a connection strength between the presynaptic neuron and the postsynaptic neuron may be assessed based on the conductance change ΔG. [0063] FIG.1C shows an example of a conductance-change map (e.g., a heat map) representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments. In the conductance-change map 130, a relatively darker color indicates a lower conductance change and therefore a weaker connection strength, and a relatively lighter color indicates a higher conductance change and therefore a stronger connection strength. In the conductance-change map 130, the six neurons may serve individually as the presynaptic neuron associated with the driving voltage Vb to the bottom electrode (see vertical axis) or may serve individually as the postsynaptic neuron associated with the driving voltage Vt (see horizontal axis). The bottom portion of FIG.1C schematically shows two cross sections of the memristor 132 and 134. The cross sections show a conductance path between the bottom electrode (BE) and the top electrode (TE) of the memristor. Conductance between the electrodes is facilitated by oxygen vacancies. Accordingly, the accumulation of oxygen vacancies represents the thickness of the conductance path, with thicker paths supporting a larger conductance and thinner paths supporting a smaller conductance. In cross section 132 and 134, oxygen vacancies are depicted as spheres. Cross section 132 illustrates a larger conductance and, by extension, a stronger junction between neurons. By contrast, cross section 134 illustrates a smaller conductance and, by extension, a weaker junction between neurons. [0064] The conductance-change map 130 shows a darker color indicating a weaker connection strength, corresponding to a relatively weaker conduction path between the BE and the TE of the memristor, such as the one shown in cross section 132. Similarly, the conductance-change map 130 shows lighter color – corresponding to a relatively thicker conduction path, such as the one shown in cross section 134. [0065] According to some embodiments of the present technology, non-negligible changes in the conductance of the memristor may be due to spike-timing-dependent plasticity (STDP) of the memristor. With STDP, the memristor’s conductance may change according to a timing difference of the two voltage traces driving the two electrodes of the memristor. In short, if two traces of intracellular recordings (e.g., signal trace 105 and signal trace 107) measured for a pair of connected neurons are used to drive the memristor’s two electrodes, the conductance of the memristor may change in accordance with a time difference of APs of the two traces, where some APs of the trace for the postsynaptic neuron occur in response to and therefore within at a time delay relative to some APs of the trace for the presynaptic neuron. In some embodiments, the presence of an appreciable conductance change may be an indication of a neuronal connection, and a magnitude of the conductance change may be an indication of a connection strength of the neuronal connection. [0066] As a demonstration vehicle, the inventors fabricated a 1.2 μm × 1.2 μm bilayer memristor comprising a TiN top electrode and a Pt bottom electrode sandwiching a bilayer of TiO2/HfO2 forming a switching layer of the memristor. The memristor may be fabricated using known thin-film microfabrication techniques (e.g., CMOS techniques). For example, the memristor may be fabricated using a Si wafer with a 280 nm thermally grown silicon oxide layer that was coated with a photoresist. The coated photoresist may be patterned using UV photolithography. A titanium layer having a thickness of about 10 nm and a platinum layer having a thickness of about 100 nm may each be deposited by sputtering. Following deposition, a lift-off process is used. Following lift-off, sequential deposition of a 5 nm layer of HfO2 and a 5 nm layer of TiO2 is performed using atomic layer deposition at 200 °C and 90 °C, respectively. The thickness of each layer was measured using an ellipsometer. A photoresist was coated and patterned on the deposited switching layer to make a pattern of 20 nm of TiN and 100 nm Pt which were deposited by sputtering. Another photoresist was coated and patterned, followed by reactive ion etching to etch TiO2/HfO2 layers on top of the Pt electrode pad. After removing the photoresist, the memristor was treated with oxygen plasma to clear residuals from the fabrication process. [0067] It should be appreciated that while FIG.1B and 1C show Pt being used for the bottom electrode and TiN being used for the top electrode, the electrodes may be switched such that the top electrode is a Pt material and the bottom electrode is a TiN material. FIG. 1D shows a conductance-change map representing conductance for pairs of neurons of a network of six neurons, in accordance with some embodiments. The bottom portion of FIG. 1D schematically shows two cross sections of the memristor 136 and 138. The cross sections show a conductance path between the BE and the TE of the memristor. Relative to the configuration shown in FIG.1C, the BE and TE are swapped, e.g., the TE is a Pt material and the BE is a TiN material. Accordingly, the directionality of the conductive path is reversed. [0068] The memristor was used to find pairs of intracellular-recording traces having peaks that are time-correlated relative to each other. The intracellular-recording traces were measured from cultured rat neurons. Using the memristor, N intracellular-recording traces were evaluated to find pairs of time-correlated traces (“trace pairs”) amongst the N intracellular-recording traces. Similar to the map shown in the top portion of the right panel of FIG.1, an N × N map was produced corresponding to all possible combinations of trace pairs. From four (4) distinct groups of sixteen (16) intracellular-recording traces, it was found that the memristor was able to map not only 32 out of 35 actual connections, with a 98.7% accuracy and a 91.4% sensitivity, but also was able to provide a quantitative measure of the relative connection strengths of the connections. Such results demonstrate that a memristor may be used to copy a functional connectivity map of a neuronal network. The present technology combines memristor technology with electrophysiological recording technology and may be used advantageously to advance neuromorphic engineering and neurobiology technologies. Analog Switching of a Memristor [0069] Initially, analog resistive switching behavior of the TiO2/HfO2 bilayer memristor was verified experimentally, to ensure that the memristor is suitable for STDP. FIG.2A schematically shows a memristor apparatus, according to some embodiments of the present technology. The memristor apparatus 200 may be used for verification that the memristor exhibits suitable STDP for assessing the connection strengths. The memristor apparatus may comprise the memristor supported by an insulative substrate 202 (e.g., a quartz wafer, a SiO2- coated Si wafer, etc.) a first probe electrically contacting a bottom electrode (BE) 204 of the memristor, and a second probe electrically contacting a top electrode (TE) of the memristor 206. The first and second probes may be controlled by a controller 210 comprising a microprocessor 212 and a quad analog switch 214. The microprocessor 212may be configured to control the switch 214 to drive the BE 204 and TE 206 of the memristor. The switch may comprise first and second channels attached to a waveform generator216, a third channel connected to a source measure unit (SMU) of a device analyzer 218, and a fourth channel connected to ground via the device analyzer. A power supply 220 may be provided to power the controller. [0070] For example, two terminals of the memristor may be connected to a dual analog switch that is able to perform relay switching between a device analyzer (e.g., a Keysight B1505A power device analyzer) and a waveform generator (e.g., a Keysight 33500B waveform generator) controlled via an Arduino device. The power device analyzer may perform I-V sweeps for electrical characterization and may measure current before and after applying voltage pulses generated by the waveform generator. As an example, in order to perform memristor driving with an intracellular recording dataset, the spike traces converted from the intracellular recording traces are divided into an appropriate length, which does not exceed the maximum capacity of the memory of the arbitrary waveform generator. One such intracellular recording may be two and a half minutes in length, although recordings of other lengths may be used as aspects of the technology described herein are not limited in this respect. After applying the spike segment, the partial change in G is measured. In some embodiments, the change in G is measured after each spike segment of the intracellular recording is applied. After measuring, the memristor is initialized into the same low- conductance state by a RESET process, using a RESET pulse. An example RESET pulse may have an amplitude of -4 V with a 10 ms pulse width. After each change in G (ΔG) is measured, the ΔGs are accumulated to obtain final ΔG values. [0071] FIG.2B schematically shows a second memristor apparatus, according to some embodiments. Second memristor apparatus 230 is configured with the same components as memristor apparatus 200, shown in FIG.2A. Relative to apparatus 200, apparatus 230 has a different configuration of electrodes in the memristor. As shown in FIG.2B, the TE 232 is a Pt material and the BE 234 is TiN material. FIG.3 shows voltage spikes applied to a memristor and a graph of memristor current measured in response to the applied voltage cycle, in accordance with some embodiments. The bottom plot 300 of FIG.3 shows a graph of memristor current measured as a function of voltage V applied across the memristor during a cyclic voltage sweep, to verify analog switching behavior. The voltage V corresponds to a voltage applied to the BE while maintaining the TE at a reference voltage of 0 V. During the voltage sweep, the applied voltage is first ramped up and down nine (9) times between 0 V and 2 V, with a step of 20 mV, and then ramped down and up nine (9) times between 0 V and –2 V, with a step of 20 mV, as shown in the top plot 302 of FIG.3. During the cyclic sweep in the positive voltage range, the memristor’s conductance G increases from 2.0 mS to 12.3 mS, indicating memristor potentiation (see portion 304 of the current-voltage graph 300). During the cyclic sweep in the negative voltage range, G decreases from 0.44 mS to 0.12 mS, indicating memristor depression. The difference in the conductance of the memristor depending on whether the cyclic sweep is in the positive voltage range or the negative voltage range may indicate analog resistive switching of the memristor, because an overall thickness of charge carriers (e.g., oxygen vacancies) forming a conductive path through the switching layer, between the BE and the TE, is modulated by the voltage with a memory effect. As can be seen from the current-voltage graph 300 of FIG.3, causing memristor potentiation (i.e., a positive conductance change) is easier than causing memristor depression (i.e., a negative conductance change). Although not wishing to be bound by theory, it is believed that the rates of the conductive-path change (i.e., the thickening or thinning of the conductance path) depend on the polarity of the applied voltage. [0072] It should be understood that although a memristor may be used in a digital mode, in which the memristor is either highly conductive or lowly conductive, or in an analog mode, in which the memristor’s conductance may vary across a continuous spectrum of values, the memristor of the present technology is used in the analog mode in order to assess relative connection strengths of different pairs of neurons. [0073] Alternatively, instead of using a cyclic voltage sweep with a triangular waveform (see FIG.3) to induce analog resistive switching of the memristor, the memristor may be driven with a pulsed waveform to induce analog resistive switching. FIG.4A shows a pulsed waveform applied to a memristor and a graph of memristor current measure in response to the applied voltage cycle, in accordance with some embodiments. The top plot 402 of FIG. 4A shows a pulse waveform used to produce the analog resistive switching in the memristor. The bottom plot 400 of FIG.4A shows a graph of conductance G as a function of the number of pulses applied across the memristor. As can be seen from the plots, potentiation occurs with positive pulses having an amplitude of 2 V, a positive polarity, a pulse width of 0.05 ms, and a center-to-center interval of 0.2 ms. Specifically, G was found to increase, indicating potentiation, with a sequence of 50 positive rectangular voltage pulses applied across the memristor, while G was found to decrease, indicating depression, with a subsequent sequence of 50 negative voltage rectangular pulses having an amplitude of 2 V, a negative polarity, a pulse width of 0.05 ms, and a center-to-center interval of 0.2 ms (“100-pulse sequence”). Values for G were measured using relatively small rectangular read pulses having an amplitude of 1 V and a pulse width of 0.05 ms, which do not perturb the memristor’s conductance state. The read pulses (short pulses in the top plot 402 of FIG.4A) were timed to occur between two adjacent 2-V state-changing pulses (tall pulses in the top portion of FIG.4A). The graph of G as a function of the number of pulses, at the bottom plot 400 of FIG.4A, shows that pulsed potentiation and pulsed depression may be induced reproducibly and consistently, with a standard deviation of 0.13 μS for a repeated application of the 100- pulse sequence for a total of 30 repetitions. [0074] FIG.4B shows a graph of conductance G as a function of the number of pulses for the 30 repetitions of the 100-pulse sequence, in accordance with some embodiments. As evident from the graph of FIG.4B, the change in the conductance G occurs predictably from repetition to repetition. Note that after each application of the 100-pulse sequence the memristor was initialized into a same low-conductance state by application of a voltage of –4 V for a duration of 10 ms, in a RESET process. [0075] FIG.5A shows a heatmap of ΔG measured in response to positive voltage pulses, in accordance with some embodiments. In the pulsed mode, the memristor was found to exhibit a change in conductance ΔG for potentiation (ΔG > 0) as a function of pulse width and pulse amplitude, as shown in the heatmap at a bottom plot 500 of FIG.5A. To generate the heatmap, each value of ΔG was obtained by applying, after performing the RESET process, a sequence of 100 positive voltage pulses for a given amplitude and a given width, an example of which is shown at the top of FIG.5A in plot 502. As evident from heatmap 500, potentiation (ΔG > 0) was minimal for an amplitude of 1 V or lower for any pulse width tested. For this reason, 1-V read pulses were used, as such a low voltage would not affect ΔG with any significance. In contrast, it was found that considerable potentiation occurred for an amplitude of 2 V for any pulse-width tested. It was also observed that, for a given pulse width, ΔG grew rapidly and nonlinearly with an increase in pulse amplitude, becoming clearly measurable when the pulse amplitude exceeded a certain threshold voltage Vth. Overall, Vth was found to decrease with an increase in pulse width. For example, Vth was found to be approximate 1.4 V for pulse widths between 0.05 ms and 0.2 ms whereas Vth was found to be approximately 1.2 V for a pulse widths of 1 ms. [0076] For the case of depression of the memristor, voltage pulses having a negative polarity were applied to the memristor after initializing the memristor into a same high- conductance state by application of 2 V for a duration 10 ms, in a SET process. The memristor was found to exhibit a similar dependency on pulse amplitude and pulse width as the case of potentiation of the memristor. [0077] FIG.5B shows graphs of ΔG as a function of the number of positive-polarity pulses, in accordance with some embodiments. The ΔG as a function of the number of positive-polarity pulses (potentiation), is shown for pulse amplitudes of 0.8 V, 1.0 V, 1.2 V, 1.4 V, 1.6 V, 1.8 V, and 2.0 V. The different traces in the graphs of FIG.5B correspond to different pulse widths in a range from 0.05 ms to 10 ms, as shown in the key in the top left graph of FIG.5B. As shown in the plots, the different traces are overlaid for voltages between 0.8 V and 1.4 V. At 1.6 V, the traces being to separate, with the longer traces starting to distinguish from the shorter ones. At 1.8 V, the 10 ms trace 508, has the largest ΔG, followed by the 7.5 ms trace 506, the 5.0 ms trace 504, the 2.5 ms pulse 502, and the 1.0 ms pulse 500. After the RESET process was performed, each trace was obtained using read pulses that occur between adjacent driving pulses. That is, a read pulse occurred between two adjacent driving pulses. As evident from the graphs, for pulse amplitudes less than 1.4 V, ΔG does not vary appreciably with the number of pulses at any of the pulse widths tested, whereas, for pulse amplitudes greater than 1.4 V, ΔG varies noticeably with the number of pulses. Thus, in order for the memristor to be used to exhibit noticeable STDP pulsed-mode resistive switching, the Vth for the memristor was determined to be approximately 1.4 V for potentiation, for the range of pulse-widths tested. [0078] FIG.5C shows the heatmap at the bottom portion of FIG.5B as part of a larger heatmap encompassing pulse widths up to and including 10 ms. Each ΔG in the heatmap represents a conductance increase after applying a 100-pulse sequence of driving pulses. That is, each ΔG in the heatmap corresponds to a difference between a final conductance (Gf) measured after applying the 100-pulse sequence and an initial conductance (Gi) after a RESET process is performed on the memristor, where ΔG = Gf − Gi. [0079] FIG.5D shows graphs and heatmaps similar to those shown in FIGs.5B and 5C, but with the memristor driven under depression conditions, such that ΔG < 0, in accordance with some embodiments. In FIG.5D, depression of the memristor occurred for various pulse amplitudes and various pulse widths. The graphs include traces of ΔG as a function of the number of pulses. Within each graph, the traces identify the various pulse widths according to the key shown in the graph at the top left of FIG.5D. For each ΔG trace in the graphs, the memristor was driven by applying a sequence of 100 negative-polarity voltage pulses for a given a given pulse width in the range of 0.05 ms to 10 ms, and a given amplitude in the range of 0.8 V to 2 V, as indicated at the bottom left corner of each graph. For each pulse trace, the traces are practically indistinguishable for voltages between 0.8V and -1.4V. Starting at -1.6 V, some differentiation can be resolved on the graphed scale, with the 10 ms trace 508 having the most negative values and the 0.05 ms trace 510 having the least negative values. At -2.0 V, the 10 ms trace 508, 7.5 ms trace 506, and 5.0 ms trace 504 can each be seen at the bottom. The 0.05 ms trace, 0.1 ms trace, and 0.25 ms trace can be seen at the top. In the middle, many of the traces overlap making the traces for 0.5 ms 516, 0.75 ms 518, 1 ms 500, and 2.5 ms 502 difficult to distinguish. Each ΔG trace was obtained after the memristor underwent the SET process. For each trace, a read pulse occurred between two adjacent drive pulses. In the bottom section of FIG.5D a heatmap and an enlarged portion of the heatmap show values for ΔG < 0 for various pulse amplitudes and pulse widths. Each ΔG in the heatmap represents a final conductance decrease after the SET process and after applying a 100-pulse sequence. STDP Engineering [0080] As will be appreciated, the memristor’s STDP results in certain embodiments from the ability of the memristor to retain a conductance state even after a driving voltage that causes the memristor to attain that conductance state has been removed. Such a memory effect may be used advantageously to accumulate conductance changes when the memristor is driven with a voltage traces comprising various numbers of voltage bursts occurring at various times during the driving period. [0081] To produce traces for driving the memristor to determine a connection strength of a pair of neurons, signal traces measured for each neuron of the pair are processed. As noted above, the signal traces comprise actual data measured for the neurons of a network of neurons of a biological organism (e.g., a mammal). [0082] According to some embodiments of the present technology, the pair of neurons may comprise a first neuron (e.g., a presynaptic neuron) and a second neuron (e.g., a postsynaptic neuron) of a group of neurons of a network. Each neuron of the network may be associated with its own signal trace recorded during a measurement period, such that all the neurons of the network each has its own signal trace recorded during the same measurement period. A first voltage trace for driving the memristor may be generated based on a first signal trace corresponding to the first neuron, and second voltage trace for driving the memristor may be generated based on a second signal trace corresponding to the second neuron. The first voltage trace may be applied to a first electrode of the memristor (e.g., the bottom electrode), and the second voltage trace may be applied to a second electrode of the memristor (e.g., the top electrode) simultaneously with application of the first voltage trace to the first electrode. That is the bottom and top electrodes of the memristor may be driven with the first and second voltage traces simultaneously. [0083] According to some embodiments of the present technology, the first signal trace corresponding to the first neuron may comprise a plurality of APs or voltage transients that occur at various times during the measurement period. The APs need not occur at regular time intervals but may be interspersed throughout the measurement period. For example, the APs may comprise three (3) voltage peaks occurring at tA, tB, and tC during the measurement period. In some embodiments, the first voltage trace may be generated to have a driving period having a same duration as the measurement period of the first signal trace and to have voltage bursts occurring at tA, tB, and tC of the driving period. In some other embodiments, the first voltage trace may be generated to have a driving period having a compressed duration corresponding to the measurement period divided by a compression factor C. For example, if the measurement period for the first signal trace is 100 seconds, and tA occurs at 15 seconds, tB occurs at 55 seconds, and tC occurs at 90 seconds, then, for a time-scale compression of C = 10, the first voltage trace may have a driving period of 10 seconds, corresponding to 100 seconds/C, tA may occur at 1.5 seconds, tB may occurs at 5.5 seconds, and tC may occur at 9.0 seconds. In a similar manner, the second driving trace may be generated based on the second signal trace corresponding to the second neuron. [0084] According to some embodiments of the present technology, the voltage bursts of the first and second driving traces may be biphasic such that each voltage burst may have a positive-polarity portion and a negative-polarity portion. In some embodiments, a center of each voltage burst may have a voltage of 0 V, such that a sum of the positive-polarity portion and the negative-polarity portion may be 0. In some embodiments, the voltage bursts may have a shape of one period of a sine wave, or one period of a sawtooth wave, or one period of a biphasic square wave, or one period of a triangular wave. It should be understood that a square wave may have rectangular wave portions and need not have strictly square-shaped portions. [0085] According to some embodiments of the present technology, the voltage bursts of the first and second driving traces may comprise sawtooth voltage spikes, with each voltage spike comprising a positive-polarity portion and a negative-polarity portion. FIG.6A shows a schematic of potentiation and depression for a memristor, in accordance with some embodiments. The memristor includes a TiN material for a top electrode and an Pt material for a bottom electrode. A switching layer is sandwiched between the top and bottom electrodes. The left portion of FIG.6A schematically shows a memristor 600 being driven by first 602 and second 604 voltage traces. The first voltage trace 602, Vb, shown in the right portion of FIG.6A, comprises a first sawtooth spike and is applied to the bottom electrode 606 of the memristor. The first sawtooth spike 602 occurs at a time tb during the driving period of the memristor. The second voltage trace 604, Vt, shown in the right portion of the FIG.6A, comprises a second sawtooth spike and is applied to the top electrode 608 of the memristor simultaneously with application of the first voltage trace Vb. The second sawtooth spike occurs at a time tt during the testing period. [0086] As shown in FIG.6A, the first and second voltage spikes have the same amplitude of 1.6 V for the positive and negative portions, and the first and second voltage spikes have the same duration of 0.2 ms for the positive and negative portions. In some embodiments, the duration of a biphasic voltage spike may correspond to a duration of a positive (or negative) portion of the biphasic voltage spike. The first and second voltage spikes occur at different times during the driving period, with a time delay Δt. For a positive time delay (Δt > 0), i.e., when the second voltage spike occurs after occurrence of the first voltage spike, the voltage V across the memristor may be calculated as V = Vb – Vt. Depending on the time delay Δt between the first and second voltage spikes, the voltage V may exhibit no transient or may exhibit transients having various shapes. [0087] FIG.6B shows a second schematic of potentiation and depression for a memristor, in accordance with some embodiments. Relative to the schematic in FIG.6A, the memristor 610 of FIG.6B has a Pt material for the top electrode 606 and a TiN material for the bottom electrode 08. The first voltage trace 602, Vb comprises a first sawtooth spike and is applied to the bottom electrode 608 of the memristor. The second voltage trace 604, Vt comprises a second sawtooth spike and is applied to the top electrode 608 of the memristor simultaneously with application of the first voltage trace Vb. [0088] FIG.6C shows examples of how the voltage V across the memristor may vary for different values of the time delay Δt, in accordance with some embodiments. Plot 600 shows the driving pulses for the top and bottom electrodes. Plot 602 shows the resulting voltage spikes induced from the time delay between the driving pulses. For Δt = 0, i.e., the top and bottom electrodes are driven by simultaneous voltage spikes having the same amplitude and the same duration, the voltage V may be 0 V. For Δt = 0.01 ms , i.e., in a case where the second voltage spike at the top electrode occurs 0.01 ms after the first voltage spike occurs at the bottom electrode, the voltage V may comprise a pulse that may be predominantly positive and that may have an amplitude of about 3.2 V or double each of the first and second voltage spikes. Note that a significant portion of the pulse is above Vth = 1.4 V, which is the threshold at which observable changes in conductance ΔG occur. For Δt = 0.03 ms, i.e., in a case where the second voltage spike at the top electrode occurs 0.03 ms after the first voltage spike occurs at the bottom electrode, the voltage V may comprise a pulse that may have a positive portion sandwiched by negative portions occurring before and after the positive portion. The positive portion has an amplitude above Vth = 1.4 V, albeit lower than the 3.2-V amplitude corresponding to Δt = 0.01 ms. For Δt = 0.10 ms, the voltage V may comprise a pulse (V-pulse) that may have a positive portion sandwiched by negative portions occurring before and after the positive portion, with the positive portion having an amplitude above Vth = 1.4 V but lower than the amplitude corresponding to Δt = 0.03 ms. For Δt = 0.20 ms, the voltage V may comprise a pulse that may have a positive portion sandwiched by negative portions occurring before and after the positive portion, with the positive portion having an amplitude slightly above Vth = 1.4 V, and with the negative portions having an amplitude slightly above Vth = 1.4 V. [0089] As evident from FIG.6C, as Δt increases, the width (duration) of the V-pulse across the memristor increases while the amplitude of the V-pulse decreases. For Δt = 0.01 ms, the width of the V-pulse may be too small (i.e., the duration may be too short) to cause an observable ΔG despite the large amplitude. For Δt = 0.03 ms, where the width of the V-pulse is sufficiently large yet the amplitude is still beyond Vth = 1.4 V, ΔG is appreciable. As Δt exceeds 0.03 ms, the decreased amplitude renders ΔG smaller. These changes result from the potentiation STDP behavior of the memristor. [0090] FIG.7A shows a first STDP curve, in accordance with some embodiments. The bottom portion of FIG.7A shows a graph of an STDP curve 700 in which ΔG varies as a function of Δt, as measured for the memristor driven by the first and second voltage traces Vb, Vt shown at the top portion of FIG.7A. The second voltage trace Vt comprises a second sawtooth spike at a time delay Δt relative to a first sawtooth spike of the first voltage trace Vb (“sawtooth-spike pair”). In the case of potentiation of the memristor, each ΔG was determined by, after the RESET process was performed, measuring Gi, then applying the first and second voltage traces Vb, Vt for a given Δt, then measuring Gf, with ΔG = Gf − Gi. In the first and second voltage traces Vb, Vt, 40 sawtooth-spike pairs were applied to the bottom and top electrodes of the memristor. In the case of depression of the memristor, each ΔG was determined by, after the SET process was performed, measuring Gi, then applying the first and second voltage traces Vb, Vt for a given Δt, then measuring Gf, with ΔG = Gf − Gi. As noted elsewhere herein, for potentiation, Δt > 0, i.e., the second voltage spike of the second voltage trace Vt occurred after the first voltage spike of the first voltage trace Vb, for each sawtooth-spike pair. For depression, Δt < 0, i.e., the second voltage spike of the second voltage trace Vt occurred before the first voltage spike of the first voltage trace Vb, for each sawtooth-spike pair. As can be seen in the graph at the bottom of FIG.7A, an STDP window occurs under potentiation conditions for Δt in a range of about 0 ms to about 0.2 ms. In the STDP window for Δt, appreciable values for ΔG were observed. On the other hand, under depression conditions, although observable values for ΔG are possible, the magnitude of such changes is not nearly as great as for potentiation conditions for Δt. A noticeable asymmetry occurs in the STDP curve when values for ΔG for Δt > 0 are compared to values for ΔG for Δt < 0. Although not wishing to be bound by theory, this asymmetry is believed to result from the relative ease of potentiation compared to depression. Also observed in the STDP curve is that at a Δt greater than approximately 0.2 ms (and less than approximately −0.2 ms) values for ΔG fall off markedly. [0091] FIG.7B shows a second STDP curve, in accordance with some embodiments. FIG. 7B is similar to FIG.7A except that triangular voltage spikes were used instead of sawtooth voltage spikes. As clearly seen by comparing the graph at the bottom of FIG.7B with the graph at the bottom of FIG.7A, the shape of the voltage spikes used for the first and second voltage traces Vb, Vt may affect the magnitude of conductance change in the memristor as well as the STDP window of Δt values for which the memristor exhibits ΔG values of appreciable amplitude (e.g., values having an absolute value greater than about 1 μS). Although the shape of a sawtooth voltage spike and the shape of a triangular voltage spike would appear to be rather similar, they result in drastically different STDP results. Sawtooth voltage spikes were found to produce a greater ΔG in the memristor than triangular voltage spikes. Sawtooth voltage spikes were also found to have a larger STDP window, ranging from greater than 0.01 ms to 0.2 ms, whereas triangular voltage spikes were found to have a smaller STDP window, ranging from about 0.05 ms to about 0.14 ms. [0092] The STDP curves of FIGs.7A and 7B were obtained with voltage spikes having an amplitude of 1.6 V and a width of 0.2 ms, as described above. Included in each of the graphs of FIGs.7A and 7B are portions 702 and 704 respectively. Portions 702 and 704 show a distribution of actual time delays ΔT observed for APs in signal traces measured for a pair of neurons. The APs correspond to 126 strongly connected pairs of neurons of a rat. The actual signal traces have relatively longer measurement periods and therefore the time scale was compressed by a factor of 100 for portions 702 and 704 of FIGs.7A and 7B, respectively. Note that portion 704 of FIG.7B does not overlap to a portion of the STDP curve having appreciable ΔG values, whereas the portion 702 of FIG.7A overlaps a portion of the STDP curve having ΔG values of at least 1 μS. This indicates that, for the case of triangular voltage spikes, it would be difficult if not impossible to compress the time scale of actual signal traces so that strongly correlated APs would have a Δt that falls within the STDP window. In contrast, for the case of sawtooth voltage spikes, the overlap would permit compression of the time scale such that strongly correlated APs would have a Δt that falls within the STDP window. [0093] FIG.8 schematically shows renderings of signal traces for two biological neurons of a rat, a presynaptic neuron and a postsynaptic neuron, in accordance with some embodiments. The presynaptic neuron and the postsynaptic neuron have four pairs of strongly correlated AP pairs that each have a time delay ΔT within a range intended to fall within the STDP window of the memristor. Note that the APs of a biological neuron may have a width of less than 10 ms, and the time interval between APs of the biological neuron may vary depending on the neuron’s firing status (e.g., bursting, adapting, etc.) and may, in some cases be on the order of hundreds of ms (e.g., 200 ms). Therefore, for evaluation of actual signal traces measured for biological neurons, the time scale of the actual signal traces may be compressed so that analysis of the actual signal traces using the memristor may be performed more quickly. As discussed above, a compression factor C, where C = 100, may be used. More specifically, for C = 100, the time delay ΔT from a presynaptic AP to a postsynaptic AP in a connected neuronal pair would tend to fall in a range of approximately 0 ms to 0.2 ms. [0094] FIG.9 shows a graph of ΔG as a function of the number of measurements made for Δt = 0 ms (900 dots), Δt = 0.05 ms (902; potentiation), and Δt = −0.05 ms (904 dots; depression). For each Δt, 100 measurements were made. Each ΔG was obtained by applying 40 pairs of Δt-spaced sawtooth voltage spikes. As will be appreciated, for each ΔG of Δt = 0 ms or 0.05 ms, the memristor underwent the RESET process. Similarly, for each ΔG of Δt = −0.05 ms, the memristor underwent the SET process. As clearly seen from the graph, measurements of ΔG resulted in consistent values for each Δt, indicating that the STDP is repeatable for the memristor. Finding Neuronal Connections via Memristor’s STDP [0095] FIGs.10 through 14 may be used to understand how the memristor’s STDP may be used to find neuronal connections in accordance with certain embodiments, i.e., connections between APs of two neurons. In the figures, N1, N2, N3, and N4 represent neurons of a network of neurons. In the upper portion of FIG.10, examples of signal traces measured for N1 and N2 are overlayed on each other. The signal trace for N1 shows voltage peaks occurring at various times during a measurement period. The signal trace for N2 shows voltage peaks 1000, 1002, 1004, 1006, 1008, 1010 occurring at various times during the same measurement period. Similarly, at the bottom portion of FIG.10, examples of signal traces measured for N3 and N4 are overlayed on each other. The signal trace for N3 shows voltage peaks occurring at various times during the same measurement period, and the signal trace for N4 shows voltage peaks 1012, 1014, 1016, 1018, 1020, 1022, 1024, 1026 occurring at various times during the same measurement period. Note that the signal trace for the neurons of the network all have the same measurement period. This allows different pairs of neurons to be analyzed to determine whether there is a neuronal connection and, if so, to determine a strength of the neuronal connection. [0096] In FIG.10, for the pair of neurons comprising N1 and N2, N1 is the presynaptic neuron and N2 is the postsynaptic neuron. The signal trace for N1 comprises nine (9) presynaptic APs. The signal trace for N2 comprises six (6) APs that are time-correlated with six of the APs measured for N1. A time-correlated AP pair may be an AP of N1 and an AP of N2 that occurs within a time difference Δt of each other. For example, as shown in FIG. 10, Δt maybe 0.2 ms. Note that some of the APs of N1 do not form time-correlated AP pairs with AP of N2, as shown in FIG.10. Although not illustrated in FIG.10, an AP of N2 need not form a time-correlated AP pair with an AP of N1. Similarly, in FIG.10, for the pair of neurons comprising N3 and N4, N3 is the presynaptic neuron and N4 is the postsynaptic neuron. The signal trace for N3 comprises sixteen (16) presynaptic APs. The signal trace for N4 comprises eight (8) APs that are time-correlated with eight of the APs measured for N3. The time-correlated AP pairs each comprise an AP of N3 and an AP of N4 that occurs within the same time difference of Δt = 0.2 ms as the time difference Δt for the time-correlated AP pairs of the signal traces for N1 and N2. The signal traces for N1, N2, N3, and N4 may comprise traces of intracellular recordings that have been compressed in time by a factor of 100 (i.e., C = 100). For the N1, N2 neuron pair, 6 out of 9 presynaptic APs elicit postsynaptic APs, resulting in 6 time-correlated AP pairs and a transmission rate of 2/3. For the N3, N4 neuron pair, 8 out of 16 presynaptic APs elicit postsynaptic APs, resulting in 8 time-correlated AP pairs and a transmission rate of 1/2. [0097] FIG.11A shows a process flow for evaluating a connection between a pair of neurons, according to some embodiments. In some embodiments, for each of the signal traces for the neurons N1, N2, N3, N4 of the network, a voltage trace is generated in which voltage burst occurs at the same timings as the APs of the signal trace corresponding to the voltage trace. The voltage traces each have a driving period or duration that is the same as the measurement period of the signal traces or that is compressed by a factor of C. The left portion of FIG.11A shows a voltage trace for N1 comprising voltage bursts timed at the same timings as the APs for the signal trace for N1, a voltage trace for N2 comprising voltage bursts timed at the same timings as the APs for the signal trace for N2, a voltage trace for N3 comprising voltage bursts timed at the same timings as the APs for the signal trace for N3, and a voltage trace for N4 comprising voltage bursts timed at the same timings as the APs for the signal trace for N4. As discussed above in connection with FIGs.6A, 6B, 6C and 7A, the voltage bursts may be sawtooth spikes having a negative-polarity portion and a positive- polarity portion. [0098] According to some embodiments of the present technology, the driving traces are used two at a time to drive the bottom and top electrodes of the memristor, as illustrated in the center portion of FIG.11A. For example: - for the neuron pair N1, N2, the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N2 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N1, N3, the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N3 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N1, N4, the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - optionally, for the neuron pair N1, N1, the voltage trace for N1 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the same voltage trace for N1 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N2, N1, the voltage trace for N2 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N1 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N2, N3, the voltage trace for N2 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N3 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N2, N4, the voltage trace for N2 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - optionally, for the neuron pair N2, N2, the voltage trace for N2 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the same voltage trace for N2 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N3, N1, the voltage trace for N3 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N1 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N3, N2, the voltage trace for N3 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N2 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N3, N4, the voltage trace for N3 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - optionally, for the neuron pair N3, N3, the voltage trace for N3 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the same voltage trace for N3 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N4, N1, the voltage trace for N4 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N1 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N4, N2, the voltage trace for N4 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N2 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - for the neuron pair N4, N3, the voltage trace for N4 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the voltage trace for N3 may be serve as the voltage trace Vt used to drive the top electrode of the memristor; - optionally, for the neuron pair N4, N4, the voltage trace for N4 may be serve as the voltage trace Vb used to drive the bottom electrode of the memristor while the same voltage trace for N4 may be serve as the voltage trace Vt used to drive the top electrode of the memristor. [0099] Driving of the memristor comprises RESET driving and SET driving, schematically depicted in the center portion of FIG.11A. According to some embodiments of the present technology, the bottom and top electrodes of the memristor may be driven simultaneously with the voltage trace Vb and the voltage trace Vt, respectively, to attempt to cause a change in conductance ΔG via STDP. As indicated above, for a network of four neurons, such driving may be performed sixteen (16) times to cover all combinations of neuron pairs of the network. In some embodiments, before the memristor is driven with the voltage traces Vb, Vt, for any of the combinations of neuron pairs to measure potentiation (“RESET driving”), the memristor may undergo the RESET process. Thus, the memristor may undergo the RESET process sixteen times for the sixteen combinations of neuron pairs. Similarly, before the memristor is driven with the voltage traces Vb, Vt, for any of the combinations of neuron pairs to measure depression (“SET driving”), the memristor may undergo the SET process. Thus, the memristor may undergo the SET process sixteen times for the sixteen combinations of neuron pairs. [0100] As shown in the top right portion of FIG.11A, in RESET driving of the N1, N2 neuron pair, a relatively smaller ΔG > 0 may be observed due to the total of 6 sawtooth-spike pairs occurring within the same STDP window of Δt = (positive) 0.2 ms. In comparison, in RESET driving of the N3, N4 neuron pair, a relatively larger ΔG > 0 may be observed due to the total of 8 sawtooth-spike pairs occurring within the same STDP window of Δt = (positive) 0.2 ms. In SET driving of the N2, N1 neuron pair and the N4, N3 pair, ΔG in both cases was found to be small. The bottom right portion of FIG.11A represents ΔG by the size of the circles. The results show that a relatively higher number of time-correlated AP pairs causes a relatively larger ΔG when the memristor is driven under potentiation conditions, whereas when the memristor is driven under depression conditions the number of time-correlated sawtooth-spike pairs does not influence ΔG significantly because any change in conductance is small. Therefore, RESET driving may be preferable, to cause a relatively larger ΔG to be observed. As noted above, the relatively larger ΔG observed for RESET driving may be due to the relative ease of memristor potentiation compared with memristor depression. In FIG. 11A, neuron pairs other than N1, N2; N2, N1; N3, N4; and N4, N3 are not shown as they were found to result in no appreciable ΔG for RESET driving or SET driving, likely due to the relatively few time-correlated sawtooth-spike pairs. [0101] For cases in which, for a pair of neurons comprising neuron A and neuron B, it is unknown whether neuron A is the presynaptic neuron and neuron B is the postsynaptic neuron, or whether neuron B is the presynaptic neuron and neuron A is the postsynaptic neuron, RESET driving and SET driving using the voltage traces generated for neuron A and neuron B may reveal which is the presynaptic neuron by a comparison of the ΔG for RESET driving and the ΔG for SET driving. For example, if ΔG is relatively small for RESET driving of the A, B neuron pair and ΔG is relatively large for SET driving of the A, B neuron pair, then it is likely that neuron B may be the presynaptic neuron and neuron A may be the postsynaptic neuron. [0102] FIG.11B shows the results from the process flow described in connection with FIG.11A. The memristor-driven finding of neural connections for four groups of 16 rat neurons, includes memristor ΔG > 0 maps (left column) and software-found Npair maps (middle column) show the neuronal connections for each of the four distinct groups of 16 intracellular recording data. Scatter plots of ΔG vs Npair for each group (right column) clearly shows that ΔG grows with Npair, which implies the memristor can physically imprint neuronal connections onto ΔG by counting the number of time-correlated AP pairs. The solid diagonal line represents the fitting curve and the dashed diagonal lines represent the 95% confidence interval. [0103] An experiment was performed using traces of intracellular recordings measured from twelve (12) rat neurons. Six (6) pairs of neurons were found to be strongly connected. FIG.12 shows a heatmap for ΔG under RESET driving of the memristor for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments. The traces of the intracellular recordings each had a measurement period of 15 minutes, which was determined to be too long a period to use for the driving period of voltage traces generated from the twelve traces of intracellular recordings. As such, each intracellular- recording trace was segmented into sections spanning 2.5 min. 144 ΔG values were obtained by accumulating partial conductance changes for the segments and performing the RESET process in between obtaining one partial conductance change and obtaining a next partial conductance change. Separately, software was used to count the number of time-correlated AP pairs (“Npair”) for each pair of the 144 combinations of pairs of the twelve intracellular- recording traces. As noted elsewhere herein, each time-correlated AP pair comprises an AP from one intracellular-recording trace of a pair and an AP from the other intracellular- recording trace of the pair, with the two APs occurring within the same positive STDP window (e.g., the STDP window ranging from 0 ms to 0.2 ms). For example, to count Npair for the combination of traces for N1 and N2, for each AP that occurred for N1 an AP that occurred for N2 within a time span of 0.2 ms from the occurrence of the AP for N1 is counted. If N1 synapses N2, the Npair would be relatively large. If N2 synapses N1, or if N1 and N2 are not connected, Npair would be relatively small, with any count likely arising by coincidence due an AP from a neuron different from N1 or N2. FIG.13 shows a heatmap for Npair for all 144 possible combinations of neuron pairs of the twelve neurons, in accordance with some embodiments. The heatmaps of FIG.13 and FIG.12 are consistent with each other, indicating that that a larger number of connections or time-correlated AP pairs (FIG. 13) results in a higher memristor-driven ΔG (FIG.12). Both heat maps reveal six (6) pairs of connected neurons at six noticeably lighter-colored rectangles in each of the heat maps. FIG. 14 shows a scatterplot graph of ΔG as a function of Npair, showing that a higher ΔG correlates to a higher Npair, in accordance with some embodiments. These results may support the viability of using a memristor to search for neuronal connections amongst a network of neurons. Functional Connectivity Mapping [0104] Although Npair for a pair of neurons, i.e., the number of time-correlated AP pairs for the pair of neurons, could be used as a rough gauge of connectivity between the pair of neurons, this quantity by itself would not accurately reflect an actual connection strength of the pair of neurons because it does not take into account the number of possible presynaptic APs available for time-correlated pairing (i.e.., the number of APs in the trace of the intracellular recording for the presynaptic neuron of the pair of neurons). For example, if Npair has a value of 100 and there are 1000 presynaptic APs, then only 10% of the presynaptic APs formed time-correlated AP pairs with postsynaptic APs of the intracellular recording for the presynaptic neuron of the pair of neurons. The inventors have recognized and appreciated that, in certain cases, a more accurate reflection of the connection strength between the pair of neurons would normalize Npair by taking into account the number of possible time- correlated AP pairs that could be formed. [0105] According to some embodiments of the present technology, a connection strength Z of a pair of neurons may be represented not by Npair, but by a ratio of Npair to the number of presynaptic APs, Npre, where Z = Npair/Npre. That is, Npair is normalized using Npre. Z reflects the transmission rate of the pair of neuron. FIG.15 shows a diagram for understanding the normalization concept, in accordance with some embodiments. The neurons N1, N2, N3, and N4 are those discussed in connection with FIGs.10 and 11. The Npair for the N1, N2 pair has a value of 6, corresponding to the 6 time-correlated AP pairs for the N1, N2 pair, while the Npair for the N3, N4 pair has a value of 8 corresponding to the number of time-correlated AP pairs for the N3, N4 pair. If only the raw numbers for Npair are considered, the N3, N4 pair would be deemed to have a stronger neuronal connection than the N1, N2 pair because 8 > 6. However, the N1, N2 pair has 9 possibilities for forming time-correlated AP pairs (Npre = 9), corresponding to 9 presynaptic APs for N1, whereas the N3, N4 pair has 16 possibilities for forming time-correlated AP pairs, corresponding to 16 presynaptic APs for N3 (Npre = 16). For the N1, N2 pair, 6 out of the 9 possibilities formed time-correlated AP pairs, corresponding to Z = 2/3 (or 0.67) for the N1, N2 pair. For the N3, N4 pair, 8 out of the 16 possibilities formed time-correlated AP pairs, corresponding to Z = 1/2 (or 0.50) for the N3, N4 pair. Thus, by normalizing Npair using Npre to obtain Z, the strength of the neuronal connection between the N1, N2 is revealed to be greater than the neuronal connection between N3, N4, because 0.67 > 0.50. [0106] According to some embodiments of the present technology, a Z-map may be generated for two neurons, NA and NB, using software. Initially, it may not be known whether NA or NB is the presynaptic neuron. Therefore, Npair may be determined in both directions, i.e., for the pair NA, NB and for the pair NB, NA, using techniques described herein. In some embodiments, the neuron with the larger Npair may be identified as the presynaptic neuron. From such an identification, Npre also may be determined using software. Z may be calculated when Npair and Npre are known. [0107] In the following discussion, in order to readily identify a normalized ΔG from ΔG before normalization, the notation ΔGpair may be used to indicate the pre-normalization ΔG. That is, the un-normalized ΔG obtained by STDP by driving the memristor with Vb and Vt may be referred to as ΔGpair in the following discussion. ΔGpair increases with an increasing Npair and therefore does not provide an accurate reflection of connection strength. According to some embodiments of the present technology, in order to normalize ΔGpair, a normalization factor may be determined by driving the memristor with normalization voltage traces comprising square voltage spikes. As noted above each “square” spike need not be strictly square shaped with but may be rectangular in shape. [0108] FIG.16 shows a process flow for determining the normalization factor for a pair of neurons, according to some embodiments. In some embodiments, for each of the signal traces for the neurons N1, N2, N3, N4 of the network discussed above in connection with FIGs.10 and 11, a normalization voltage trace is generated in which voltage spikes occurs at the same timings as the APs of the signal trace corresponding to the normalization voltage trace. The normalization voltage traces each have a driving period or duration that is the same as the measurement period of the signal traces. The left portion of FIG.16 shows a positive normalization voltage trace Vb and a negative normalization voltage trace Vt, for N1. The positive normalization voltage trace Vb comprises positive-polarity square voltage spikes timed at the same timings as the APs for the signal trace for N1, and the negative normalization voltage trace Vt comprises negative-polarity square voltage spikes timed at the same timings as the APs for the signal trace for N1. Similar normalization voltage traces may be generated for N2, N3, and N4. In some embodiments, to obtain the normalization factor the pair N1, N2, the memristor may be driven by applying the positive normalization voltage trace Vb to the bottom electrode and simultaneously applying the negative normalization voltage trace Vt to the top electrode. That is the bottom and top electrodes are driven with normalization voltage traces having square spikes of opposite polarity at simultaneous timings (Δt = 0). Such driving may result in an appreciable change in conductance between an initial conductance before the driving and a final conductance after the driving, which may be a normalization conductance change ΔGnorm. (If the square spikes are misaligned in either direction, i.e., with either a positive Δt or with a negative Δt, the value for ΔGnorm decreases. Thus ΔGnorm is obtained by “even” STDP (eSTDP).) Note that ΔGnorm increases with Npre of N1, i.e., ΔGnorm increases with an increase in the number of APs in the trace of the intracellular recording for N1. Thus, a connection strength ω between N1 and N2 may be given by a ratio of ΔGpair to ΔGnorm, where ω = ΔGpair/ΔGnorm. Stated differently, the strength of the neuronal connection between N1 and N2 is a normalized ΔGpair for N1, N2. This concept is illustrated in FIG.17, which shows a process flow for normalizing the conductance change for pair of neurons, in accordance with some embodiments. [0109] FIGs.18A and 18B show a software-computed Z connectivity map and a memristor-driven ω connectivity map, respectively, for all 256 possible combinations of pairs of traces for sixteen (16) traces of intracellular recordings of neurons (e.g., signal traces for 16 different neurons). FIGs.18C and 18D show filtered versions of the Z map and ω map, respectively, after filtering to show only data for pairs of traces that have time-correlated AP pairs (e.g., for pairs of connected neurons). For example, to obtain the filtered Z map of FIG. 18C from the raw Z map of FIG.18A, only the pairs of neurons for which Z > 0.3 may be determined to be connected. As will be appreciated, a cutoff value other than 0.3 may be used. In another example, to obtain the filtered ω map of FIG.18B from the raw ω map of FIG.18D, only the pairs of neurons with ω > μ + 1.6σ may be determined to be connected, where μ and σ are the mean and the standard deviation of all 16 × 16 = 256 ω values. As seen by comparing FIG 18C with FIG.18D, the software-computed Z connectivity map and the memristor-driven ω connectivity map are fairly consistent with each other. The memristor- driven ω connectivity map of Fig.18D identifies all 9 true connections found by the software, assuming the software-computed results shown in FIG.18C are true, and also identifies (with software results assumed as true), while also identifying 2 false connections. The filtered ω map may be used as a functional neuronal connectivity map that specifies not only topological connections but also physical connection strengths. [0110] FIG.19A shows neural wiring diagram for the memristor-driven ω connectivity map of FIG.18D. FIG.19B shows a scatter plot of ω vs Z obtained from the results in FIGs. 18A and 18C. [0111] FIG.19C shows the number of software identified, e.g., filtered z-map based, connections plotted next to the number of memristor found, e.g., filtered ω-map based connections for each of four distinct groups of intracellular recording data, with each group, including 16 intracellular recording traces from 16 rat neurons. The mapping accuracy for each of the four groups is plotted using the dashed line with the accuracy shown on the right axis. The true software found number of connections are plotted against the numbers of correctly and incorrectly found by the memristor. To quantify consistency between the software and the memristor results, the sensitivity and accuracy are statistically calculated. The sensitivity is the ratio of the number of connections correctly found by the memristor (true positives) to the true (software-found) number of connections. The accuracy is the ratio of the total number of either connections or disconnections correctly found by the memristor (true positives or true negatives) to the total number of ω data. FIGs.18A-19B. [0112] FIG.19D shows mapping sensitivity and accuracy for all 4 groups combined together. The plot includes a total of 16 x16 x4 = 1,024 trace pairs, as a function of the threshold µ+xσ, where µ is the mean and σ is the standard deviation of the 1,024 trace pairs. [0113] FIG.20 shows neuronal connection and connection strength mapping for the four groups of 16 rat neurons. Software-computer Z maps, filtered Z maps (threshold: Z > 0.3) (left column), memristor-driven ω maps, and filtered ω maps (threshold: ω > µ+1.6σ) (middle column) show the neuronal connections and their physical connection strengths for each of four distinct groups of the 16 intracellular recording data sets from 16 rat neurons. Each map is obtained for all 256 trace pair combinations of 16 intracellular recording traces of each group. Scatter plot of ω vs Z for each group (right column) shows a strong correlation between ω and Z. The solid diagonal line represents the fitting curve and the dashed diagonal curves shown a 95% confidence internal. The horizontal and vertical lines represent the threshold value for ω map and Z map, respectively. [0114] The recording trace of presynaptic neuron may be converted into square spikes to drive the bottom electrode of the memristor with the positive square spike and its negative used to drive the top electrode. The resulting conductance change ΔGnorm decreases in this “even” STDP (eSTDP) configuration. FIG.21 includes plot 2100 that shows positive square spikes for driving the bottom electrode (Vb) and its negative version for driving the top electrode of the memristor (Vt) with a time difference, Δt=tb-tb, for memristor eSTDP, in accordance with some embodiments. Each spike has an amplitude of 0.8 V and a width of 0.2 ms. As shown in plot 2102, the voltage across the memristor, V = Vb-Vt, with |Δt| falling within |Δt| < 0.2 ms takes a pulse form exceeding Vth=1.4 V on the positive side which will induce potentiation. At Δt=0, the pulse width of V-pulse exceeding Vth has its maximum value of 0.2 ms, and as |Δt| grows, the width of the V-pulse exceeding Vth decreases. If |Δt| > 0.2ms, there is no overlap between square spikes. Plot 2104 shows memristor eSTDP induced by 40 pairs of Δt-spaced square spikes from RESET. Plot 2106 shows the repeatability of eSTDP. For each Δt = 0.1 ms, 0 ms, and -0.1ms – one hundred measured ΔG values are consistent. Each ΔG from RESET is caused by applying 40 pairs of Δt-spaced square spikes. [0115] FIG.22 shows a memristor driven with the intracellular recording dataset via eSTDP, in accordance with some embodiments. Plot 2200 shows a ΔG>0 map for a memristor obtained via eSTDP and software-found Npair_eSTDP (|Δt| < 0.2 ms) map for all 144 possible trace pair from 12 intracellular recording trace of 12 rat neurons. Plot 2202 is a scatter plot of ΔG vs Npair_eSTDP. The diagonal solid line represents the fitting curve and the dashed diagonal lines represent the 95% confidence interval. [0116] FIG.23 shows a memristor ΔG > 0 map obtained via eSTDP and software-found Npair_STDP map for 4 groups of 15 rat neurons. The memristor ΔG > 0 maps (left column) and the software-found Npair_eSTDP maps (middle column) show the conductance increase from RESET and the number of AP pairs falling into |Δt| < 0.2 ms, respectively, for each of four distinct groups of 16 intracellular recording data from 16 rat neurons. Scatter plot of ΔGnorm as the normalization factor. The solid diagonal line represents the fitting curve and the dashed diagonal lines represent the 95% confidence interval. [0117] Although the foregoing discussion involves the use of a single memristor, it should be understood that a plurality of memristors may be used in parallel to speed up evaluations of a large network of neurons. For example, an N × N crossbar array of memristors may be used to expedite copying of biological neuronal connectivity from N traces of intracellular recordings. [0118] Although the memristor is described herein in connection with searching for and processing data relating to time-correlated AP pairs, the present technology is not limited to use with APs in signal traces for a presynaptic neuron and a postsynaptic neuron. The present technology also may be suitable for evaluating neurons based on postsynaptic potentials (PSPs) of a pair of neurons. [0119] Although to the present technology is described herein for use with signal traces obtained from neurons, the present technology is not limited to neuronal signals, but may be used for evaluating other types of biological signals or non-biological signals for which there is a time-related dependence. [0120] The memristor of the present technology is not limited to the bilayer memristor described herein but may be a monolayer memristor or may be a memristor formed of materials other than those described herein. [0121] Having thus described several aspects and embodiments of the present technology, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the disclosure. Further, though advantages of the present disclosure are indicated, it should be appreciated that not every embodiment of the technology described herein will include every described advantage. Some embodiments may not implement any feature(s) described as advantageous herein and in some instances one or more of the described features may be implemented to achieve further embodiments. Accordingly, the foregoing description and drawings are by way of example only. [0122] Various aspects of the present disclosure may be used alone, in combination, or in a variety of arrangements not specifically discussed in the embodiments described in the foregoing and is therefore not limited in its application to the details and arrangement of components set forth in the foregoing description or illustrated in the drawings. For example, aspects described in connection with one embodiment may be combined in any manner with aspects described in connection with one or more other embodiments. [0123] Also, the present disclosure may be embodied as one or more method(s) in which various embodiments of the structures described above may be used. The acts performed as part of the one or more method(s) may be ordered in any suitable way. [0124] Use of ordinal terms such as “first,” “second,” “third,” etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements. [0125] The terms “approximately” and “about” may be used to mean within ±20% of a target value in some embodiments, within ±10% of a target value in some embodiments, within ±5% of a target value in some embodiments, and yet within ±2% of a target value in some embodiments. The terms “approximately” and “about” may include the target value. [0126] Various aspects are described in this disclosure, which include, but are not limited to, the following sentences: [0127] 1. A method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (Gf) of the memristor based on one or more pairs of time-correlated voltage bursts; (f) determining a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi); (g) determining a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi); and (h) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2. [0128] 2. The method of sentence 1, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace. [0129] 3. The method of sentence 2, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes. [0130] 4. The method of sentence 1 or any preceding sentence, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero. [0131] 5. The method of sentence 4, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0132] 6. The method of sentence 4, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0133] 7. The method of sentence 1 or any preceding sentence, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero. [0134] 8. The method of sentence 7, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0135] 9. The method of sentence 8, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0136] 10. The method of sentence 1 or any preceding sentence, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values. [0137] 11. The method of sentence 1, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000. [0138] 12. The method of sentence 1 or any preceding sentence, wherein the pairs of time- correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst. [0139] 13. The method of sentence 1 or any preceding sentence, wherein: the applying of the first voltage trace (Vb1) in (c) and the applying of the second voltage trace (Vt1) in (d) occur simultaneously. [0140] 14. The method of sentence 1 or any preceding sentence, wherein the measuring of the final conductance (Gf) in (e) occurs after the applying of the first voltage trace (Vb1) in (c) and after the applying of the second voltage trace (Vt1) in (c). [0141] 15. The method of sentence 1 or any preceding sentence, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons. [0142] 16. The method of sentence 15, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals. [0143] 17. The method of sentence 1 or any preceding sentence, further comprising: determining the normalization conductance (GN) by: generating a positive normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprising a plurality of rectangular positive-voltage bursts over the period of time, generating a negative normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the negative normalization trace comprising a plurality of rectangular negative-voltage bursts over the period of time, and simultaneously applying the positive normalization trace to the first electrode of the memristor and applying the negative normalization trace to the second electrode of the memristor, and measuring a conductance of the memristor after the applying of the positive and negative normalization traces, wherein the normalization conductance (GN) corresponds to the conductance of the memristor after the applying of the positive and negative normalization traces. [0144] 18. The method of sentence 17, wherein: for the positive normalization voltage trace, starting points of the rectangular positive-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0145] 19. The method of sentence 1 or any preceding sentence, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst. [0146] 20. The method of sentence 19, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms. [0147] 21. The method of sentence 20, wherein the time difference (Δt) is approximately 0.2 ms. [0148] 22. The method of sentence 1 or any preceding sentence, further comprising: measuring the initial conductance (Gi). [0149] 23. The method of sentence 22, wherein the measuring of the initial conductance (Gi) comprises, prior to the applying of the first voltage trace (Vb1) in (c), applying a positive- polarity rectangular voltage pulse to the memristor and simultaneously reading a conductance of the memristor, the conductance of the memristor corresponding to the initial conductance (Gi). [0150] 24. The method of sentence 23, wherein: the applying of the positive-polarity rectangular voltage pulse to the memristor comprises applying the positive-polarity rectangular voltage pulse to the first electrode of the memristor, and the reading of the conductance of the memristor comprises reading a current of the memristor and determining the conductance of the memristor from the current. [0151] 25. A method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (c), determining a first final conductance (Gf1) of the memristor; (e) applying the first voltage trace (Vb1) to the second electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to the first electrode of the memristor; (f) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (e), determining a second final conductance (Gf2) of the memristor; (g) determining a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determining a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi); (h) determining a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (i) determining a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time- correlated voltage-burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2. [0152] 26. The method of sentence 25, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace. [0153] 27. The method of sentence 25, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron. [0154] 28. A method of evaluating communication pathway connections for a plurality of nodes, the method comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2). [0155] 29. An apparatus for evaluating a communication pathway connection, the apparatus comprising: a memristor comprising a first electrode and a second electrode; a controller comprising at least one computer processor and memory operable connected to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (Vb1) to be applied to a first electrode of a memristor, the first voltage trace (Vb1) being based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component, (b) cause a second voltage trace (Vt1) to be applied to a second electrode of the memristor, the second voltage trace (Vt1) being based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component, (c) determine a final conductance (Gf) of the memristor based on one or more pairs of time-correlated voltage bursts, (d) determine a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi), (e) determine a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi), and (f) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2. [0156] 30. The apparatus of sentence 29 or any preceding sentence, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace. [0157] 31. The apparatus of sentence 30, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes. [0158] 32. The apparatus of sentence 29 or any preceding sentence, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero. [0159] 33. The apparatus of sentence 32, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0160] 34. The apparatus of sentence 32, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0161] 35. The apparatus of sentence 29 or any preceding sentence, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero. [0162] 36. The apparatus of sentence 35, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0163] 37. The apparatus of sentence 35, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0164] 38. The apparatus of sentence 29 or any preceding sentence, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values. [0165] 39. The apparatus of sentence 29, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000. [0166] 40. The apparatus of sentence 29 or any preceding sentence, wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst. [0167] 41. The apparatus of sentence 29 or any preceding sentence, wherein the controller is configured to cause the first voltage trace (Vb1) in (a) and the second voltage trace (Vt1) in (b) to be applied simultaneously. [0168] 42. The apparatus of sentence 29 or any preceding sentence, wherein the final conductance (Gf) is determined in (c) after the first voltage trace (Vb1) is applied in (a) and after the second voltage trace (Vt1) is applied in (b). [0169] 43. The apparatus of sentence 29 or any preceding sentence, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons. [0170] 44. The apparatus of sentence 43, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals. [0171] 45. The apparatus of sentence 29 or any preceding sentence, wherein the controller is further configured to determine the normalization conductance (GN) by: simultaneously causing a positive normalization trace to be applied to the first electrode of the memristor and causing a negative normalization trace to be applied to the second electrode of the memristor, wherein: the positive normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprises a plurality of rectangular positive-voltage bursts over the period of time, the negative normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, and the negative normalization trace comprises a plurality of rectangular negative-voltage bursts over the period of time, and determining a conductance of the memristor after the positive and negative normalization traces are applied, the normalization conductance (GN) corresponding to the conductance of the memristor after the positive and negative normalization traces are applied. [0172] 46. The apparatus of sentence 45, wherein: for the positive normalization voltage trace, starting points of the rectangular positive-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0173] 47. The apparatus of sentence 29 or any preceding sentence, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst. [0174] 48. The apparatus of sentence 47, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms. [0175] 49. The apparatus of sentence 48, wherein the time difference (Δt) is approximately 0.2 ms. [0176] 50. An apparatus for evaluating a communication pathway connection, the apparatus comprising: a memristor comprising a first electrode and a second electrode; and a controller comprising at least one computer processor and memory operably coupled to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (Vb1) to be applied to the first electrode of the memristor, and simultaneously cause a second voltage trace (Vt1) to be applied to the second electrode of the memristor, wherein: the first voltage trace (Vb1) is based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprises a plurality of first voltage bursts over a period of time, and the first voltage bursts each comprise a positive component and a negative component, the second voltage trace (Vt1) is based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprises a plurality of second voltage bursts over the period of time, and the second voltage bursts each comprise a positive component and a negative component; (b) after the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied in (a), determine a first final conductance (Gf1) of the memristor; (c) cause the first voltage trace (Vb1) to be applied to the second electrode of a memristor, and simultaneously cause the second voltage trace (Vt1) to be applied to the first electrode of the memristor, (d) after the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied (c), determine a second final conductance (Gf2) of the memristor, (e) determine a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determine a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi), (f) determine a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (g) determine a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage- burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2. [0177] 51. The apparatus of sentence 50, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace. [0178] 52. The apparatus of sentence 50, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron. [0179] 53. An apparatus for evaluating communication pathway connections for a plurality of nodes, the apparatus comprising: at least one computer processor configured to, for each pair of a plurality of pairs of the nodes: (a) identify first voltage peaks in a first signal trace corresponding to a first node of the pair, determine occurrence times for the first voltage peaks, and determine a total number of the first voltage peaks (Npre1); (b) identify second voltage peaks in a second signal trace corresponding to a second node of the pair, determine occurrence times for the second voltage peaks, and determine a total number of the second voltage peaks (Npre2); (c) determine a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determine a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2). [0180] 54. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating a communication pathway connection, wherein the method comprises: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (Gf) of the memristor based on one or more pairs of time- correlated voltage bursts; (f) determining a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi); (g) determining a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi); and (h) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2. [0181] 55. The storage medium of sentence 54 or any preceding sentence, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace. [0182] 56. The storage medium of sentence 55, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes. [0183] 57. The storage medium of sentence 54 or any preceding sentence, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero. [0184] 58. The storage medium of sentence 57, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0185] 59. The storage medium of sentence 57, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0186] 59. The storage medium of sentence 54 or any preceding sentence, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero. [0187] 61. The storage medium of sentence 60, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0188] 62. The storage medium of sentence 60, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node. [0189] 63. The storage medium of sentence 54 or any preceding sentence, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values. [0190] 64. The storage medium of sentence 54 or any preceding sentence, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000. [0191] 65. The storage medium of sentence 54 or any preceding sentence, wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst. [0192] 66. The storage medium of sentence 54 or any preceding sentence, wherein: the applying of the first voltage trace (Vb1) in (c) and the applying of the second voltage trace (Vt1) in (d) occur simultaneously. [0193] 67. The storage medium of sentence 54 or any preceding sentence, wherein the measuring of the final conductance (Gf) in (e) occurs after the applying of the first voltage trace (Vb1) in (c) and after the applying of the second voltage trace (Vt1) in (c). [0194] 68. The storage medium of sentence 54 or any preceding sentence, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons. [0195] 69. The storage medium of sentence 68, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals. [0196] 70. The storage medium of sentence 54 or any preceding sentence, further comprising: determining the normalization conductance (GN) by: generating a positive normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprising a plurality of rectangular positive-voltage bursts over the period of time, generating a negative normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the negative normalization trace comprising a plurality of rectangular negative-voltage bursts over the period of time, and simultaneously applying the positive normalization trace to the first electrode of the memristor and applying the negative normalization trace to the second electrode of the memristor, and measuring a conductance of the memristor after the applying of the positive and negative normalization traces, wherein the normalization conductance (GN) corresponds to the conductance of the memristor after the applying of the positive and negative normalization traces. [0197] 71. The storage medium of sentence 70, wherein: for the positive normalization voltage trace, starting points of the rectangular positive-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node. [0198] 72. The storage medium of sentence 54 or any preceding sentence, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst. [0199] 73. The storage medium of sentence 72, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time- correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms. [0200] 74. The storage medium of sentence 73, wherein the time difference (Δt) is approximately 0.2 ms. [0201] 75. The storage medium of sentence 54, wherein the method further comprises: measuring the initial conductance (Gi). [0202] 76. The storage medium of sentence 75, wherein the measuring of the initial conductance (Gi) comprises, prior to the applying of the first voltage trace (Vb1) in (c), applying a positive-polarity rectangular voltage pulse to the memristor and simultaneously reading a conductance of the memristor, the conductance of the memristor corresponding to the initial conductance (Gi). [0203] 77. The storage medium of sentence 76, wherein: the applying of the positive- polarity rectangular voltage pulse to the memristor comprises applying the positive-polarity rectangular voltage pulse to the first electrode of the memristor, and the reading of the conductance of the memristor comprises reading a current of the memristor and determining the conductance of the memristor from the current. [0204] 78. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (c), determining a first final conductance (Gf1) of the memristor; (e) applying the first voltage trace (Vb1) to the second electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to the first electrode of the memristor; (f) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (e), determining a second final conductance (Gf2) of the memristor; (g) determining a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determining a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi); (h) determining a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (i) determining a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2. [0205] 79. The storage medium of sentence 78 or any preceding sentence, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace. [0206] 80. The storage medium of sentence 78 or any preceding sentence, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron. [0207] 81. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating communication pathway connections for a plurality of nodes, the method comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time- correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2).

Claims

CLAIMS What is claimed is: 1. A method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (Gf) of the memristor based on one or more pairs of time-correlated voltage bursts; (f) determining a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi); (g) determining a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi); and (h) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2.
2. The method of claim 1, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace.
3. The method of claim 2, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes.
4. The method of claim 1, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero.
5. The method of claim 4, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
6. The method of claim 4, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
7. The method of claim 1, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero.
8. The method of claim 7, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
9. The method of claim 8, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
10. The method of claim 1, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values.
11. The method of claim 1, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000.
12. The method of claim 1, wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst.
13. The method of claim 1, wherein: the applying of the first voltage trace (Vb1) in (c) and the applying of the second voltage trace (Vt1) in (d) occur simultaneously.
14. The method of claim 1, wherein the measuring of the final conductance (Gf) in (e) occurs after the applying of the first voltage trace (Vb1) in (c) and after the applying of the second voltage trace (Vt1) in (c).
15. The method of claim 1, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
16. The method of claim 15, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals.
17. The method of claim 1, further comprising: determining the normalization conductance (GN) by: generating a positive normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprising a plurality of rectangular positive-voltage bursts over the period of time, generating a negative normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the negative normalization trace comprising a plurality of rectangular negative-voltage bursts over the period of time, and simultaneously applying the positive normalization trace to the first electrode of the memristor and applying the negative normalization trace to the second electrode of the memristor, and measuring a conductance of the memristor after the applying of the positive and negative normalization traces, wherein the normalization conductance (GN) corresponds to the conductance of the memristor after the applying of the positive and negative normalization traces.
18. The method of claim 17, wherein: for the positive normalization voltage trace, starting points of the rectangular positive- voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
19. The method of claim 1, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst.
20. The method of claim 19, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time-correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
21. The method of claim 20, wherein the time difference (Δt) is approximately 0.2 ms.
22. The method of claim 1, further comprising: measuring the initial conductance (Gi).
23. The method of claim 22, wherein the measuring of the initial conductance (Gi) comprises, prior to the applying of the first voltage trace (Vb1) in (c), applying a positive- polarity rectangular voltage pulse to the memristor and simultaneously reading a conductance of the memristor, the conductance of the memristor corresponding to the initial conductance (Gi).
24. The method of claim 23, wherein: the applying of the positive-polarity rectangular voltage pulse to the memristor comprises applying the positive-polarity rectangular voltage pulse to the first electrode of the memristor, and the reading of the conductance of the memristor comprises reading a current of the memristor and determining the conductance of the memristor from the current.
25. A method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (c), determining a first final conductance (Gf1) of the memristor; (e) applying the first voltage trace (Vb1) to the second electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to the first electrode of the memristor; (f) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (e), determining a second final conductance (Gf2) of the memristor; (g) determining a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determining a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi); (h) determining a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (i) determining a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage- burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2.
26. The method of claim 25, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace.
27. The method of claim 25, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron.
28. A method of evaluating communication pathway connections for a plurality of nodes, the method comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2).
29. An apparatus for evaluating a communication pathway connection, the apparatus comprising: a memristor comprising a first electrode and a second electrode; a controller comprising at least one computer processor and memory operable connected to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (Vb1) to be applied to a first electrode of a memristor, the first voltage trace (Vb1) being based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component, (b) cause a second voltage trace (Vt1) to be applied to a second electrode of the memristor, the second voltage trace (Vt1) being based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component, (c) determine a final conductance (Gf) of the memristor based on one or more pairs of time-correlated voltage bursts, (d) determine a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi), (e) determine a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi), and (f) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2.
30. The apparatus of claim 29, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace.
31. The apparatus of claim 30, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes.
32. The apparatus of claim 29, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero.
33. The apparatus of claim 32, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
34. The apparatus of claim 32, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
35. The apparatus of claim 29, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero.
36. The apparatus of claim 35, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
37. The apparatus of claim 35, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
38. The apparatus of claim 29, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values.
39. The apparatus of claim 29, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000.
40. The apparatus of claim 29, wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst.
41. The apparatus of claim 29, wherein the controller is configured to cause the first voltage trace (Vb1) in (a) and the second voltage trace (Vt1) in (b) to be applied simultaneously.
42. The apparatus of claim 29, wherein the final conductance (Gf) is determined in (c) after the first voltage trace (Vb1) is applied in (a) and after the second voltage trace (Vt1) is applied in (b).
43. The apparatus of claim 29, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
44. The apparatus of claim 43, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals.
45. The apparatus of claim 29, wherein the controller is further configured to determine the normalization conductance (GN) by: simultaneously causing a positive normalization trace to be applied to the first electrode of the memristor and causing a negative normalization trace to be applied to the second electrode of the memristor, wherein: the positive normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprises a plurality of rectangular positive- voltage bursts over the period of time, the negative normalization voltage trace is based on the voltage peaks of the first node of the pair of nodes, and the negative normalization trace comprises a plurality of rectangular negative- voltage bursts over the period of time, and determining a conductance of the memristor after the positive and negative normalization traces are applied, the normalization conductance (GN) corresponding to the conductance of the memristor after the positive and negative normalization traces are applied.
46. The apparatus of claim 45, wherein: for the positive normalization voltage trace, starting points of the rectangular positive- voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
47. The apparatus of claim 29, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst.
48. The apparatus of claim 47, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time-correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
49. The apparatus of claim 48, wherein the time difference (Δt) is approximately 0.2 ms.
50. An apparatus for evaluating a communication pathway connection, the apparatus comprising: a memristor comprising a first electrode and a second electrode; and a controller comprising at least one computer processor and memory operably coupled to the at least one computer processor, the controller being configured to: (a) cause a first voltage trace (Vb1) to be applied to the first electrode of the memristor, and simultaneously cause a second voltage trace (Vt1) to be applied to the second electrode of the memristor, wherein: the first voltage trace (Vb1) is based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprises a plurality of first voltage bursts over a period of time, and the first voltage bursts each comprise a positive component and a negative component, the second voltage trace (Vt1) is based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprises a plurality of second voltage bursts over the period of time, and the second voltage bursts each comprise a positive component and a negative component; (b) after the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied in (a), determine a first final conductance (Gf1) of the memristor; (c) cause the first voltage trace (Vb1) to be applied to the second electrode of a memristor, and simultaneously cause the second voltage trace (Vt1) to be applied to the first electrode of the memristor, (d) after the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied (c), determine a second final conductance (Gf2) of the memristor, (e) determine a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determine a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi), (f) determine a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (g) determine a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage- burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2.
51. The apparatus of claim 50, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace.
52. The apparatus of claim 50, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron.
53. An apparatus for evaluating communication pathway connections for a plurality of nodes, the apparatus comprising: at least one computer processor configured to, for each pair of a plurality of pairs of the nodes: (a) identify first voltage peaks in a first signal trace corresponding to a first node of the pair, determine occurrence times for the first voltage peaks, and determine a total number of the first voltage peaks (Npre1); (b) identify second voltage peaks in a second signal trace corresponding to a second node of the pair, determine occurrence times for the second voltage peaks, and determine a total number of the second voltage peaks (Npre2); (c) determine a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determine a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2).
54. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating a communication pathway connection, wherein the method comprises: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor; (d) applying the second voltage trace (Vt1) to a second electrode of the memristor; (e) measuring a final conductance (Gf) of the memristor based on one or more pairs of time-correlated voltage bursts; (f) determining a first conductance change (ΔG1) corresponding to a difference between the final conductance (Gf) and an initial conductance (Gi); (g) determining a second conductance change (ΔG2) corresponding to a difference between a normalization conductance (GN) and the initial conductance (Gi); and (h) determining a strength ω of a communication pathway between the pair of nodes based on a ratio of the first conductance change (ΔG1) to the second conductance change (ΔG2), according to ω = ΔG1/ΔG2.
55. The storage medium of claim 54, wherein: the first voltage bursts comprise first voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second voltage spikes, and the second voltage trace comprises a second spike trace.
56. The storage medium of claim 55, wherein: the first voltage spikes comprise first sawtooth spikes, and the second first voltage spikes comprise second sawtooth spikes.
57. The storage medium of claim 54, wherein, for each first voltage burst, a sum of the positive component and the negative component is zero.
58. The storage medium of claim 57, wherein, for the first voltage trace (Vb1), starting points of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
59. The storage medium of claim 57, wherein, for the first voltage trace (Vb1), midpoints of the first voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
60. The storage medium of claim 54, wherein, for each second voltage burst, a sum of the positive component and the negative component is zero.
61. The storage medium of claim 60, wherein, for the second voltage trace (Vt1), starting points of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
62. The storage medium of claim 60, wherein, for the second voltage trace (Vt1), midpoints of the second voltage bursts have timings based on timings of peak maxima of the voltage peaks of the second node.
63. The storage medium of claim 54, wherein the initial conductance (Gi), the final conductance (Gf), and the normalization conductance (GN) have analog values.
64. The storage medium of claim 54, wherein: the first voltage trace (Vb1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by a factor of τ, and the second voltage trace (Vt1) corresponds to a time-compressed representation of the voltage peaks of the first node, the time-compressed representation compressing a time scale of the voltage peaks of the first node by the factor of τ, and τ has a value in a range of: 2 to 1000, or 2 to 200, or 5 to 100, or 10 to 500, or 100 to 1000, or 200 to 750, or 400 to 800, or 500 to 1000.
65. The storage medium of claim 54, wherein the pairs of time-correlated voltage bursts each comprise a first voltage burst and a second voltage burst occurring at or within a predetermined time delay of the first voltage burst.
66. The storage medium of claim 54, wherein: the applying of the first voltage trace (Vb1) in (c) and the applying of the second voltage trace (Vt1) in (d) occur simultaneously.
67. The storage medium of claim 54, wherein the measuring of the final conductance (Gf) in (e) occurs after the applying of the first voltage trace (Vb1) in (c) and after the applying of the second voltage trace (Vt1) in (c).
68. The storage medium of claim 54, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the voltage peaks of the first node comprise action potentials of the first neuron of the pair of neurons, and the voltage peaks of the second node comprise action potentials of the second neuron of the pair of neurons.
69. The storage medium of claim 68, wherein the action potentials of the first neuron and the action potentials of the second neuron are natural neuron signals.
70. The storage medium of claim 54, further comprising: determining the normalization conductance (GN) by: generating a positive normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the positive normalization trace comprising a plurality of rectangular positive-voltage bursts over the period of time, generating a negative normalization voltage trace based on the voltage peaks of the first node of the pair of nodes, the negative normalization trace comprising a plurality of rectangular negative-voltage bursts over the period of time, and simultaneously applying the positive normalization trace to the first electrode of the memristor and applying the negative normalization trace to the second electrode of the memristor, and measuring a conductance of the memristor after the applying of the positive and negative normalization traces, wherein the normalization conductance (GN) corresponds to the conductance of the memristor after the applying of the positive and negative normalization traces.
71. The storage medium of claim 70, wherein: for the positive normalization voltage trace, starting points of the rectangular positive- voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node, and for the negative normalization voltage trace, starting points of the rectangular negative-voltage bursts have timings based on timings of peak maxima of the voltage peaks of the first node.
72. The storage medium of claim 54, wherein the one or more pairs of time-correlated voltage bursts each have a time difference (Δt) within a predetermined range, the time difference (Δt) corresponding to a time delay between a first voltage burst and a second voltage burst occurring after the first voltage burst.
73. The storage medium of claim 72, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, the one or more pairs of time-correlated voltage bursts correspond to one or more pairs of voltage peaks of the first and second neurons, the one or more pairs of voltage peaks comprises a second voltage peak occurring within a time delay in a range of 18 milliseconds (ms) to 22 ms after a first voltage peak, and in (c) and (d), the first voltage trace (Vb1) and the second voltage trace (Vt1) are applied at a time-scale compression of 100 such that the time difference (Δt) of each of the one or more pairs of time-correlated voltage bursts is in a range of 0.18 ms to 0.22 ms.
74. The storage medium of claim 73, wherein the time difference (Δt) is approximately 0.2 ms.
75. The storage medium of claim 54, wherein the method further comprises: measuring the initial conductance (Gi).
76. The storage medium of claim 75, wherein the measuring of the initial conductance (Gi) comprises, prior to the applying of the first voltage trace (Vb1) in (c), applying a positive- polarity rectangular voltage pulse to the memristor and simultaneously reading a conductance of the memristor, the conductance of the memristor corresponding to the initial conductance (Gi).
77. The storage medium of claim 76, wherein: the applying of the positive-polarity rectangular voltage pulse to the memristor comprises applying the positive-polarity rectangular voltage pulse to the first electrode of the memristor, and the reading of the conductance of the memristor comprises reading a current of the memristor and determining the conductance of the memristor from the current.
78. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating a communication pathway connection, the method comprising: (a) generating a first voltage trace (Vb1) based on voltage peaks of a first node of a pair of nodes, the first voltage trace comprising a plurality of first voltage bursts over a period of time, the first voltage bursts each comprising a positive component and a negative component; (b) generating a second voltage trace (Vt1) based on voltage peaks of a second node of the pair of nodes, the second voltage trace comprising a plurality of second voltage bursts over the period of time, the second voltage bursts each comprising a positive component and a negative component; (c) applying the first voltage trace (Vb1) to a first electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to a second electrode of the memristor; (d) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (c), determining a first final conductance (Gf1) of the memristor; (e) applying the first voltage trace (Vb1) to the second electrode of a memristor, and simultaneously applying the second voltage trace (Vt1) to the first electrode of the memristor; (f) after simultaneously applying the first voltage trace (Vb1) and the second voltage trace (Vt1) in (e), determining a second final conductance (Gf2) of the memristor; (g) determining a first conductance change (ΔG1) corresponding to a difference between the first final conductance (Gf1) and an initial conductance (Gi), and determining a second conductance change (ΔG2) corresponding to a difference between the second final conductance (Gf2) and the initial conductance (Gi); (h) determining a direction of communication between the first and second nodes based on a comparison of the first conductance change (ΔG1) and the second conductance change (ΔG2), wherein: for ΔG1 > ΔG2, the direction of communication is from the first node to the second node, and for ΔG1 < ΔG2, the direction of communication is from the second node to the first node; (i) determining a connection strength of the pair of nodes by: for a case in which the first voltage trace (Vb1) is applied to the first electrode of the memristor and simultaneously the second voltage trace (Vt1) is applied to the second electrode of the memristor, determining a ratio Z of a number of time-correlated voltage-burst pairs Npair to a total number of first voltage bursts Npre1, where Z = Npair/Npre1, or for a case in which the first voltage trace (Vb1) is applied to the second electrode of the memristor, and simultaneously the second voltage trace (Vt1) is applied to the first electrode of the memristor, determining a ratio Z of a number of time-correlated voltage- burst pairs Npair to a total number of second voltage bursts Npre2, where Z = Npair/Npre2.
79. The storage medium of claim 78, wherein: the first voltage bursts comprise first sawtooth voltage spikes, the first voltage trace comprises a first spike trace, the second voltage bursts comprise second sawtooth voltage spikes, and the second voltage trace comprises a second spike trace.
80. The storage medium of claim 78, wherein: the pair of nodes comprises a pair of neurons including a first neuron and a second neuron, and the voltage peaks of the first node comprise neuronal signals of the first neuron, and the voltage peaks of the second node comprise neuronal signals of the second neuron.
81. A non-transitory computer-readable storage medium storing computer-readable code that, when executed by at least one computer processor, implements a method of evaluating communication pathway connections for a plurality of nodes, the method comprising: for each pair of a plurality of pairs of the nodes: (a) identifying first voltage peaks in a first signal trace corresponding to a first node of the pair, determining occurrence times for the first voltage peaks, and determining a total number of the first voltage peaks (Npre1); (b) identifying second voltage peaks in a second signal trace corresponding to a second node of the pair, determining occurrence times for the second voltage peaks, and determining a total number of the second voltage peaks (Npre2); (c) determining a total number of time-correlated voltage-peak pairs (Npair), each time-correlated voltage-peak pair comprising a first voltage peak and a second voltage peak that occurs within a predetermined time window relative to the first voltage peak; and (d) determining a connection strength Z of the pair as: a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the first voltage peaks (Npre1), or a ratio between the total number of time-correlated voltage-peak pairs (Npair) and the total number of the second voltage peaks (Npre2).
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