WO2023019582A1 - Power amplifier circuit, radio frequency circuit and communication device - Google Patents

Abstract

The present application relates to the technical field of electronics. Provided are a power amplifier (PA) circuit, a radio frequency circuit and a communication device, which are used for reducing the temperature difference between different transistors in a power cell, thereby prolonging the service life of the entire PA circuit. The power amplifier comprises: a power cell, which has an input end, a bias end and an output end. The power cell comprises a plurality of transistors, which comprise a first transistor and a second transistor, wherein a base electrode/gate electrode of the first transistor is coupled to the input end by means of a first capacitor, and is coupled to the bias end by means of a first resistor; a base electrode/gate electrode of the second transistor is coupled to the input end by means of a second capacitor, and is coupled to the bias end by means of a second resistor; collector electrodes/drain electrodes of the first transistor and the second transistor are coupled to the output end; emitter electrodes/source electrodes of the first transistor and the second transistor are coupled to a grounding end; and resistance values of the first resistor and the second resistor are different.

Description

Power amplifier circuits, radio frequency circuits and communication equipment technical field

The present application relates to the field of electronic technology, in particular to a power amplifier circuit, a radio frequency circuit and communication equipment.

Background technique

The power amplifier (power amplifier, PA) is an important part of the mobile communication system. As the final amplification unit of the transmission channel, its function is to amplify the low-power radio frequency signal and send it to the antenna for transmission. A PA usually includes a multi-stage power cell (power cell), and the multi-stage power cell is used to amplify the radio frequency signal step by step, so that the power of the radio frequency signal in the final power cell of the multi-stage power cell is the largest. At present, in the power amplifier circuit, due to the existence of thermal coupling effect, the final power unit often has a problem of local overheating (the highest temperature can exceed 250° C.), which threatens the reliability of the power amplifier.

Contents of the invention

The present application provides a power amplifier circuit, a radio frequency circuit and communication equipment, which are used to improve the reliability of the PA circuit, thereby increasing the service life of the entire PA circuit.

In order to achieve the above object, the application adopts the following technical solutions:

In a first aspect, a power amplifier circuit is provided, the power amplifier includes: a power unit having an input end, a bias end and an output end; the power unit includes: a plurality of transistors, the plurality of transistors include a first transistor and a second transistor , the base/gate of the first transistor is coupled to the input terminal through the first capacitor, coupled to the bias terminal through the first resistor, the base/gate of the second transistor is coupled to the input terminal through the second capacitor, Coupled with the bias end through the second resistor, the collector/drain of the first transistor and the second transistor are coupled with the output end, the emitter/source of the first transistor and the second transistor are coupled with the ground end, the first The resistance of the resistor is different from that of the second resistor.

In the above technical solution, in the power amplifier circuit, the plurality of transistors included in the power unit will generate different heat or be affected by different heat conduction in the surroundings due to different arrangement positions, so that the bases/gates of different transistors The currents of different transistors are different, and the scheme of this application can make the base/gate currents of the multiple transistors be distributed as uniformly as possible by coupling resistors of different resistances in series in the DC paths of different transistors, so as to ensure that the temperature difference of different transistors is relatively small. Small, so as to avoid the current collapse phenomenon, so as to improve the reliability of the PA circuit and the life of the entire PA circuit. For example, a resistor with a larger resistance value is connected in series in the DC path of a transistor that is heated more to reduce the current at the base/gate of the transistor, and a resistor with a smaller resistance value is connected in series in the DC path of a transistor that receives less heat , so as to increase the base/gate current of the transistor, so that the base/gate current of the plurality of transistors can be distributed as evenly as possible.

In a possible implementation manner of the first aspect, the base/gate of the first transistor is coupled to the bias terminal through a first resistor, and the base/gate of the second transistor is coupled to the bias terminal through a second resistor. Set terminal coupling, the emitter/source of the first transistor and the second transistor are coupled to the ground terminal, which can be replaced by: the base/gate of the first transistor is coupled to the bias terminal, the base/gate of the second transistor The electrode is coupled to the bias terminal, the emitter/source of the first transistor is coupled to the ground terminal through the first resistor, and the emitter/source of the second transistor is coupled to the ground terminal through the second resistor. In the above possible implementation, by coupling resistors with different resistances in series in the DC paths of different transistors, the base/gate currents of the multiple transistors can be distributed as evenly as possible, so as to ensure that the temperature difference of different transistors is relatively small. Small, so as to avoid the current collapse phenomenon, so as to improve the reliability of the PA circuit and the life of the entire PA circuit.

In a possible implementation manner of the first aspect, the multiple transistors further include: a third transistor, the base/gate of the third transistor is coupled to the input terminal through a third capacitor, and is connected to the bias terminal through a third resistor. The terminal is coupled, the collector/drain of the third transistor is coupled to the output terminal, the emitter/source of the third transistor is coupled to the ground terminal; the third transistor is arranged on the side of the second transistor away from the first transistor, here The distance refers to the positional relationship on the chip circuit layout corresponding to the PA circuit, and the resistance value of the second resistor is greater than the resistance value of the first resistor. In the above possible implementation, assuming that the heat generated by each transistor is the same, the heat received by each transistor mainly depends on the heat conduction received by the second transistor. At this time, the heat conduction received by the second transistor is greater than that received by the first transistor, so that The heating of the transistor is greater than that of the first transistor. By setting the resistance value of the second resistor greater than the resistance value of the first resistor, the base/gate current of the second transistor can be reduced, and the base current of the first transistor can be increased, so that the bases of the first transistor and the second transistor The pole/gate current is distributed as evenly as possible.

In a possible implementation manner of the first aspect, the resistance value of the third resistor is equal to the resistance value of the first resistor. In the above possible implementation manner, if the heat received by the third transistor is substantially the same as that of the first transistor, the resistance value of the third resistor is equal to the resistance value of the first resistor. At this time, the resistance value of the second resistor is greater than the resistance value of the first resistor and the resistance value of the third resistor, and the resistance value of the first resistor is equal to the resistance value of the third resistor, so that the base of the second transistor can be reduced /gate current, increasing the base/gate currents of the first transistor and the third transistor, so that the base/gate currents of the first transistor, the second transistor and the third transistor are distributed as evenly as possible.

In a possible implementation manner of the first aspect, the multiple transistors further include a fourth transistor, the base/gate of the fourth transistor is coupled to the input terminal through a fourth capacitor, and is connected to the bias terminal through a fourth resistor. terminal coupling, the collector/drain of the fourth transistor is coupled to the output terminal, and the emitter/source of the fourth transistor is coupled to the ground terminal; the fourth transistor is arranged on the side of the third transistor away from the second transistor, where the Distance refers to the positional relationship on the chip circuit layout corresponding to the PA circuit, and the resistance value of the fourth resistor is smaller than the resistance value of the second resistor. Optionally, the resistance value of the second resistor is equal to the resistance value of the third resistor; and/or, the resistance value of the fourth resistor is smaller than the resistance value of the third resistor; and/or, the resistance value of the fourth resistor is equal to that of the first resistor resistance value. In the above possible implementation, the base/gate current of the second transistor and the third transistor can be reduced, and the base/gate current of the first transistor and the fourth transistor can be increased, so that the first transistor, the second transistor , base/gate currents of the third transistor and the fourth transistor are distributed as evenly as possible.

In a possible implementation manner of the first aspect, the power unit further includes: a capacitor connected in parallel with a resistor correspondingly coupled to the base/gate of each transistor in the plurality of transistors; or, the power unit further includes: An RC circuit in parallel with a resistor coupled to the base/gate of each of the plurality of transistors, the RC circuit including a capacitor and a resistor in series. In the above possible implementation manners, the influence of the radio frequency signal on the direct current path can be avoided by connecting a capacitor in parallel with a resistor corresponding to the base/gate of each transistor, or connecting an RC circuit in parallel.

In a possible implementation manner of the first aspect, the power unit further includes: a fifth resistor; the fifth resistor is coupled between the bias terminal and the first node, and the first node is the base of the plurality of transistors /Gate corresponds to the coupling point of the coupled resistor. In the above possible implementation, by setting multi-stage ballast resistors in the DC path of each transistor, the temperature difference between different transistors in the power unit can be further reduced, thereby avoiding the phenomenon of current collapse and improving the service life of the entire PA circuit.

In a possible implementation manner of the first aspect, the multiple transistors include a first transistor set and a second transistor set, each transistor set includes at least two adjacent transistors among the multiple transistors, and the power unit further Including: a sixth resistor; a sixth resistor is respectively coupled between the first node and the second node, and between the first node and the third node, and the second node is correspondingly coupled to the base/gate of the first transistor set The coupling point of the resistors, the third node is the coupling point of the resistors coupled to the base/gate of the second transistor set. In the above possible implementation, by setting multi-stage ballast resistors in the DC path of each transistor, the temperature difference between different transistors in the power unit can be further reduced, thereby avoiding the phenomenon of current collapse and improving the service life of the entire PA circuit.

In a possible implementation manner of the first aspect, the power unit further includes an inductor, and the collectors/drains of the multiple transistors are also coupled to the power supply terminal through the inductor.

In a possible implementation manner of the first aspect, the power unit is a final stage power unit in the power amplifier circuit. Optionally, the power amplifier further includes a front-stage power unit, an output end of the front-stage power unit is coupled to an input end of the final-stage power unit. In the above possible implementation, the base/gate currents of multiple transistors connected in parallel in the final power unit can be distributed as evenly as possible to ensure that the temperature difference between different transistors is small, thereby avoiding the phenomenon of current collapse and improving the overall efficiency. lifetime of the PA circuit.

In a second aspect, a radio frequency circuit is provided, where the radio frequency circuit includes a transmission channel, and the transmission channel includes the power amplifier circuit provided in the first aspect or any possible implementation manner of the first aspect. Optionally, the radio frequency circuit may also include: a first low-pass filter, a first mixer and a transmit filter, the input of the transmit filter is coupled to the output of the power amplifier circuit, and the input of the first mixer The terminal is coupled to the input terminal of the power amplifier circuit, and the input terminal of the first mixer is coupled to the output terminal of the first low-pass filter.

In a possible implementation manner of the second aspect, the radio frequency circuit further includes a receiving channel, the receiving channel includes a second low-pass filter, a second mixer, a low-noise amplifier, and a receiving filter, and the output of the receiving filter The terminal is coupled to the input terminal of the low-noise amplifier, the output terminal of the low-noise amplifier is coupled to the input terminal of the second mixer, and the output terminal of the second mixer is coupled to the input terminal of the second low-pass filter.

A third aspect provides a communication device, the communication device includes a radio frequency circuit and an antenna, the radio frequency circuit is the radio frequency circuit provided in the second aspect or any possible implementation of the second aspect, the antenna and the transmitting A filter is coupled to the receive filter.

It can be understood that any radio frequency circuit and communication device provided above includes all the contents of the power stage circuit provided above, therefore, the beneficial effects it can achieve can refer to the power stage circuit provided above The beneficial effects will not be repeated here.

Description of drawings

FIG. 1 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a radio frequency circuit provided by an embodiment of the present application;

FIG. 3 is a schematic structural diagram of a PA circuit provided by an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a power unit provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a current collapse provided by an embodiment of the present application;

FIG. 6 is a schematic structural diagram of another PA circuit provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of another PA circuit provided in an embodiment of the present application;

FIG. 8 is a schematic structural diagram of another PA circuit provided by an embodiment of the present application;

FIG. 9 is a chip layout of a PA circuit provided by an embodiment of the present application;

FIG. 10 is a schematic structural diagram of another PA circuit provided by the embodiment of the present application;

FIG. 11 is a schematic structural diagram of another PA circuit provided by an embodiment of the present application;

FIG. 12 is a schematic structural diagram of another PA circuit provided in the embodiment of the present application;

FIG. 13 is a schematic structural diagram of another PA circuit provided by an embodiment of the present application;

FIG. 14 is a schematic diagram of a performance comparison of a PA circuit provided by an embodiment of the present application.

Detailed ways

In this application, "at least one" means one or more, and "multiple" means two or more. "And/or" describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one item (piece) of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b and c, wherein a, b, c can be single or multiple. In addition, the embodiments of the present application use words such as "first" and "second" to distinguish objects with similar names or functions or effects. Those skilled in the art can understand that words such as "first" and "second" are not The number and execution order are not limited. The term "coupled" is used to indicate an electrical connection, including direct connection through wires or terminals or indirect connection through other devices. "Coupling" should therefore be viewed as an electronic communication connection in a broad sense.

In this application, words such as "exemplary" or "for example" are used to mean an example, illustration or illustration. Any embodiment or design described herein as "exemplary" or "for example" is not to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete manner.

The technical solutions of the present application can be applied to various wireless communication devices including power amplifiers. The wireless communication device can be deployed on land, including indoors or outdoors, hand-held or vehicle-mounted. It can also be deployed on water (such as ships, etc.). It can also be deployed in the air (for example, on aircraft, balloons and satellites, etc.). For example, the wireless channel device may be a terminal or a base station. For example, the terminal includes but is not limited to: mobile phone (mobile phone), tablet computer, notebook computer, palmtop computer, mobile internet device (mobile internet device, MID), wearable device (such as smart watch, smart bracelet, pedometer etc.), vehicle-mounted equipment (for example, automobiles, bicycles, electric vehicles, airplanes, ships, trains, high-speed rail, etc.), virtual reality (virtual reality, VR) equipment, augmented reality (augmented reality, AR) equipment, industrial control (industrial control ), wireless terminals in smart home equipment (such as refrigerators, TVs, air conditioners, electric meters, etc.), intelligent robots, workshop equipment, wireless terminals in self-driving (self-driving), and remote medical surgery (remote medical surgery) Wireless terminals, wireless terminals in smart grid, wireless terminals in transportation safety, wireless terminals in smart city, or wireless terminals in smart home, flight equipment (eg, intelligent robots, hot air balloons, drones, airplanes), etc.

FIG. 1 is a schematic structural diagram of a wireless communication device provided in an embodiment of the present application. The wireless communication device is described by taking a mobile phone as an example. The wireless communication device includes: an RF circuit 101 , a memory 102 , a processor 103 , a sensor component 104 , a multimedia component 105 , a power supply component 106 and an input/output interface 107 .

The following is a specific introduction to each component of the mobile phone in conjunction with Figure 1:

The RF circuit 101 can be used for sending and receiving information or receiving and sending signals during a call. In particular, after receiving downlink information from the base station, process it with the processor 103 and send uplink data to the base station. Generally, the RF circuit 101 includes but is not limited to an antenna, a duplexer, a filter, a power amplifier (power amplifier, PA), a low noise amplifier (low noise amplifier, LNA), a mixer (mixer, MIX) and a low-pass filter device (low pass filter, LPF), etc. Exemplarily, as shown in FIG. 2, the RF circuit 101 may include: an antenna, a duplexer, and a transmit channel and a receive channel coupled to the duplexer. The transmit channel may include sequentially coupled LPF1, MIX1, PA and The transmit filter, the receive channel may include sequentially coupled LPF2, MIX2, LNA and receive filter.

The memory 102 can be used to store data, software programs and modules; mainly includes a program storage area and a data storage area, wherein the program storage area can store an operating system and at least one application program required by a function, such as a sound playback function, an image playback function, etc. ; The storage data area can store data created according to the use of the mobile phone, such as audio data, image data, phone book, and the like. In addition, the mobile phone may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage devices.

The processor 103 is the control center of the mobile phone, and uses various interfaces and lines to connect various parts of the entire device, by running or executing software programs and/or modules stored in the memory 102, and calling data stored in the memory 102, Execute various functions of the mobile phone and process data, so as to monitor the mobile phone as a whole. Optionally, the processor 103 may include one or more processing units, for example, the processor 103 may integrate an application processor (Application Processor, AP) and a baseband processor (modem), the operating system, user interface and application program of the mobile phone Processing can be run on the AP, and communication functions can be processed on the baseband processor. It can be understood that, as mentioned above, the baseband processor may not be integrated into the processor 103 .

Sensor component 104 includes one or more sensors for providing various aspects of status assessment for the handset. Wherein, the sensor component 104 may include an acceleration sensor, a gyro sensor, a magnetic sensor, a pressure sensor or a temperature sensor, and the sensor component 103 may detect the acceleration/deceleration, orientation, opening/closing status of the mobile phone, the relative positioning of components, or The phone's temperature changes, etc. Additionally, sensor assembly 104 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications.

The multimedia component 105 provides an output interface screen between the mobile phone and the user. The screen can be a touch panel, and when the screen is a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may not only sense a boundary of a touch or swipe action, but also detect duration and pressure associated with the touch or swipe action. In addition, the multimedia component 105 also includes at least one camera, for example, the multimedia component 105 includes a front camera and/or a rear camera. When the mobile phone is in an operation mode, such as a shooting mode or a video mode, the front camera and/or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have focal length and optical zoom capability.

The power supply component 106 is used to provide power for various components of the mobile phone. The power supply component 106 may include a power management system, one or more power supplies, and other components associated with the mobile phone to generate, manage and distribute power. The input/output interface 107 provides an interface between the processor 103 and a peripheral interface module, for example, the peripheral interface module can be a keyboard, a mouse, and the like.

Although not shown, the mobile phone may also include an audio component and a communication module, etc., such as an audio component including a microphone and a speaker, and the communication module may include a wireless fidelity (wireless fidelity, WiFi) module, a Bluetooth module, a near-field communication (near Field communication, NFC) module, global navigation satellite system (global navigation satellite system, GNSS) module or one or more of frequency modulation (frequency modulation, FM) modules, the embodiments of the present application will not repeat them here. Those skilled in the art can understand that the structure of the mobile phone shown in FIG. 1 does not constitute a limitation to the mobile phone, and may include more or less components than shown in the figure, or combine some components, or arrange different components.

FIG. 3 is a schematic structural diagram of a PA circuit provided by an embodiment of the present application. The PA circuit may include: at least one stage of power cells (power cells). Each stage of power cells in the at least one stage of power cells may include a plurality of transistors connected in parallel. When the at least one level of power unit includes a multi-level power unit, the multi-level power unit can be used to amplify the radio frequency signal step by step. In FIG. 3 , the at least one level of power units includes N levels of power units as an example for illustration, where N is an integer greater than 1.

At present, in the PA circuit, the multi-stage power unit can be used to amplify the radio frequency signal step by step, so that the power of the radio frequency signal in the final power unit (that is, the Nth power unit) of the multi-stage power unit is the largest. Due to the thermal coupling effect, the final power unit often has a problem of local overheating (the highest temperature can exceed 250° C.), which poses a threat to the reliability of the PA circuit.

In one example, a ballasting resistor with the same resistance value is connected in series between the bases (base, B) and the bias terminal of the plurality of transistors included in the final power unit, so that when each When the base current I _B of the transistor increases, the voltage drop of the corresponding ballast resistor increases, so that the voltage drop on the base-emitter (base-emitter, BE) junction (junction) of the transistor decreases, This in turn lowers the BE junction temperature of the transistor. Exemplarily, as shown in FIG. 4 , the final power unit includes 7 transistors connected in parallel, which are denoted as M1 to M7 respectively, and the bases of M1 to M7 are respectively connected to a bias circuit (including a series transistor) through a ballast resistor R0 Power supply VS1 and L1), and the bases of M1 to M7 are also connected to the radio frequency circuit (including R1 and C1 in series) through a DC blocking capacitor C0, and the collectors (collector, C) of M1 to M7 are connected to the power circuit (including power supply VS2, L2, R2 and C2) are connected, and the emitters (emitters, E) of M1 to M7 are all connected to the ground terminal.

When the scheme shown in FIG. 4 is adopted, during the normal operation of the final power unit, each transistor in the plurality of transistors will generate heat, and will be subjected to heat conduction from other surrounding transistors, so that among the plurality of transistors The ambient temperature of the transistor located in the middle is relatively high, and the temperature of the BE junction is also relatively high. Since the turn-on voltage of the BE junction of the transistor will decrease with the increase of the temperature of the BE junction, the turn-on voltage of the transistor in the middle position will decrease, the base current I _B will increase, and the collector current I _C will increase, thus The power of the transistor in the middle position increases, and the heat generated by itself is stronger, forming a positive feedback. Finally, the base current I _B of all transistors is only amplified by the transistor in the middle position, and the collector current I _C of all transistors is The sum decreases sharply, forming the phenomenon of current collapse as shown in Figure 5. In addition, the temperature of the transistor in the middle position is the highest among the temperatures of the plurality of transistors, which also makes the lifetime of the transistor in the middle position the upper limit of the lifetime of the entire PA circuit.

Based on this, an embodiment of the present application provides a PA circuit. In the DC path of different transistors included in the power unit of the PA circuit, resistors with different resistance values can be connected in series, so that the base current I _B of multiple transistors connected in parallel can be as much as possible. The possible uniform distribution ensures that the temperature difference between different transistors is small, thereby avoiding the phenomenon of current collapse and improving the life of the entire PA circuit.

FIG. 6 is a schematic structural diagram of a PA circuit provided by an embodiment of the present application. The PA circuit includes: a power unit having an input terminal PIN, a bias terminal BP, and an output terminal POUT. The power unit may be the final stage of the PA circuit. In the power unit, the input terminal PIN can be used to receive a radio frequency signal, the bias terminal BP can be used to receive a bias current, and the output terminal POUT can be used to output a radio frequency signal.

Wherein, the power unit includes: multiple transistors, multiple capacitors and multiple resistors. A capacitor is respectively coupled between the base/gate of each transistor in the plurality of transistors and the input terminal PIN, the base/gate of each transistor is coupled with the bias terminal BP, and the emitter of each transistor /source is coupled to the ground terminal, the collector/drain of each transistor is coupled to the input terminal PIN, between the base/gate of each transistor and the bias terminal BP or the emitter/source of each transistor A resistor is coupled to ground. The above-mentioned resistor can also be called a ballast circuit, which can be used to limit the current in the DC path corresponding to each transistor. Optionally, the power unit may further include an inductor L, and the collectors of the plurality of transistors are also coupled to the power supply terminal VCC through the inductor L.

In the solution of this application, the multiple transistors include a first transistor M1 and a second transistor M2, the multiple capacitors include a first capacitor C11 and a second capacitor C12, and the multiple resistors include a first resistor R11 and a second resistor R12 , the base/gate of the first transistor M1 is coupled to the input terminal PIN through the first capacitor C11, and is coupled to the bias terminal BP through the first resistor R11, and the base/gate of the second transistor M2 is coupled through the second The capacitor C12 is coupled with the input terminal PIN, coupled with the bias terminal BP through the second resistor R12, the collector/drain of the first transistor M1 and the second transistor M2 are coupled with the input terminal PIN, the first transistor M1 and the The emitter/source of the second transistor M2 is coupled to the ground terminal, and the resistance of the first resistor R11 is different from that of the second resistor R12, which is shown as R11≠R12 in FIG. 6 .

It should be noted that in FIG. 6, the plurality of transistors include a first transistor M1 and a second transistor M2, and the bases/gates of M1 and M2 and the input terminal PIN are respectively coupled with a first capacitor C11 and a second capacitor C11. The first resistor R11 and the second resistor R12 are respectively coupled between the bases/gates of the capacitors C12, M1 and M2 and the bias terminal BP for illustration.

It should be noted that the plurality of transistors may be bipolar junction transistors (bipolar junction transistor, BJT), and may also be complementary metal oxide semiconductor (complementary, metal oxide semiconductor, CMOS) transistors; the plurality of resistors may be coupled to Between the bases/gates of the plurality of transistors and the bias terminal BP, they can also be coupled between the emitters/sources of the plurality of transistors and the ground terminal; or, a part of the resistances in the plurality of resistances The resistance is coupled between the base/gate of a part of transistors and the bias terminal BP, and the resistance of another part is coupled between the emitter/source of another part of transistors and the ground terminal. In this paper, the multiple transistors are BJTs and the multiple resistors are coupled between the bases of the multiple transistors and the bias terminal BP as an example for illustration.

In the PA circuit, the plurality of transistors included in the power unit will generate different heat or be affected by different heat conduction around them due to different arrangement positions, so that the base currents of different transistors are different. Resistors with different resistance values are coupled in series in the DC paths of different transistors, which can make the base currents of the multiple transistors distributed as uniformly as possible, so as to ensure that the temperature difference between different transistors is small, thereby avoiding the phenomenon of current collapse and improving the PA circuit. reliability and lifetime of the entire PA circuit. For example, a resistor with a larger resistance value is connected in series in the DC path of a transistor that is heated more to reduce the current at the base of the transistor, and a resistor with a smaller resistance value is connected in series in the DC path of a transistor that receives less heat to increase The base current of the transistors is increased, so that the base currents of the multiple transistors are distributed as evenly as possible.

Further, when there are more transistors in the plurality of transistors, the resistance value of the resistance coupled in series in the DC path of the transistor located in the middle of the plurality of transistors is greater than the resistance of the resistance coupled in series in the DC path of the transistor located in the edge position resistance value. The above description can also be replaced by: the resistance value of the resistor coupled in series in the DC path of the transistor that is more heated among the plurality of transistors is greater than the resistance value of the resistor coupled in series in the DC path of the transistor that is less heated.

In one embodiment, as shown in FIG. 7, the plurality of transistors further include a third transistor M3, the base of the third transistor M3 is coupled to the input terminal PIN through a third capacitor C13, and connected to the input terminal PIN through a third resistor R13. The bias terminal BP is coupled, the collector of the third transistor M3 is coupled to the output terminal POUT, and the emitter of the third transistor M3 is coupled to the ground terminal.

Wherein, the third transistor M3 is arranged on the side of the second transistor M2 far away from the first transistor M1, that is, the second transistor M2 is arranged in the middle of the first transistor M1 and the third transistor M3, and the distance here refers to the side where the PA circuit corresponds to The positional relationship on the chip circuit layout. At this time, the resistance value of the second resistor R12 coupled with the second transistor M2 is greater than the resistance value of the first resistor R11 coupled with the first transistor M1, which is expressed as R12>R11 in FIG. 7 .

Specifically, the heat received by the second transistor M2 includes the heat generated by the second transistor M2 and the heat conduction of the first transistor M1 and the third transistor M3. The heating of the first transistor M1 includes the heat generated by the first transistor M1 and the heat conduction of the second transistor M2 and the third transistor M3. Assuming that the heat generated by each transistor itself is the same, the heat received by each transistor mainly depends on the heat conduction received. At this time, when the third transistor M3 is arranged on the side of the second transistor M2 away from the first transistor M1, the second transistor M2 is subjected to The heat conduction of the second transistor M2 is greater than the heat conduction of the first transistor M1, so that the heat of the second transistor M2 is greater than that of the first transistor M1. By setting the resistance value of the second resistor R12 to be greater than the resistance value of the first resistor R11, the base current of the second transistor M2 can be reduced, and the base current of the first transistor M1 can be increased, so that the first transistor M1 and the second transistor The base current of M2 is distributed as evenly as possible.

Optionally, the resistance value of the third resistor R13 coupled to the third transistor M3 is equal to the resistance value of the first resistor R11, that is, the third resistor R13 is equal to the first resistor R11, which is expressed as R13=R11 in FIG. 7 .

Wherein, the heating of the third transistor M3 includes the heat generated by the third transistor M3 and the heat conduction of the first transistor M1 and the second transistor M2. If the heat of the third transistor M3 is substantially the same as that of the first transistor M1, the resistance of the third resistor R13 is equal to the resistance of the first resistor R11. At this time, the resistance value of the second resistor R12 is greater than the resistance value of the first resistor R11 and the resistance value of the third resistor R13, and the resistance value of the third resistor R13 is equal to the resistance value of the first resistor R11, thereby reducing the resistance of the first resistor R11. The base current of the second transistor M2 increases the base currents of the first transistor M1 and the third transistor M3 so that the base currents of the first transistor M1 , the second transistor M2 and the third transistor M3 are distributed as evenly as possible.

Further, as shown in FIG. 8, the plurality of transistors also includes a fourth transistor M4, the base of the fourth transistor M4 is coupled to the input terminal PIN through a fourth capacitor C14, and is connected to the bias terminal BP through a fourth resistor R14. coupling, the collector of the fourth transistor M4 is coupled to the output terminal POUT, and the emitter of the fourth transistor M4 is coupled to the ground terminal.

Wherein, the fourth transistor M4 is arranged on the side of the third transistor M3 away from the second transistor M2, and the distance here refers to the positional relationship on the chip circuit layout corresponding to the PA circuit. The resistance value of the fourth resistor R14 coupled to the fourth transistor M4 is smaller than the resistance value of the second resistor R12, that is, the fourth resistor R14 is smaller than the second resistor R12, which is expressed as R14<R12 in FIG. 8 . Exemplarily, FIG. 9 shows a chip circuit layout of the PA circuit corresponding to FIG. M2 is away from the side of the first transistor M1, the fourth transistor M4 is arranged on the side of the third transistor M3 away from the second transistor M2, and the corresponding coupled capacitors and resistors of each transistor are connected through metal according to the corresponding coupling relationship in FIG. 8 . C in FIG. 9 represents a collector, B represents a base, and E represents an emitter.

Specifically, when the fourth transistor M4 is arranged on the side of the third transistor M3 away from the second transistor M2, the heat received by the second transistor M2 includes the heat generated by the second transistor M2, and the heat generated by the first transistor M1 and the third transistor M3. and the heat conduction of the fourth transistor M4. The heat received by the fourth transistor M4 includes heat generated by the fourth transistor M4 and heat conduction from the first transistor M1 to the third transistor M3. Assuming that the heat generated by each transistor itself is the same, the heat received by each transistor mainly depends on the heat conduction received. At this time, when the fourth transistor M4 is arranged on the side of the third transistor M3 away from the second transistor M2, the second transistor M2 will receive The heat conduction of the second transistor M2 is greater than the heat conduction of the fourth transistor M4, so that the heat of the second transistor M2 is greater than that of the fourth transistor M4, so by setting the resistance value of the fourth resistor R14 to be smaller than the resistance value of the second resistor R12, the second resistor R14 can be reduced. The base current of the transistor M2 increases the base current of the fourth transistor M4, so that the base currents of the second transistor M2 and the fourth transistor M4 are distributed as evenly as possible.

Optionally, the resistance value of the second resistor R12 coupled with the second transistor M2 is equal to the resistance value of the third resistor R13 coupled with the third transistor M3, that is, the second resistor R12 is equal to the third resistor R13. Optionally, the resistance value of the fourth resistor R14 coupled with the fourth transistor M4 is smaller than the resistance value of the third resistor R13 coupled with the third transistor M3, that is, the fourth resistor R14 is smaller than the third resistor R13. Optionally, the resistance value of the fourth resistor R14 coupled with the fourth transistor M4 is equal to the resistance value of the first resistor R11 coupled with the first transistor M1, that is, the fourth resistor R14 is equal to the first resistor R11. In FIG. 8, it expresses as R11=R14<R12=R13.

Specifically, the heating of the third transistor M3 includes the heat generated by the third transistor M3 and the heat conduction of the first transistor M1 , the second transistor M2 and the fourth transistor M4 . If the heat of the third transistor M3 is substantially the same as that of the second transistor M2, the resistance of the third resistor R13 is equal to the resistance of the second resistor R12. If the heat of the fourth transistor M4 is less than that of the third transistor M3, the resistance of the fourth resistor R14 is smaller than the resistance of the third resistor R13. The heating of the first transistor M1 includes heat generated by the first transistor M1 and heat conduction from the second transistor M2 to the fourth transistor M4. If the heat of the first transistor M1 is substantially the same as that of the fourth transistor M4, the resistance of the fourth resistor R14 is equal to the resistance of the first resistor R11.

At this time, the resistance values of the second resistor R12 and the third resistor R13 are greater than the resistance values of the first resistor R11 and the fourth resistor R14, and the resistance value of the third resistor R13 is equal to the resistance value of the second resistor R12, and the first resistor The resistance value of R11 is equal to the resistance value of the fourth resistor R14, so that the base currents of the second transistor M2 and the third transistor M3 can be reduced, and the base currents of the first transistor M1 and the fourth transistor M4 can be increased, so that the first The base currents of the transistor M1 , the second transistor M2 , the third transistor M3 and the fourth transistor M4 are distributed as evenly as possible.

Optionally, when the plurality of transistors includes a greater number of transistors, the resistance value of the resistor coupled in series in the DC path of the transistor closer to the middle position among the plurality of transistors is larger, and the DC path of the transistor closer to the edge position is larger. The resistance value of the resistor coupled in series is smaller.

Exemplarily, as shown in FIG. 10 , it is assumed that the plurality of transistors includes 6 transistors and are respectively denoted as M11 to M16, and the corresponding coupling capacitance between the base of each transistor in M11 to M16 and the input terminal PIN is respectively denoted as Resistors are C11 to C16, the base of each transistor and the bias terminal BP are correspondingly coupled, and are denoted as R21 to R26 respectively. In the power unit of the PA circuit, the multiple transistors M11 to M16 are arranged in a row, M13 and M14 are located in the middle of the multiple transistors, M11 and M16 are located at the edge of the multiple transistors, and M12 is located between M11 and M13 between the M15 and the M14 and M16. The above R21 to R26 may satisfy the following conditions: R21=R26, R22=R25, R23=R24, R23(R24)>R22(R25)>R21(R26). For example, R21=R26=93.77 ohm, R22=R25=242.95 ohm, R23=R24=633.73 ohm. The ohm can also be expressed as Ω.

Further, as shown in FIG. 11 , the power unit may further include: a capacitor C2 connected in parallel with a resistor correspondingly coupled to each of the multiple transistors. Alternatively, as shown in FIG. 12 , the power unit may further include: an RC circuit connected in parallel with a resistor correspondingly coupled to each of the multiple transistors, and the RC circuit includes a capacitor C2 and a resistor R2 connected in series. FIG. 11 and FIG. 12 only show a part of the structure of the power unit, and specifically take the first transistor M1 among the plurality of transistors as an example for illustration.

Further, the power unit may further include: a fifth resistor. In one embodiment, when a resistor is coupled between the base of each transistor in the plurality of transistors and the bias terminal BP, the fifth resistor may be coupled between the bias terminal BP and the first node Between, the first node is the coupling point of the corresponding coupled resistors of the plurality of transistors.

Exemplarily, with reference to FIG. 8, as shown in FIG. 13, the plurality of transistors may include transistors M1 to M4, and the coupling point of the resistors corresponding to M1 to M4 is a first node, and the first node is connected to the bias terminal BP A fifth resistor R5 is coupled between them.

In another embodiment, the plurality of transistors includes a first transistor set and a second transistor set, each transistor set includes at least two adjacent transistors in the plurality of transistors, and the power unit may further include: one or multiple sixth resistors. Wherein, a sixth resistor is respectively coupled between the first node and the second node, and between the first node and the third node, and the second node is the base of the first transistor set correspondingly coupled to the resistor. A coupling point, the third node is the coupling point of the resistance coupled to the base of the second transistor set. Optionally, the resistance value of the sixth resistor coupled to the first transistor set may be different from or the same as the resistance value of the sixth resistor coupled to the second transistor set, which is not specifically limited in this embodiment of the present application.

Exemplarily, with reference to FIG. 8, as shown in FIG. 13, the first set of transistors may include transistors M1 and M2, the second set of transistors may include transistors M3 and M4, and the bases of M1 and M2 are correspondingly coupled to the first resistors R11 and The coupling point of the second resistor R12 is the second node, the coupling point of the third resistor R13 and the fourth resistor R14 correspondingly coupled to the bases of M3 and M4 is the third node, and the coupling between the first node and the second node There is a sixth resistor R61, and a sixth resistor R62 is coupled between the first node and the third node.

Similarly, when multiple resistors such as the first resistor R11 and the second resistor R12 are coupled between the emitter of each of the multiple transistors and the ground terminal, the fifth resistor can be coupled between the ground terminal and the ground terminal. between the first nodes. Further, when the plurality of transistors includes a first transistor set and a second transistor set, a sixth node may also be coupled between the first node and the second node and between the first node and the third node, respectively resistance.

It should be noted that the plurality of transistors described above may be triodes or heterojunction bipolar transistors (heterojunction bipolar transistor, HBT), and the types of transistors shown in FIGS. 6-13 are only examples. It is not intended to limit the embodiment of this application.

In the embodiment of the present application, the power unit in which different transistors are coupled with resistors of different resistances (hereinafter referred to as unbalanced ballast resistor design) provided herein is coupled with the ballast resistors of different transistors with the same resistance as shown in FIG. 4 (hereinafter referred to as The base currents of transistors located at the same position in the power unit called equal ballast resistance design) were compared, as shown in Table 1 below. As an embodiment of the present application, it is not limited to the following specific parameter values. In Table 1, the current (Pin=-10dB) represents the base current of the transistor when the input signal power is -10dB, and the current (Pin@P1dB=16dB) represents the base current of the transistor when the output power is equal to 16dB.

Table 1

It can be seen from the above table 1 that: in the case of no temperature difference between the multiple transistors, the base currents of the multiple transistors in the power unit designed with equal ballast resistors are equal, and the base currents of the multiple transistors in the power unit designed with unbalanced ballast resistors are the same. The base currents of each transistor decrease sequentially from the middle position to the outermost position. When the multiple transistors have a temperature difference, the base currents of the multiple transistors in the power unit designed with equal ballast resistors increase sequentially from the middle position to the outermost position and the difference is large, and the unbalanced ballast resistor design The base currents of the plurality of transistors in the power unit have a small difference from the middle position to the outermost position.

In addition, in the embodiment of the present application, the output power Pout, total efficiency PAE, and gain (gain, G) of the power unit designed with unbalanced ballast resistance and the power unit designed with equal ballast resistance under different input signal power Pins are also compared. For comparison, specifically as shown in (a), (b) and (c) in FIG. 14 , as an embodiment of the present application, it is not limited to the following specific parameter values. It can be seen from Figure 14 that under the two designs, the output power Pout of the power unit, the total efficiency PAE and the gain (gain, G) changes are consistent, that is, the performance of the power unit designed with unbalanced ballast resistors and equal ballast resistance There is no difference in the performance of the power cells of the resistive design.

In the PA circuit provided by the embodiment of the present application, a ballast resistor with a large resistance value is coupled in series in the DC path of the transistor at the middle position among the plurality of transistors, and a resistance value is coupled in series in the DC path of the transistor at the edge position. Smaller resistance, so that the current is concentrated to the transistors at the edge positions, so that in a high-power scenario, the base currents of the multiple transistors can be further distributed as evenly as possible, so as to reduce the temperature difference between the transistors at different positions, even The temperature difference of the plurality of transistors is obtained to be small, thereby reducing the reliability risk of the PA circuit, thereby increasing the service life of the entire PA circuit.

Based on this, an embodiment of the present application further provides a radio frequency circuit, where the radio frequency circuit includes a PA circuit, where the PA circuit is any one of the PA circuits provided above. Optionally, the radio frequency circuit may also include a first low-pass filter, a first mixer, and a transmit filter, the input of the transmit filter is coupled to the output of the PA circuit, and the input of the first mixer Coupled to the input of the PA circuit, the input of the first mixer is coupled to the output of the first low-pass filter. Optionally, the radio frequency circuit also includes a receiving channel, the receiving channel includes a second low-pass filter, a second mixer, a low-noise amplifier and a receiving filter, the output of the receiving filter is connected to the input of the low-noise amplifier The output terminal of the low noise amplifier is coupled to the input terminal of the second mixer, and the output terminal of the second mixer is coupled to the input terminal of the second low-pass filter. For example, the structure of the radio frequency circuit may be as shown in FIG. 3 above. The embodiment of the present application does not limit the specific structure of the radio frequency circuit.

In another aspect of the present application, a communication device is also provided. The communication device includes a radio frequency circuit and an antenna, and the radio frequency circuit includes any one of the PA circuits provided above. In an example, the radio frequency circuit is the radio frequency circuit shown in FIG. 3 , and the antenna is coupled to the transmit filter and/or the receive filter. Optionally, the communication device may further include a processor, a memory, and the like. For example, the structure of the communication device may be as shown in FIG. 2 above. The embodiment of the present application does not limit the specific structure of the communication device.

It should be noted that, for the relevant descriptions about the PA circuit in the radio frequency circuit and the communication device provided above, reference may be made to the corresponding description in the PA circuit provided above, and the embodiments of the present application will not repeat them here.

Finally, it should be noted that: the above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto, and any changes or replacements within the technical scope disclosed in the application shall be covered by this application. within the scope of the application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (17)

A power amplifier circuit, characterized in that the power amplifier includes: a power unit having an input terminal, a bias terminal and an output terminal; The power unit includes: a plurality of transistors, the plurality of transistors include a first transistor and a second transistor; the base/gate of the first transistor is coupled to the input terminal through a first capacitor, and is coupled to the input terminal through a first resistor Coupled with the bias terminal, the base/gate of the second transistor is coupled with the input terminal through a second capacitor, coupled with the bias terminal through a second resistor, the first transistor and the The collector/drain of the second transistor is coupled to the output terminal, the emitters/sources of the first transistor and the second transistor are coupled to the ground terminal, and the first resistor and the second resistor The resistance values are different. The circuit according to claim 1, wherein the plurality of transistors further comprise: a third transistor, the base/gate of the third transistor is coupled to the input terminal through a third capacitance, and the third transistor is coupled to the input terminal through a third A resistor is coupled to the bias terminal, a collector/drain of the third transistor is coupled to the output terminal, and an emitter/source of the third transistor is coupled to a ground terminal; The third transistor is disposed on a side of the second transistor away from the first transistor, and the resistance of the second resistor is greater than the resistance of the first resistor. The circuit according to claim 2, wherein the resistance of the third resistor is equal to the resistance of the first resistor. The circuit according to claim 2, wherein the power unit further comprises a fourth transistor, the base/gate of the fourth transistor is coupled to the input terminal through a fourth capacitor, and is connected to the input terminal through a fourth resistor. The bias terminal is coupled, the collector/drain of the fourth transistor is coupled to the output terminal, and the emitter/source of the fourth transistor is coupled to a ground terminal; The fourth transistor is disposed on a side of the third transistor away from the second transistor, and the resistance of the fourth resistor is smaller than the resistance of the second resistor. The circuit according to claim 4, wherein the resistance of the second resistor is equal to the resistance of the third resistor. The circuit according to claim 4 or 5, characterized in that the resistance of the fourth resistor is smaller than the resistance of the third resistor. The circuit according to any one of claims 4-6, wherein the resistance value of the fourth resistor is equal to the resistance value of the first resistor. The circuit according to any one of claims 1-7, wherein the power unit further comprises: a capacitor connected in parallel with a resistor correspondingly coupled to a base/gate of each transistor in the plurality of transistors. The circuit according to any one of claims 1-7, wherein the power unit further comprises: an RC circuit connected in parallel with a resistance coupled to the base/gate of each transistor in the plurality of transistors, The RC circuit includes a capacitor and a resistor in series. The circuit according to any one of claims 1-9, wherein the power unit further comprises: a fifth resistor; The fifth resistor is coupled between the bias terminal and a first node, and the first node is a coupling point of resistors to which bases/gates of the plurality of transistors are correspondingly coupled. The circuit according to claim 10, wherein the plurality of transistors comprises a first set of transistors and a second set of transistors, each set of transistors comprises at least two adjacent transistors in the plurality of transistors, the The power unit also includes: a sixth resistor; One sixth resistor is respectively coupled between the first node and the second node, and between the first node and the third node, and the second node is the base/ The gate corresponds to a coupling point of coupled resistors, and the third node is the base/gate of the second transistor set corresponds to a coupled point of coupled resistors. The circuit according to any one of claims 1-11, wherein the power unit further includes an inductor, and the collectors/drains of the multiple transistors are also coupled to the power supply terminal through the inductor. The circuit according to any one of claims 1-12, wherein the power unit is a final stage power unit in the power amplifier circuit. The circuit according to claim 13, wherein the power amplifier further comprises a front-stage power unit, an output end of the front-stage power unit is coupled to the input end of the final-stage power unit. A radio frequency circuit, characterized in that the radio frequency circuit includes a transmission channel, and the transmission channel includes a power amplifier circuit according to any one of claims 1-13, a first low-pass filter, and a first mixer and a transmit filter, the input of the transmit filter is coupled to the output of the power amplifier circuit, the input of the first mixer is coupled to the input of the power amplifier circuit, and the first mixer The input end of the frequency converter is coupled to the output end of the first low-pass filter. The radio frequency circuit according to claim 15, wherein the radio frequency circuit further comprises a receiving channel, and the receiving channel comprises a second low-pass filter, a second mixer, a low noise amplifier and a receiving filter, so The output end of the receiving filter is coupled to the input end of the low noise amplifier, the output end of the low noise amplifier is coupled to the input end of the second mixer, and the output end of the second mixer is coupled to the input end of the second mixer. The input end of the second low-pass filter is coupled. A communication device, characterized in that the communication device comprises the radio frequency circuit and the antenna as claimed in claim 16, and the antenna is coupled to the transmitting filter and the receiving filter.

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