WO2021151228A1

WO2021151228A1 - Methods and apparatus for adaptive frame headroom

Info

Publication number: WO2021151228A1
Application number: PCT/CN2020/074067
Authority: WO
Inventors: Jun Wang; Bin Zhang; Sheng Fang; Zhuo FU
Original assignee: Qualcomm Incorporated
Priority date: 2020-01-29
Filing date: 2020-01-29
Publication date: 2021-08-05

Abstract

The present disclosure relates to methods and apparatus for frame processing. The apparatus can determine a preset headroom time based on an application rendering duration. The apparatus can also set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold. In some aspects, the application headroom is equal to a difference between a frame rendering completion time and a frame composition time. Additionally, the apparatus can monitor the application rendering duration when the application headroom is set to the preset headroom time. Moreover, the apparatus can adjust a CPU frequency value based on the monitored application rendering duration. The apparatus can also adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold.

Description

METHODS AND APPARATUS FOR ADAPTIVE FRAME HEADROOM

TECHNICAL FIELD

The present disclosure relates generally to processing systems and, more particularly, to one or more techniques for frame or graphics processing.

INTRODUCTION

Computing devices often utilize a graphics processing unit (GPU) to accelerate the rendering of graphical data for display. Such computing devices may include, for example, computer workstations, mobile phones such as so-called smartphones, embedded systems, personal computers, tablet computers, and video game consoles. GPUs execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output a frame. A central processing unit (CPU) may control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern day CPUs are typically capable of concurrently executing multiple applications, each of which may need to utilize the GPU during execution. A device that provides content for visual presentation on a display generally includes a GPU.

Typically, a GPU of a device is configured to perform the processes in a graphics processing pipeline. However, with the advent of wireless communication and smaller, handheld devices, there has developed an increased need for improved graphics processing.

SUMMARY

The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a frame processor, a frame composer, a CPU, a GPU, or a display processor. The apparatus can determine at least one of an application rendering threshold or an application workload threshold. Also, the apparatus can calculate an application workload value. The apparatus can also determine a preset headroom time based on an application rendering duration. Further, the apparatus can set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold. In some aspects, the application headroom can be equal to a difference between a frame rendering completion time and a frame composition time. The apparatus can also increase a buffer queue counter of a buffer queue at the frame rendering completion time. Also, the apparatus can decrease the buffer queue counter of the buffer queue at the frame composition time. Additionally, the apparatus can monitor the application rendering duration when the application headroom is set to the preset headroom time. Moreover, the apparatus can adjust a CPU frequency value based on the monitored application rendering duration. The apparatus can also adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold. The apparatus can also increase the CPU frequency value or decrease the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold. The apparatus can also decrease the CPU frequency value or increase the preset headroom time when the monitored application rendering duration is less than the application rendering threshold. The apparatus can also adjust at least one of the frame rendering completion time or the frame composition time.

The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram that illustrates an example content generation system in accordance with one or more techniques of this disclosure.

FIG. 2 illustrates an example GPU in accordance with one or more techniques of this disclosure.

FIG. 3 illustrates an example timing diagram in accordance with one or more techniques of this disclosure.

FIG. 4 illustrates an example timing diagram in accordance with one or more techniques of this disclosure.

FIG. 5 illustrates an example flow diagram in accordance with one or more techniques of this disclosure.

FIG. 6 illustrates an example timing diagram in accordance with one or more techniques of this disclosure.

FIG. 7 illustrates an example timing diagram in accordance with one or more techniques of this disclosure.

FIG. 8 illustrates an example flowchart of an example method in accordance with one or more techniques of this disclosure.

DETAILED DESCRIPTION

Some applications or games can experience buffer accumulation, i.e., multiple frames are stored in the buffer after rendering and before being consumed, which can result in an increased touch latency. If multiple buffers are accumulated, then the touch response time can be further impacted. During this time, the buffer may accumulate and not decrease until the frame is consumed or executed. Also, the frame headroom can be the time between when the buffer is queued and the buffer is consumed. The headroom can also be an indication of the possibility of janks and/or be a determining factor in the touch response time or FPS. An inconsistent headroom can result in an unpredictable or inconsistent touch response time or FPS. Aspects of the present disclosure can set the headroom to a stable or preset value, e.g., in order to obtain an improved balance of FPS and touch response time. In order to do so, the present disclosure can include a preset headroom time, a frequency regulator, and/or an adaptive preset headroom adjustment. Aspects of the present disclosure can also utilize an adaptive preset headroom to reduce the touch latency or the touch response time while not affecting the FPS and/or the amount of janks experienced. Additionally, in some instances, the present disclosure can decrease or scale down the CPU frequency, e.g., in order to make the application running time match the headroom. By doing so, aspects of the present disclosure can save power.

Various aspects of systems, apparatuses, computer program products, and methods are described more fully hereinafter with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of this disclosure is intended to cover any aspect of the systems, apparatuses, computer program products, and methods disclosed herein, whether implemented independently of, or combined with, other aspects of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method which is practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of a claim.

Although various aspects are described herein, many variations and permutations of these aspects fall within the scope of this disclosure. Although some potential benefits and advantages of aspects of this disclosure are mentioned, the scope of this disclosure is not intended to be limited to particular benefits, uses, or objectives. Rather, aspects of this disclosure are intended to be broadly applicable to different wireless technologies, system configurations, networks, and transmission protocols, some of which are illustrated by way of example in the figures and in the following description. The detailed description and drawings are merely illustrative of this disclosure rather than limiting, the scope of this disclosure being defined by the appended claims and equivalents thereof.

Several aspects are presented with reference to various apparatus and methods. These apparatus and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, and the like (collectively referred to as “elements” ) . These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.

By way of example, an element, or any portion of an element, or any combination of elements may be implemented as a “processing system” that includes one or more processors (which may also be referred to as processing units) . Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs) , general purpose GPUs (GPGPUs) , central processing units (CPUs) , application processors, digital signal processors (DSPs) , reduced instruction set computing (RISC) processors, systems-on-chip (SOC) , baseband processors, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , programmable logic devices (PLDs) , state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure. One or more processors in the processing system may execute software. Software can be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software components, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. The term application may refer to software. As described herein, one or more techniques may refer to an application, i.e., software, being configured to perform one or more functions. In such examples, the application may be stored on a memory, e.g., on-chip memory of a processor, system memory, or any other memory. Hardware described herein, such as a processor may be configured to execute the application. For example, the application may be described as including code that, when executed by the hardware, causes the hardware to perform one or more techniques described herein. As an example, the hardware may access the code from a memory and execute the code accessed from the memory to perform one or more techniques described herein. In some examples, components are identified in this disclosure. In such examples, the components may be hardware, software, or a combination thereof. The components may be separate components or sub-components of a single component.

Accordingly, in one or more examples described herein, the functions described may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored on or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise a random access memory (RAM) , a read-only memory (ROM) , an electrically erasable programmable ROM (EEPROM) , optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of the aforementioned types of computer-readable media, or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.

In general, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices, improving the rendering of graphical content, and/or reducing the load of a processing unit, i.e., any processing unit configured to perform one or more techniques described herein, such as a GPU. For example, this disclosure describes techniques for graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.

As used herein, instances of the term “content” may refer to “graphical content, ” “image, ” and vice versa. This is true regardless of whether the terms are being used as an adjective, noun, or other parts of speech. In some examples, as used herein, the term “graphical content” may refer to a content produced by one or more processes of a graphics processing pipeline. In some examples, as used herein, the term “graphical content” may refer to a content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term “graphical content” may refer to a content produced by a graphics processing unit.

In some examples, as used herein, the term “display content” may refer to content generated by a processing unit configured to perform displaying processing. In some examples, as used herein, the term “display content” may refer to content generated by a display processing unit. Graphical content may be processed to become display content. For example, a graphics processing unit may output graphical content, such as a frame, to a buffer (which may be referred to as a framebuffer) . A display processing unit may read the graphical content, such as one or more frames from the buffer, and perform one or more display processing techniques thereon to generate display content. For example, a display processing unit may be configured to perform composition on one or more rendered layers to generate a frame. As another example, a display processing unit may be configured to compose, blend, or otherwise combine two or more layers together into a single frame. A display processing unit may be configured to perform scaling, e.g., upscaling or downscaling, on a frame. In some examples, a frame may refer to a layer. In other examples, a frame may refer to two or more layers that have already been blended together to form the frame, i.e., the frame includes two or more layers, and the frame that includes two or more layers may subsequently be blended.

FIG. 1 is a block diagram that illustrates an example content generation system 100 configured to implement one or more techniques of this disclosure. The content generation system 100 includes a device 104. The device 104 may include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the device 104 may be components of an SOC. The device 104 may include one or more components configured to perform one or more techniques of this disclosure. In the example shown, the device 104 may include a processing unit 120, and a system memory 124. In some aspects, the device 104 can include a number of optional components, e.g., a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. Reference to the display 131 may refer to the one or more displays 131. For example, the display 131 may include a single display or multiple displays. The display 131 may include a first display and a second display. The first display may be a left-eye display and the second display may be a right-eye display. In some examples, the first and second display may receive different frames for presentment thereon. In other examples, the first and second display may receive the same frames for presentment thereon. In further examples, the results of the graphics processing may not be displayed on the device, e.g., the first and second display may not receive any frames for presentment thereon. Instead, the frames or graphics processing results may be transferred to another device. In some aspects, this can be referred to as split-rendering.

The processing unit 120 may include an internal memory 121. The processing unit 120 may be configured to perform graphics processing, such as in a graphics processing pipeline 107. In some examples, the device 104 may include a display processor, such as the display processor 127, to perform one or more display processing techniques on one or more frames generated by the processing unit 120 before presentment by the one or more displays 131. The display processor 127 may be configured to perform display processing. For example, the display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by the processing unit 120. The one or more displays 131 may be configured to display or otherwise present frames processed by the display processor 127. In some examples, the one or more displays 131 may include one or more of: a liquid crystal display (LCD) , a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head-mounted display, or any other type of display device.

Memory external to the processing unit 120, such as system memory 124, may be accessible to the processing unit 120. For example, the processing unit 120 may be configured to read from and/or write to external memory, such as the system memory 124. The processing unit 120 may be communicatively coupled to the system memory 124 over a bus. In some examples, the processing unit 120 may be communicatively coupled to each other over the bus or a different connection.

The internal memory 121 or the system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, internal memory 121 or the system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM) , electrically erasable programmable ROM (EEPROM) , flash memory, a magnetic data media or an optical storage media, or any other type of memory.

The internal memory 121 or the system memory 124 may be a non-transitory storage medium according to some examples. The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. However, the term “non-transitory” should not be interpreted to mean that internal memory 121 or the system memory 124 is non-movable or that its contents are static. As one example, the system memory 124 may be removed from the device 104 and moved to another device. As another example, the system memory 124 may not be removable from the device 104.

The processing unit 120 may be a central processing unit (CPU) , a graphics processing unit (GPU) , a general purpose GPU (GPGPU) , or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unit 120 may be integrated into a motherboard of the device 104. In some examples, the processing unit 120 may be present on a graphics card that is installed in a port in a motherboard of the device 104, or may be otherwise incorporated within a peripheral device configured to interoperate with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs) , field programmable gate arrays (FPGAs) , arithmetic logic units (ALUs) , digital signal processors (DSPs) , discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuitry, or any combinations thereof. If the techniques are implemented partially in software, the processing unit 120 may store instructions for the software in a suitable, non-transitory computer-readable storage medium, e.g., internal memory 121, and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered to be one or more processors.

In some aspects, the content generation system 100 can include an optional communication interface 126. The communication interface 126 may include a receiver 128 and a transmitter 130. The receiver 128 may be configured to perform any receiving function described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information, e.g., eye or head position information, rendering commands, or location information, from another device. The transmitter 130 may be configured to perform any transmitting function described herein with respect to the device 104. For example, the transmitter 130 may be configured to transmit information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving function and/or transmitting function described herein with respect to the device 104.

Referring again to FIG. 1, in certain aspects, the graphics processing pipeline 107 may include a determination component 198 configured to determine at least one of the application rendering threshold or an application workload threshold. The determination component 198 can also be configured to calculate an application workload value. The determination component 198 can also be configured to determine a preset headroom time based on an application rendering duration. The determination component 198 can also be configured to set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold. In some aspects, the application headroom can be equal to a difference between a frame rendering completion time and a frame composition time. The determination component 198 can also be configured to increase a buffer queue counter of a buffer queue at the frame rendering completion time. The determination component 198 can also be configured to decrease the buffer queue counter of the buffer queue at the frame composition time. The determination component 198 can also be configured to monitor the application rendering duration when the application headroom is set to the preset headroom time. The determination component 198 can also be configured to adjust a CPU frequency value based on the monitored application rendering duration. The determination component 198 can also be configured to adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold. The determination component 198 can also be configured to increase the CPU frequency value or decrease the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold. The determination component 198 can also be configured to decrease the CPU frequency value or increase the preset headroom time when the monitored application rendering duration is less than the application rendering threshold. The determination component 198 can also be configured to adjust at least one of the frame rendering completion time or the frame composition time.

As described herein, a device, such as the device 104, may refer to any device, apparatus, or system configured to perform one or more techniques described herein. For example, a device may be a server, a base station, user equipment, a client device, a station, an access point, a computer, e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation, or a mainframe computer, an end product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device, e.g., a portable video game device or a personal digital assistant (PDA) , a wearable computing device, e.g., a smart watch, an augmented reality device, or a virtual reality device, a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an in-car computer, any mobile device, any device configured to generate graphical content, or any device configured to perform one or more techniques described herein. Processes herein may be described as performed by a particular component (e.g., a GPU) , but, in further embodiments, can be performed using other components (e.g., a CPU) , consistent with disclosed embodiments.

GPUs can process multiple types of data or data packets in a GPU pipeline. For instance, in some aspects, a GPU can process two types of data or data packets, e.g., context register packets and draw call data. A context register packet can be a set of global state information, e.g., information regarding a global register, shading program, or constant data, which can regulate how a graphics context will be processed. For example, context register packets can include information regarding a color format. In some aspects of context register packets, there can be a bit that indicates which workload belongs to a context register. Also, there can be multiple functions or programming running at the same time and/or in parallel. For example, functions or programming can describe a certain operation, e.g., the color mode or color format. Accordingly, a context register can define multiple states of a GPU.

Context states can be utilized to determine how an individual processing unit functions, e.g., a vertex fetcher (VFD) , a vertex shader (VS) , a shader processor, or a geometry processor, and/or in what mode the processing unit functions. In order to do so, GPUs can use context registers and programming data. In some aspects, a GPU can generate a workload, e.g., a vertex or pixel workload, in the pipeline based on the context register definition of a mode or state. Certain processing units, e.g., a VFD, can use these states to determine certain functions, e.g., how a vertex is assembled. As these modes or states can change, GPUs may need to change the corresponding context. Additionally, the workload that corresponds to the mode or state may follow the changing mode or state.

FIG. 2 illustrates an example GPU 200 in accordance with one or more techniques of this disclosure. As shown in FIG. 2, GPU 200 includes command processor (CP) 210, draw call packets 212, VFD 220, VS 222, vertex cache (VPC) 224, triangle setup engine (TSE) 226, rasterizer (RAS) 228, Z process engine (ZPE) 230, pixel interpolator (PI) 232, fragment shader (FS) 234, render backend (RB) 236, L2 cache (UCHE) 238, and system memory 240. Although FIG. 2 displays that GPU 200 includes processing units 220-238, GPU 200 can include a number of additional processing units. Additionally, processing units 220-238 are merely an example and any combination or order of processing units can be used by GPUs according to the present disclosure. GPU 200 also includes command buffer 250, context register packets 260, and context states 261.

As shown in FIG. 2, a GPU can utilize a CP, e.g., CP 210, or hardware accelerator to parse a command buffer into context register packets, e.g., context register packets 260, and/or draw call data packets, e.g., draw call packets 212. The CP 210 can then send the context register packets 260 or draw call data packets 212 through separate paths to the processing units or blocks in the GPU. Further, the command buffer 250 can alternate different states of context registers and draw calls. For example, a command buffer can be structured in the following manner: context register of context N, draw call (s) of context N, context register of context N+1, and draw call (s) of context N+1.

Aspects of mobile devices or smart phones can utilize buffer mechanisms to distribute or coordinate a buffer between an application rendering side of the device, e.g., a GPU or CPU, and a display or composition side of the device, e.g., a display engine. For instance, some mobile devices can utilize a buffer queue mechanism to distribute or coordinate a buffer between an application rendering side and a display or composition side, which can include a buffer compositor, e.g., a surface flinger (SF) or hardware composer (HWC) . In some aspects, the application rendering side can be referred to as a producer, while the display or composition side can be referred to as a consumer. Additionally, a synchronization divider or fence can be used to synchronize content between the application rendering side and the display or composition side. Accordingly, a fence can be referred to as a synchronization divider, and vice versa.

A variety of factors can be performance indicators for display processing between an application rendering side and a display or composition side. For instance, frames per second (FPS) and janks, i.e., delays or pauses in frame rendering or composition, are key performance indicators (KPI) . In some aspects, a jank can be a perceptible pause in the rendering of a software application’s user interface. Both FPS and janks are KPIs in game performance and/or device display capability. In some applications, janks can be the result of a number of factors, such as slow operations or poor interface design. In some instances, a jank can also correspond to a change in the refresh rate of the display at the device. Janks are important to gaming applications because if the display fresh latency is not stable, this can impact the user experience. Accordingly, some aspects of the mobile gaming industry are focused on reducing janks and increasing FPS.

Application can run at a variety of different FPS modes. In some aspects, applications can run at 30 FPS mode. In other aspects, applications can run at different FPS modes, e.g., 20 or 60 FPS. Aspects of the present disclosure can include a current frame latency time, which can refer to the time difference between when a previous frame completes being displayed and when a current frame completes being displayed. The frame latency time can also refer to the time between successive refreshing frames. The frame latency time can also be based on a frame rate. For instance, the frame latency time for each frame can be 33.33 ms (e.g., corresponding to 30 FPS) , 16.67 ms (e.g., corresponding to 60 FPS) , or 50 ms (e.g., corresponding to 20 FPS) .

Jank reduction technology can be utilized in a number of different scenarios. For instance, slow frames, e.g., frames under 30 FPS, may optimize janks reduction differently than fast frames. For example, there may be frame pacing issues for frames under 30 FPS, which may utilize a different janks reduction technology than faster frames. In some aspects, different mechanisms or designs may have the ability to detect janks. Also, once janks are detected, other mechanisms can be triggered. For example, a frame composer or surface flinger (SF) mechanism can be directly triggered to bypass a vertical synchronization (VSYNC) time in order to avoid janks. In some aspects, the threshold of the janks reduction technology may be platform dependent, which may need certain tuning efforts.

As indicated herein, if a frame takes too long to be rendered and is not ready for transmission to a display at a scheduled VSYNC time, this can result in a delayed frame display time and a corresponding jank. As such, janks can be the result of a delayed frame rendering. In some aspects, a frame buffer or buffer queue can queue frames waiting to be sent to the display. If a frame takes too long to be rendered, then the frame may not be consumed or sent to the buffer queue by the scheduled VSYNC time.

In some aspects, a frame composer or SF mechanism can consume the frame or help send the frame buffer to the display. If the renderer takes too long to render a frame, then the frame composer or SF mechanism may be delayed in consuming the frame, so the frame will be delayed in being transmitted to the display. As such, a delay in rendering can cause a resulting delay in frame consumption or display transmission. In some aspects, if a frame has not finished rendering by a scheduled VSYNC time, then the frame will not be consumed by the composer until the next VSYNC time. In these aspects, if there are no frames in the buffer queue, then the frame composer or SF mechanism may not be triggered to consume the frame. As the frame is not consumed, this can result in a jank.

A number of issues are important to mobile applications and games, e.g., FPS and touch response time. In some aspects, buffer mechanisms can be utilized to solve these issues with application performance. For instance, multiple buffer mechanisms can be utilized in order to ease jank issues. However, some multiple buffers, e.g., triple buffer mechanisms, may delay the touch response if the buffer is accumulated. Utilizing other buffers, e.g., double buffer mechanisms, can benefit the touch response time, but there may be an obvious FPS regression. As both FPS and touch response time are important issues, they should be balanced in order to achieve an improved application experience.

Frame headroom is the duration between when an application finishes rendering a frame and a frame composer or surface flinger (SF) mechanism consumes the frame. In some aspects, when the application finishes rendering a frame, the frame can be queued in the buffer queue and the buffer queue can increase. Also, when the frame composer or SF mechanism consumes the frame, the buffer queue can decrease. So the headroom can be the time between when the buffer is queued and the buffer is consumed, i.e., the frame composer consumes the frame from the buffer queue. Headroom can also be a direct indicator of the possibility of janks and a determining factor in the touch response time.

FIG. 3 illustrates timing diagram 300 in accordance with one or more techniques of this disclosure. As shown in FIG. 3, diagram 300 includes a number of VSYNC times, a buffer counter, buffer queue times, frame consumption times, and a number of different headrooms. FIG. 3 displays that headroom 1 is of average duration, headroom 2 is shorter than headroom 1, and headroom 3 is of a longer duration, e.g., longer than one VSYNC period. As indicated in FIG. 3, in some instances, a longer headroom can result in a longer touch response time. As mentioned above, the headroom is the time between when the application finishes rendering the frame and the frame composer consumes the frame, which can correspond to the touch response time and can be indicative of a jank occurrence.

Some applications or games can experience buffer accumulation. Once the buffer is accumulated, i.e., a frame is stored in the buffer after rendering and before being consumed, then an increased touch latency may be introduced. As indicated above, there can be multiple buffers for frame rendering. For example, if multiple buffers are accumulated, then the touch response time can be impacted.

FIG. 4 illustrates timing diagram 400 in accordance with one or more techniques of this disclosure. As shown in FIG. 4, timing diagram 400 includes a number of frames, e.g., frame N-1, frame N, frame N+1, frame N+2, frame N+3, and frame N+4, and a number of VSYNC time periods. FIG. 4 also displays a game renderer, a GPU, a frame composer or SurfaceFlinger mechanism, a display or display engine, a VSYNC timing mechanism, and a buffer status. The display or display engine can also be referred to as other terms, such as a display buffer.

In some aspects of FIG. 4, the buffer status is accumulated, e.g., there are two or more queued buffers, so the buffer status value is two or more. This can occur because the previous frame has not yet been consumed or executed by the SF or frame composer. If the buffer is accumulated, the SF or frame composer may compose the previous buffer first, and the current buffer will be pending for one VSYNC cycle before it is composed. For example, the SF will consume frame N-1 first, and then consume frame N after this. So frame N will be pending for one VSYNC cycle while frame N-1 is consumed. When both frame N-1 and frame N are accumulated in the buffer queue, the buffer status value or buffer counter is two.

As further indicated in FIG. 4, the touch latency can be delayed due to the buffer accumulation, e.g., two or more frames are accumulated in the buffer queue. Also, the time from when the frame begins rendering to the time the frame stops being displayed can be four or five VSYNC cycles. During this time, the buffer may accumulate and not decrease until the SF or frame composer consumes or executes the frame. The SF or frame composer can consume one frame at the start of the VSYNC period, and the buffer queue can be decreased when the SF or frame composer consumes the frame.

As indicated above, the headroom can be the time between when the buffer is queued and the buffer is consumed, i.e., the frame composer consumes the frame from the buffer queue. The headroom can also be an indication of a jank occurrence. Also, the headroom can be a determining factor in the touch response time and/or FPS. An inconsistent headroom can result in an unpredictable or inconsistent touch response time or FPS. In order to obtain an improved balance of FPS and the touch response time, there is a present need for a consistent frame headroom.

Aspects of the present disclosure can set the headroom to a stable or preset value, e.g., in order to obtain an improved balance of FPS and touch response time. In order to do so, aspects of the present disclosure can include a number of different mechanisms. For instance, the present disclosure can include a preset headroom time or value, a frequency regulator, and/or an adaptive preset headroom adjustment. In some aspects, the preset headroom time or timestamp can be a moment in time and/or the preset headroom or preset headroom value can be a duration. The preset headroom or preset headroom value can mean the duration from the preset headroom time or timestamp to the time when the buffer is consumed. In some instances, decreasing the preset headroom time or timestamp can correspond to increasing the preset headroom or preset headroom value.

In some aspects, the present disclosure can include a preset headroom and/or regulate the frequency, e.g., the CPU frequency. For instance, if an application running time is less than a target display period, aspects of the present disclosure can postpone a queueBuffer operation and/or utilize a preset headroom time or value. By doing so, the buffer accumulation may be avoided. Also, the queueBuffer mechanism can monitor the status of a buffer in the buffer queue. As indicated herein, a queued status of the buffer can mean that the buffer is ready, so a frame is ready to be consumed. So the buffer queue value can be the amount of frames that are currently stored in the buffer queue and ready to be consumed. When a frame is rendered, it can be sent to the buffer queue, and the SF or frame composer can be notified that the buffer is queued and ready to be consumed.

Additionally, in some instances, the present disclosure can decrease or scale down the CPU frequency, e.g., in order to make the application running time match the headroom. By doing so, aspects of the present disclosure can save power. The application running time can correspond to an application rendering time. If the application running time is longer than a target display period, aspects of the present disclosure can increase or boost the CPU frequency to increase the FPS and match the preset headroom. By doing so, the present disclosure can reduce the amount of janks experienced. The preset headroom can also provide the ability to compensate any delayed or missing time.

Aspects of the present disclosure can also include an adaptive preset headroom adjustment. For instance, the preset headroom can be adapted by monitoring the application or game workload, e.g., to obtain an improved balance between a desired FPS and the touch response time. For example, the preset headroom time or value can be between zero and one VSYNC periods in order to avoid buffer accumulation. If the application workload is high, the present disclosure can increase the preset headroom to maintain the desired FPS. If the application workload is low, the present disclosure can reduce the preset headroom in order to obtain an improved touch response time.

FIG. 5 illustrates flow diagram 500 in accordance with one or more techniques of this disclosure. As shown in FIG. 5, diagram 500 includes a binder thread and a monitor thread. In the binder thread, a preset headroom can be configured. Next, the present disclosure can wait for a queueBuffer mechanism and then apply the queueBuffer mechanism. If the time is ahead of a preset headroom, then the queueBuffer mechanism can be delayed for signaling. Also, the queueBuffer mechanism can be woken up by a timer.

In the monitor thread, if a buffer is queued when a timer times out, then the CPU frequency can be decreased or scaled down. If the buffer is not queued when a timer times out, then the CPU frequency can be increased or boosted. Also, an application or game workload can be calculated. If there is a need to adjust the preset headroom based on the application or game workload, then the present disclosure can adjust the preset headroom.

As shown in FIG. 5, first the preset headroom can be configured. In some instances, this can delay or postpone the buffer queuing operation. If the buffer is queued, e.g., the application is rendering the frame quickly, the present disclosure can delay the queueBuffer operation. If the buffer queue is mostly queued faster than the preset headroom time in a long duration statistics cycle, e.g., the application rendering time is fast, then the preset headroom time can be increased. If the buffer queue is queued mostly slower than the preset headroom time in a long duration statistics cycle, e.g., the application rendering time is mostly slow, then the preset headroom time can be decreased.

Also, if the application rendering time is slow, e.g., longer than an application rendering threshold, then the CPU frequency can be increased in order to provide more headroom. If the application rendering time is fast, e.g., shorter than an application rendering threshold, then the CPU frequency can be decreased. So if the buffer queue is being accumulated quickly, then the CPU frequency can be decreased. In addition, if the game workload is small, then not much headroom is needed, so a smaller headroom can be utilized in order to achieve an improved FPS.

As indicated above, aspects of the present disclosure can include a preset headroom. In some aspects, after the headroom is preset, if the queueBuffer mechanism is fast, then the frame queued operation may be delayed until the preset headroom. So aspects of the present disclosure can delay the queueBuffer in order to obtain stable headroom. In some instances, the application or game main thread may also be pending. When this pending thread is finished, the application or game can utilize the latest touch event. In some aspects, this can benefit the touch response time. If the queueBuffer mechanism is slower than expected, then the frame may be queued immediately.

As mentioned herein, if the queueBuffer mechanism is fast, so the frame is queue before the preset headroom time or value, the application or game thread may be delayed and enter a sleep status. By doing so, the frame may not finish queuing immediately. If the queueBuffer is slow, then the frame can finish queuing immediately. So by using a preset headroom, aspects of the present disclosure can reduce the touch response time and/or corresponding jank occurrence. In some instances, the preset headroom can be a constant value. Also, if an application has a reduced workload, then a reduced headroom may be needed.

In some aspects, when using a lock and/or timer in the SurfaceFlinger or frame composer to control the queueBuffer mechanism, the present disclosure can obtain a stable headroom and/or not experience buffer accumulation. So aspects of the present disclosure can utilize a preset headroom to avoid accumulating frames in the buffer queue. In other words, the buffer queue accumulation can be avoided when utilizing a preset headroom.

FIG. 6 illustrates timing diagram 600 in accordance with one or more techniques of this disclosure. As shown in FIG. 6, timing diagram 600 includes a number of frames, e.g., frame N, frame N+1, frame N+2, frame N+3, and frame N+4, and a number of VSYNC time periods. FIG. 6 also displays a game renderer, a GPU, a frame composer or SurfaceFlinger mechanism, a display or display engine, a VSYNC timing mechanism, and a buffer status. The display or display engine can also be referred to as other terms, such as a display buffer.

As displayed in FIG. 6, the present disclosure can reduce the amount of buffer accumulation by utilizing a preset headroom. For example, the buffer queue status is either zero or one, so it does not reach an accumulated status. Moreover, apart from the touch firmware, the time from when the frame begins rendering to the time when the frame finishes displaying can be reduced to three to four VSYNC cycles. Accordingly, aspects of the present disclosure can reduce buffer accumulation and/or decrease the amount of VSYNC cycles.

Aspects of the present disclosure can also reduce or scale down the CPU frequency. Also, if the queueBuffer operation occurs quickly, then the CPU frequency may be decreased in order to increase the application rendering time. Further, by decreasing the CPU frequency, the present disclosure can also save power. So the present disclosure can decrease or scale down the CPU frequency to make application running time longer. By doing so, the amount of frames pending in the buffer queue or the sleep time can be reduced as the queueBuffer mechanism can be closer to the preset headroom time or value.

Additionally, aspects of the present disclosure can increase or boost the CPU frequency. In some aspects, the CPU frequency can be increased when the application or game workload is high. There may be a separate thread to monitor the buffer queue status. If an application or game includes a slow queueBuffer mechanism, i.e., the buffer is not queued when a preset headroom is ready, the present disclosure can boost the CPU frequency to make the application complete rendering more quickly. This can have a number of benefits, e.g., targeting the FPS and/or reducing the amount of janks. So aspects of the present disclosure can increase the CPU frequency to increase the actual headroom and cause the application to finish rendering more quickly. And aspects of the present disclosure can decrease the CPU frequency to decrease the actual headroom and cause the application to finish rendering more slowly.

FIG. 7 illustrates timing diagram 700 in accordance with one or more techniques of this disclosure. As shown in FIG. 7, diagram 700 includes VSYNC time N, VSYNC time N+1, preset headroom 710, preset headroom 720, and preset headroom 730. FIG. 7 displays that aspects of the present disclosure can include an adaptive preset headroom. Aspects of the present disclosure can select a preset headroom time, e.g., preset headroom 710, in order to balance the FPS and the touch response time.

Aspects of the present disclosure can also monitor the application or game workload, and the preset headroom can be adapted based on the application workload. When the application or game workload is low, the present disclosure can reduce the preset headroom, e.g., to preset headroom 720, in order to obtain a better touch response time. When the application or game workload is high, the present disclosure can increase the preset headroom, e.g., to preset headroom 730, in order to obtain a more ideal FPS.

As indicated in FIG. 7, if the application or game workload is high, then the application rendering time will also be high, so there may be more time needed to finish rendering a frame. In some aspects, the frame may be consumed at the next VSYNC time to provide the time necessary to render the frame. Accordingly, adjusting the headroom may correspond to adjusting the frame rendering completion time. So the preset headroom time can be adjusted based on the application or game workload.

As shown in FIGs. 5-7, aspects of the present disclosure can determine at least one of an application rendering threshold or an application workload threshold. Also, aspects of the present disclosure can calculate an application workload value, e.g., calculate a game workload in FIG. 6. Aspects of the present disclosure can also determine a preset headroom time, e.g., preset headroom 710, based on an application rendering duration.

Further, aspects of the present disclosure can set an application headroom to the preset headroom time, e.g., preset headroom 710, when the application rendering duration is less than or greater than an application rendering threshold. In some aspects, the application headroom can be equal to a difference between a frame rendering completion time and a frame composition time. In some instances, the application headroom can be set to the preset headroom time, e.g., preset headroom 710, when the application workload value is less than or greater than an application workload threshold.

Aspects of the present disclosure can also increase a buffer queue counter of a buffer queue, e.g., buffer status in FIG. 6, at the frame rendering completion time. Also, aspects of the present disclosure can decrease the buffer queue counter of the buffer queue, e.g., buffer status in FIG. 6, at the frame composition time. In some aspects, the buffer queue counter can be monitored with a queueBuffer mechanism, e.g., queueBuffer in FIG. 5.

Additionally, aspects of the present disclosure can monitor the application rendering duration when the application headroom is set to the preset headroom time, e.g., preset headroom 710. The monitored application rendering duration can be based on the buffer queue counter, e.g., buffer status in FIG. 6. Moreover, aspects of the present disclosure can adjust a CPU frequency value based on the monitored application rendering duration. Aspects of the present disclosure can also adjust the preset headroom time, e.g., preset headroom 710, when the monitored application rendering duration is less than or greater than the application rendering threshold, e.g., in a long duration statistics cycle. Aspects of the present disclosure can also adjust at least one of the frame rendering completion time or the frame composition time.

Aspects of the present disclosure can also increase the CPU frequency value or decrease the preset headroom time, e.g., to preset headroom 730, when the monitored application rendering duration is greater than or equal to the application rendering threshold. In some aspects, the CPU frequency value can be increased or the preset headroom time can be decreased, e.g., to preset headroom 730, when the monitored application rendering duration is greater than or equal to a vertical synchronization (VSYNC) period. Further, the CPU frequency value can be increased or the preset headroom time can be decreased, e.g., to preset headroom 730, when an application workload value is greater than or equal to an application workload threshold.

Aspects of the present disclosure can also decrease the CPU frequency value or increase the preset headroom time, e.g., to preset headroom 720, when the monitored application rendering duration is less than the application rendering threshold. In some aspects, the CPU frequency value can be decreased or the preset headroom time can be increased, e.g., to preset headroom 720, when the monitored application rendering duration is less than a vertical synchronization (VSYNC) period. Moreover, the CPU frequency value can be decreased or the preset headroom time can be increased, e.g., to preset headroom 720, when an application workload value is less than an application workload threshold.

In some aspects, the frame composition time can be equal to a VSYNC time. Additionally, a frame composer or a surface flinger (SF) mechanism, e.g., SurfaceFlinger in FIG. 6, can consume a frame at the frame composition time. Moreover, the preset headroom time, e.g., preset headroom 710, can be further determined based on an application workload value.

The aforementioned methods and designs of the present disclosure can include a number of benefits or advantages. For instance, the present disclosure can the reduce the touch latency without affecting the application FPS. Some aspects of the present disclosure can result in an FPS or janks that are not affected, while reducing the touch response time. For example, the touch latency or touch response time can be reduced by 14 ms in a 60 Hz device. In some aspects, the touch latency can be equal to the touch firmware delay plus time from when the frame begins rendering to the time when the frame finishes displaying and other latencies. Also, the present designs can reduce the time from when the frame begins rendering to the time when the frame finishes displaying, as well as reduce the touch latency.

As indicated above, aspects of the present disclosure can reduce the time from when the frame begins rendering to the time when the frame finishes displaying and/or reduce the corresponding touch latency. In some instances, the time from when the frame begins rendering to the time when the frame finishes displaying can directly correspond to the touch latency. Additionally, aspects of the present disclosure can reduce the touch latency while not affecting the FPS and the amount of janks. For example, the touch latency can be reduced by an amount of 14 ms, while the FPS and the amount of janks remain approximately the same.

FIG. 8 illustrates an example flowchart 800 of an example method in accordance with one or more techniques of this disclosure. The method may be performed by a frame processor, a frame composer, a display processor, a CPU, a GPU, or an apparatus for frame or graphics processing. At 802, the apparatus can determine at least one of an application rendering threshold or an application workload threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 804, the apparatus can calculate an application workload value, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 806, the apparatus can also determine a preset headroom time based on an application rendering duration, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

At 808, the apparatus can set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In some aspects, the application headroom can be equal to a difference between a frame rendering completion time and a frame composition time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In some instances, the application headroom can be set to the preset headroom time when the application workload value is less than or greater than an application workload threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

At 810, the apparatus can increase a buffer queue counter of a buffer queue at the frame rendering completion time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 810, the apparatus can also decrease the buffer queue counter of the buffer queue at the frame composition time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In some aspects, the buffer queue counter can be monitored with a queueBuffer mechanism, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

At 812, the apparatus can monitor the application rendering duration when the application headroom is set to the preset headroom time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In addition, the monitored application rendering duration can be based on the buffer queue counter, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 814, the apparatus can adjust a CPU frequency value based on the monitored application rendering duration, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 814, the apparatus can also adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. At 816, the apparatus can also adjust at least one of the frame rendering completion time or the frame composition time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

At 818, the apparatus can increase the CPU frequency value or decrease the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In some aspects, the CPU frequency value can be increased or the preset headroom time can be decreased when the monitored application rendering duration is greater than or equal to a vertical synchronization (VSYNC) period, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. Further, the CPU frequency value can be increased or the preset headroom time can be decreased when an application workload value is greater than or equal to an application workload threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

At 820, the apparatus can decrease the CPU frequency value or increase the preset headroom time when the monitored application rendering duration is less than the application rendering threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. In some aspects, the CPU frequency value can be decreased or the preset headroom time can be increased when the monitored application rendering duration is less than a vertical synchronization (VSYNC) period, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. Moreover, the CPU frequency value can be decreased or the preset headroom time can be increased when an application workload value is less than an application workload threshold, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

In some aspects, the frame composition time can be equal to a VSYNC time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. Additionally, a frame composer or a surface flinger (SF) mechanism can consume a frame at the frame composition time, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7. Moreover, the preset headroom time can be further determined based on an application workload value, as described in connection with the examples in FIGs. 3, 4, 5, 6, and 7.

In one configuration, a method or apparatus for graphics processing is provided. The apparatus may be a frame processor, a frame composer, a display processor, a CPU, a GPU, a display engine, or some other processor that can perform frame or graphics processing. In one aspect, the apparatus may be the processing unit 120 within the device 104, or may be some other hardware within device 104 or another device. The apparatus may include means for determining a preset headroom time based on an application rendering duration. The apparatus may also include means for setting an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold. The apparatus may also include means for monitoring the application rendering duration when the application headroom is set to the preset headroom time. The apparatus may also include means for adjusting a central processing unit (CPU) frequency value based on the monitored application rendering duration. The apparatus may also include means for adjusting the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold. The apparatus may also include means for increasing the CPU frequency value or decreasing the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold. The apparatus may also include means for decreasing the CPU frequency value or increasing the preset headroom time when the monitored application rendering duration is less than the application rendering threshold. The apparatus may also include means for calculating an application workload value. The apparatus may also include means for adjusting at least one of the frame rendering completion time or the frame composition time. The apparatus may also include means for determining at least one of the application rendering threshold or an application workload threshold. The apparatus may also include means for increasing a buffer queue counter of a buffer queue at the frame rendering completion time. The apparatus may also include means for decreasing the buffer queue counter of the buffer queue at the frame composition time.

The subject matter described herein can be implemented to realize one or more benefits or advantages. For instance, the described graphics processing techniques can be used by frame processors, frame composers, display processors, DPUs, display engines, GPUs, CPUs, or other processors to enable adaptive preset headroom. This can also be accomplished at a low cost compared to other frame or graphics processing techniques. Moreover, the frame or graphics processing techniques herein can improve or speed up data processing or execution. Further, the frame or graphics processing techniques herein can improve a CPU’s or GPU’s resource or data utilization and/or resource efficiency. Additionally, the frame or graphics processing techniques herein can utilize adaptive preset headroom to reduce the touch latency while not affecting the FPS and/or the amount of janks experienced.

Further disclosure is included in the Appendix.

In accordance with this disclosure, the term “or” may be interrupted as “and/or” where context does not dictate otherwise. Additionally, while phrases such as “one or more” or “at least one” or the like may have been used for some features disclosed herein but not others, the features for which such language was not used may be interpreted to have such a meaning implied where context does not dictate otherwise.

In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term “processing unit” has been used throughout this disclosure, such processing units may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique described herein, or other module is implemented in software, the function, processing unit, technique described herein, or other module may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media may include computer data storage media or communication media including any medium that facilitates transfer of a computer program from one place to another. In this manner, computer-readable media generally may correspond to (1) tangible computer-readable storage media, which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, . Disk and disc, as used herein, includes compact disc (CD) , laser disc, optical disc, digital versatile disc (DVD) , floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.

The code may be executed by one or more processors, such as one or more digital signal processors (DSPs) , general purpose microprocessors, application specific integrated circuits (ASICs) , arithmetic logic units (ALUs) , field programmable logic arrays (FPGAs) , or other equivalent integrated or discrete logic circuitry. Accordingly, the term “processor, ” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. Also, the techniques could be fully implemented in one or more circuits or logic elements.

The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs, e.g., a chip set. Various components, modules or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need realization by different hardware units. Rather, as described above, various units may be combined in any hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.

Various examples have been described. These and other examples are within the scope of the following claims.

Claims

A method of frame processing, comprising:

determining a preset headroom time based on an application rendering duration;

setting an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold, wherein the application headroom is equal to a difference between a frame rendering completion time and a frame composition time;

monitoring the application rendering duration when the application headroom is set to the preset headroom time;

adjusting a central processing unit (CPU) frequency value based on the monitored application rendering duration; and

adjusting the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold.
The method of claim 1, wherein adjusting at least one of the CPU frequency value or the preset headroom time comprises at least one of:

increasing the CPU frequency value or decreasing the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold.
The method of claim 2, wherein the CPU frequency value is increased or the preset headroom time is decreased when the monitored application rendering duration is greater than or equal to a vertical synchronization (VSYNC) period.
The method of claim 2, wherein the CPU frequency value is increased or the preset headroom time is decreased when an application workload value is greater than or equal to an application workload threshold.
The method of claim 1, wherein adjusting at least one of the CPU frequency value or the preset headroom time comprises at least one of:

decreasing the CPU frequency value or increasing the preset headroom time when the monitored application rendering duration is less than the application rendering threshold.
The method of claim 5, wherein the CPU frequency value is decreased or the preset headroom time is increased when the monitored application rendering duration is less than a vertical synchronization (VSYNC) period.
The method of claim 5, wherein the CPU frequency value is decreased or the preset headroom time is increased when an application workload value is less than an application workload threshold.
The method of claim 1, further comprising:

calculating an application workload value;

wherein the application headroom is set to the preset headroom time when the application workload value is less than or greater than an application workload threshold.
The method of claim 1, wherein adjusting the preset headroom time comprises:

adjusting at least one of the frame rendering completion time or the frame composition time.
The method of claim 1, wherein the frame composition time is equal to a vertical synchronization (VSYNC) time.
The method of claim 1, wherein a frame composer or a surface flinger (SF) mechanism consumes a frame at the frame composition time.
The method of claim 1, wherein the preset headroom time is further determined based on an application workload value.
The method of claim 12, further comprising:

determining at least one of the application rendering threshold or an application workload threshold.
The method of claim 1, further comprising:

increasing a buffer queue counter of a buffer queue at the frame rendering completion time; and

decreasing the buffer queue counter of the buffer queue at the frame composition time.
The method of claim 14, wherein the buffer queue counter is monitored with a queueBuffer mechanism.
The method of claim 14, wherein the monitored application rendering duration is based on the buffer queue counter.
An apparatus for frame processing, comprising:

a memory; and

at least one processor coupled to the memory and configured to:

determine a preset headroom time based on an application rendering duration;

set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold, wherein the application headroom is equal to a difference between a frame rendering completion time and a frame composition time;

monitor the application rendering duration when the application headroom is set to the preset headroom time;

adjust a central processing unit (CPU) frequency value based on the monitored application rendering duration; and

adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold.
The apparatus of claim 17, wherein to adjust at least one of the CPU frequency value or the preset headroom time further comprises the at least one processor configured to at least one of:

increase the CPU frequency value or decrease the preset headroom time when the monitored application rendering duration is greater than or equal to the application rendering threshold.
The apparatus of claim 18, wherein the CPU frequency value is increased or the preset headroom time is decreased when the monitored application rendering duration is greater than or equal to a vertical synchronization (VSYNC) period.
The apparatus of claim 18, wherein the CPU frequency value is increased or the preset headroom time is decreased when an application workload value is greater than or equal to an application workload threshold.
The apparatus of claim 17, wherein to adjust at least one of the CPU frequency value or the preset headroom time further comprises the at least one processor configured to at least one of:

decrease the CPU frequency value or increase the preset headroom time when the monitored application rendering duration is less than the application rendering threshold.
The apparatus of claim 21, wherein the CPU frequency value is decreased or the preset headroom time is increased when the monitored application rendering duration is less than a vertical synchronization (VSYNC) period.
The apparatus of claim 21, wherein the CPU frequency value is decreased or the preset headroom time is increased when an application workload value is less than an application workload threshold.
The apparatus of claim 17, wherein the at least one processor is further configured to:

calculating an application workload value;

wherein the application headroom is set to the preset headroom time when the application workload value is less than or greater than an application workload threshold.
The apparatus of claim 17, wherein adjusting the preset headroom time further comprises the at least one processor configured to:

adjust at least one of the frame rendering completion time or the frame composition time.
The apparatus of claim 17, wherein the frame composition time is equal to a vertical synchronization (VSYNC) time.
The apparatus of claim 17, wherein a frame composer or a surface flinger (SF) mechanism consumes a frame at the frame composition time.
The apparatus of claim 17, wherein the preset headroom time is further determined based on an application workload value.
An apparatus for frame processing, comprising:

means for determining a preset headroom time based on an application rendering duration;

means for setting an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold, wherein the application headroom is equal to a difference between a frame rendering completion time and a frame composition time;

means for monitoring the application rendering duration when the application headroom is set to the preset headroom time;

means for adjusting a central processing unit (CPU) frequency value based on the monitored application rendering duration; and

means for adjusting the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold.
A computer-readable medium storing computer executable code for frame processing, comprising code to:

determine a preset headroom time based on an application rendering duration;

set an application headroom to the preset headroom time when the application rendering duration is less than or greater than an application rendering threshold, wherein the application headroom is equal to a difference between a frame rendering completion time and a frame composition time;

monitor the application rendering duration when the application headroom is set to the preset headroom time;

adjust a central processing unit (CPU) frequency value based on the monitored application rendering duration; and

adjust the preset headroom time when the monitored application rendering duration is less than or greater than the application rendering threshold.